Changes in Kconfig

a29e5290 - PCI/AER: Update aer-inject tool source URL

Tue, 16 Apr 2024 05:50:35 +0000

PCI/AER: Update aer-inject tool source URLThe aer-inject tool is no longer maintained in the original repositoryand is missing a fix related to the musl library. So, with the author's(Huang Ying) consent, it has been moved to a new repository [1].Update all references to the repository link.Link: https://github.com/intel/aer-inject.git [1]Link: https://lore.kernel.org/r/20240416055035.200085-1-sathyanarayanan.kuppuswamy@linux.intel.comSigned-off-by: Kuppuswamy Sathyanarayanan Signed-off-by: Bjorn Helgaas Cc: Huang Ying List of files: /linux-6.15/drivers/pci/pcie/Kconfig

0a867568 - PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handler

Wed, 18 Oct 2023 17:17:10 +0000

PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handlerIn Restricted CXL Device (RCD) mode a CXL device is exposed as anRCiEP, but CXL downstream and upstream ports are not enumerated andnot visible in the PCIe hierarchy. [1] Protocol and link errors fromthese non-enumerated ports are signaled as internal AER errors, eitherUncorrectable Internal Error (UIE) or Corrected Internal Errors (CIE)via an RCEC.Restricted CXL host (RCH) downstream port-detected errors have theRequester ID of the RCEC set in the RCEC's AER Error Source IDregister. A CXL handler must then inspect the error status in variousCXL registers residing in the dport's component register space (CXLRAS capability) or the dport's RCRB (PCIe AER extendedcapability). [2]Errors showing up in the RCEC's error handler must be handled andconnected to the CXL subsystem. Implement this by forwarding the errorto all CXL devices below the RCEC. Since the entire CXL device iscontrolled only using PCIe Configuration Space of device 0, function0, only pass it there [3]. The error handling is limited to currentlysupported devices with the Memory Device class code set (CXL Type 3Device, PCI_CLASS_MEMORY_CXL, 502h), handle downstream port errors inthe device's cxl_pci driver. Support for other CXL Device Types(e.g. a CXL.cache Device) can be added later.To handle downstream port errors in addition to errors directed to theCXL endpoint device, a handler must also inspect the CXL RAS and PCIeAER capabilities of the CXL downstream port the device is connectedto.Since CXL downstream port errors are signaled using internal errors,the handler requires those errors to be unmasked. This is subject of afollow-on patch.The reason for choosing this implementation is that the AER servicedriver claims the RCEC device, but does not allow it to register acustom specific handler to support CXL. Connecting the RCEC hard-wiredwith a CXL handler does not work, as the CXL subsystem might not bepresent all the time. The alternative to add an implementation to theportdrv to allow the registration of a custom RCEC error handler isn'tworth doing it as CXL would be its only user. Instead, just check foran CXL RCEC and pass it down to the connected CXL device's errorhandler. With this approach the code can entirely be implemented inthe PCIe AER driver and is independent of the CXL subsystem. The CXLdriver only provides the handler.[1] CXL 3.0 spec: 9.11.8 CXL Devices Attached to an RCH[2] CXL 3.0 spec, 12.2.1.1 RCH Downstream Port-detected Errors[3] CXL 3.0 spec, 8.1.3 PCIe DVSEC for CXL DevicesCo-developed-by: Terry Bowman Signed-off-by: Terry Bowman Signed-off-by: Robert Richter Cc: Oliver O'Halloran Cc: Bjorn Helgaas Cc: linuxppc-dev@lists.ozlabs.orgCc: linux-pci@vger.kernel.orgAcked-by: Bjorn Helgaas Reviewed-by: Jonathan Cameron Reviewed-by: Dave Jiang Link: https://lore.kernel.org/r/20231018171713.1883517-18-rrichter@amd.comSigned-off-by: Dan Williams List of files: /linux-6.15/drivers/pci/pcie/Kconfig

e67ad935 - PCI: pciehp: Enable by default if USB4 enabled

Tue, 15 Nov 2022 11:38:56 +0000

PCI: pciehp: Enable by default if USB4 enabledThunderbolt/USB4 PCIe tunneling depends on native PCIe hotplug. Enablepciehp by default if USB4 is enabled.[bhelgaas: squash, update subject, commit logs, tidy whitespace]Link: https://lore.kernel.org/r/20221115113857.35800-2-albert.zhou.50@gmail.comLink: https://lore.kernel.org/r/20221115113857.35800-3-albert.zhou.50@gmail.comSigned-off-by: Albert Zhou Signed-off-by: Bjorn Helgaas Reviewed-by: Mika Westerberg List of files: /linux-6.15/drivers/pci/pcie/Kconfig

602a4eda - PCI/AER: Update aer-inject URL

Sat, 15 Jan 2022 10:49:21 +0000

PCI/AER: Update aer-inject URLThe link to the aer-inject referenced leads to an empty repo and seems nolonger used. Replace it with the link mentioned inDocumentation/PCI/pcieaer-howto.rst.Link: https://lore.kernel.org/r/20220115104921.21606-1-yangyicong@hisilicon.comSigned-off-by: Yicong Yang Signed-off-by: Bjorn Helgaas List of files: /linux-6.15/drivers/pci/pcie/Kconfig

b4c7d207 - PCI/LINK: Remove bandwidth notification

Tue, 02 Feb 2021 20:17:54 +0000

PCI/LINK: Remove bandwidth notificationThe PCIe Bandwidth Change Notification feature logs messages when the linkbandwidth changes. Some users have reported that these messages occuroften enough to significantly reduce NVMe performance. GPUs also seem togenerate these messages.We don't know why the link bandwidth changes, but in the reported casesthere's no indication that it's caused by hardware failures.Remove the bandwidth change notifications for now. Hopefully we can addthis back when we have a better understanding of why this happens and howwe can make the messages useful instead of overwhelming.Link: https://lore.kernel.org/r/20200115221008.GA191037@google.com/Link: https://lore.kernel.org/r/155605909349.3575.13433421148215616375.stgit@gimli.home/Link: https://bugzilla.kernel.org/show_bug.cgi?id=206197Signed-off-by: Bjorn Helgaas List of files: /linux-6.15/drivers/pci/pcie/Kconfig

7ecd4a81 - PCI: Replace http:// links with https://

Sat, 27 Jun 2020 10:30:50 +0000

PCI: Replace http:// links with https://Replace http:// links with https:// links. This reduces the likelihood ofman-in-the-middle attacks when developers open these links. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS.[bhelgaas: also update samsung.com links, drop sourceforge link]Link: https://lore.kernel.org/r/20200627103050.71712-1-grandmaster@al2klimov.deSigned-off-by: Alexander A. Klimov Signed-off-by: Bjorn Helgaas List of files: /linux-6.15/drivers/pci/pcie/Kconfig

8c8ff55b - PCI/AER: Don't select CONFIG_PCIEAER by default

Wed, 08 Apr 2020 23:13:34 +0000

PCI/AER: Don't select CONFIG_PCIEAER by defaultPCIe Advanced Error Reporting (AER) is optional and there's no need for itto be selected by default.Remove the "default y" for CONFIG_PCIEAER.Signed-off-by: Bjorn Helgaas Reviewed-by: Kuppuswamy Sathyanarayanan Cc: Russell Currey Cc: Sam Bobroff Cc: Oliver O'Halloran List of files: /linux-6.15/drivers/pci/pcie/Kconfig

ac1c8e35 - PCI/DPC: Add Error Disconnect Recover (EDR) support

Tue, 24 Mar 2020 00:26:07 +0000

PCI/DPC: Add Error Disconnect Recover (EDR) supportError Disconnect Recover (EDR) is a feature that allows ACPI firmware tonotify OSPM that a device has been disconnected due to an error condition(ACPI v6.3, sec 5.6.6). OSPM advertises its support for EDR on PCI devicesvia _OSC (see [1], sec 4.5.1, table 4-4). The OSPM EDR notify handlershould invalidate software state associated with disconnected devices andmay attempt to recover them. OSPM communicates the status of recovery tothe firmware via _OST (sec 6.3.5.2).For PCIe, firmware may use Downstream Port Containment (DPC) to supportEDR. Per [1], sec 4.5.1, table 4-6, even if firmware has retained controlof DPC, OSPM may read/write DPC control and status registers during the EDRnotification processing window, i.e., from the time it receives an EDRnotification until it clears the DPC Trigger Status.Note that per [1], sec 4.5.1 and 4.5.2.4, 1. If the OS supports EDR, it should advertise that to firmware by setting OSC_PCI_EDR_SUPPORT in _OSC Support. 2. If the OS sets OSC_PCI_EXPRESS_DPC_CONTROL in _OSC Control to request control of the DPC capability, it must also set OSC_PCI_EDR_SUPPORT in _OSC Support.Add an EDR notify handler to attempt recovery.[1] Downstream Port Containment Related Enhancements ECN, Jan 28, 2019, affecting PCI Firmware Specification, Rev. 3.2 https://members.pcisig.com/wg/PCI-SIG/document/12888[bhelgaas: squash add/enable patches into one]Link: https://lore.kernel.org/r/90f91fe6d25c13f9d2255d2ce97ca15be307e1bb.1585000084.git.sathyanarayanan.kuppuswamy@linux.intel.comSigned-off-by: Kuppuswamy Sathyanarayanan Signed-off-by: Bjorn Helgaas Cc: "Rafael J. Wysocki" Cc: Len Brown List of files: /linux-6.15/drivers/pci/pcie/Kconfig

9ae05225 - PCI/AER: Fix the broken interrupt injection

Fri, 06 Mar 2020 13:03:48 +0000

PCI/AER: Fix the broken interrupt injectionThe AER error injection mechanism just blindly abuses generic_handle_irq()which is really not meant for consumption by random drivers. The include oflinux/irq.h should have been a red flag in the first place. Driver code,unless implementing interrupt chips or low level hypervisor functionalityhas absolutely no business with that.Invoking generic_handle_irq() from non interrupt handling context can havenasty side effects at least on x86 due to the hardware trainwreck whichmakes interrupt affinity changes a fragile beast. Sathyanarayanan triggereda NULL pointer dereference in the low level APIC code that way. While theparticular pointer could be checked this would only paper over the issuebecause there are other ways to trigger warnings or silently corrupt state.Invoke the new irq_inject_interrupt() mechanism, which has the necessarysanity checks in place and injects the interrupt via the irq_retrigger()mechanism, which is at least halfways safe vs. the fragile x86 affinitychange mechanics.It's safe on x86 as it does not corrupt state, but it still can cause apremature completion of an interrupt affinity change causing the interruptline to become stale. Very unlikely, but possible.For regular operations this is a non issue as AER error injection is meantfor debugging and testing and not for usage on production systems. Peopleusing this should better know what they are doing.Fixes: 390e2db82480 ("PCI/AER: Abstract AER interrupt handling")Reported-by: sathyanarayanan.kuppuswamy@linux.intel.comSigned-off-by: Thomas Gleixner Tested-by: Kuppuswamy Sathyanarayanan Reviewed-by: Kuppuswamy Sathyanarayanan Cc: Bjorn Helgaas Link: https://lkml.kernel.org/r/20200306130624.098374457@linutronix.de List of files: /linux-6.15/drivers/pci/pcie/Kconfig

87e90283 - PCI/ASPM: Remove PCIEASPM_DEBUG Kconfig option and related code

Sat, 05 Oct 2019 12:08:52 +0000

PCI/ASPM: Remove PCIEASPM_DEBUG Kconfig option and related codePreviously, CONFIG_PCIEASPM_DEBUG enabled "link_state" and "clk_ctl" sysfsfiles that controlled ASPM. We believe these files were rarely if everused.We recently added sysfs ASPM controls that are always present, so the debugcode is no longer needed. Removing this debug code has been discussed forquite some time, see e.g. [0].Remove PCIEASPM_DEBUG and the related code.[0] https://lore.kernel.org/lkml/20180727202619.GD173328@bhelgaas-glaptop.roam.corp.google.com/Link: https://lore.kernel.org/r/ec935d8e-c084-3938-f1d1-748617596b25@gmail.comSigned-off-by: Heiner Kallweit Signed-off-by: Bjorn Helgaas List of files: /linux-6.15/drivers/pci/pcie/Kconfig

b6479581 - PCI: Remove PCIe Kconfig dependencies on PCI

Wed, 06 Nov 2019 22:09:40 +0000

PCI: Remove PCIe Kconfig dependencies on PCIdrivers/pci/pcie/Kconfig is only sourced by drivers/pci/Kconfig, and onlywhen PCI is defined, so there's no need to depend on PCI again. Remove theunnecessary dependencies.Link: https://lore.kernel.org/r/20191106222420.10216-5-helgaas@kernel.orgSigned-off-by: Bjorn Helgaas Reviewed-by: Andrew Murray List of files: /linux-6.15/drivers/pci/pcie/Kconfig

33ce09ef - PCI/ASPM: Remove dependency on PCIEPORTBUS

Wed, 06 Nov 2019 22:07:36 +0000

PCI/ASPM: Remove dependency on PCIEPORTBUSThe ASPM support does not depend on the portdrv, so remove the Kconfigdependency.Link: https://lore.kernel.org/r/20191106222420.10216-4-helgaas@kernel.orgSigned-off-by: Bjorn Helgaas Reviewed-by: Andrew Murray List of files: /linux-6.15/drivers/pci/pcie/Kconfig

97a0ac8a - PCI/PTM: Remove dependency on PCIEPORTBUS

Wed, 06 Nov 2019 22:01:15 +0000

PCI/PTM: Remove dependency on PCIEPORTBUSThe PTM support does not depend on the portdrv, so remove the Kconfigdependency.Link: https://lore.kernel.org/r/20191106222420.10216-3-helgaas@kernel.orgSigned-off-by: Bjorn Helgaas Reviewed-by: Andrew Murray Cc: Jonathan Yong List of files: /linux-6.15/drivers/pci/pcie/Kconfig

2078e1e7 - PCI/LINK: Add Kconfig option (default off)

Wed, 01 May 2019 14:29:42 +0000

PCI/LINK: Add Kconfig option (default off)e8303bb7a75c ("PCI/LINK: Report degraded links via link bandwidthnotification") added dmesg logging whenever a link changes speed or widthto a state that is considered degraded. Unfortunately, it cannotdifferentiate signal integrity-related link changes from thoseintentionally initiated by an endpoint driver, including drivers that maylive in userspace or VMs when making use of vfio-pci. Some GPU driversactively manage the link state to save power, which generates a stream ofmessages like this: vfio-pci 0000:07:00.0: 32.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s x16 link at 0000:00:02.0 (capable of 64.000 Gb/s with 5 GT/s x16 link)Since we can't distinguish the intentional changes from the signalintegrity issues, leave the reporting turned off by default. Add a Kconfigoption to turn it on if desired.Fixes: e8303bb7a75c ("PCI/LINK: Report degraded links via link bandwidth notification")Link: https://lore.kernel.org/linux-pci/20190501142942.26972-1-keith.busch@intel.comSigned-off-by: Keith Busch Signed-off-by: Bjorn Helgaas List of files: /linux-6.15/drivers/pci/pcie/Kconfig

8f55ed3f - PCI: Update PCIEPORTBUS Kconfig help text

Wed, 06 Mar 2019 06:09:46 +0000

PCI: Update PCIEPORTBUS Kconfig help textThe Virtual Channel service has been removed and Downstream PortContainment has been added, so update the symbol description to beconsistent with the current code.Signed-off-by: Hou Zhiqiang Signed-off-by: Bjorn Helgaas List of files: /linux-6.15/drivers/pci/pcie/Kconfig

fe73c23d - PCI: pcie: Remove redundant 'default n' from Kconfig

Thu, 18 Oct 2018 19:05:29 +0000

PCI: pcie: Remove redundant 'default n' from Kconfig'default n' is the default value for any bool or tristate Kconfig settingso there is no need to write it explicitly.Also since commit f467c5640c29 ("kconfig: only write '# CONFIG_FOO is notset' for visible symbols") the Kconfig behavior is the same regardless of'default n' being present or not: ... One side effect of (and the main motivation for) this change is making the following two definitions behave exactly the same: config FOO bool config FOO bool default n With this change, neither of these will generate a '# CONFIG_FOO is not set' line (assuming FOO isn't selected/implied). That might make it clearer to people that a bare 'default n' is redundant. ...Signed-off-by: Bartlomiej Zolnierkiewicz Signed-off-by: Bjorn Helgaas List of files: /linux-6.15/drivers/pci/pcie/Kconfig

0b15f1e3 - PCI/AER: Use "PCI Express" consistently in Kconfig text

Fri, 08 Jun 2018 13:48:55 +0000

PCI/AER: Use "PCI Express" consistently in Kconfig textUse "PCI Express" consistently in Kconfig text. No functional changeintended.Signed-off-by: Bjorn Helgaas Reviewed-by: Keith Busch List of files: /linux-6.15/drivers/pci/pcie/Kconfig

4696b828 - PCI/AER: Hoist aerdrv.c, aer_inject.c up to drivers/pci/pcie/

Fri, 08 Jun 2018 13:48:47 +0000

PCI/AER: Hoist aerdrv.c, aer_inject.c up to drivers/pci/pcie/Hoist aerdrv.c, aer_inject.c up to drivers/pci/pcie/ so they're next toother PCIe service drivers. No functional change intended.Signed-off-by: Bjorn Helgaas Reviewed-by: Keith Busch List of files: /linux-6.15/drivers/pci/pcie/Kconfig

eed85ff4 - PCI/DPC: Enable DPC only if AER is available

Wed, 24 Jan 2018 23:03:18 +0000

PCI/DPC: Enable DPC only if AER is availableThe "Determination of DPC Control" implementation note in PCIe r4.0, sec6.1.10, recommends the operating system always link DPC control to thecontrol of AER, as the two functionalities are strongly connected.To avoid conflicts over whether platform firmware or the OS controls DPC,enable DPC only if AER is enabled in the OS, and the device's errorhandling does not have firmware-first AER handling.Signed-off-by: Keith Busch Signed-off-by: Bjorn Helgaas List of files: /linux-6.15/drivers/pci/pcie/Kconfig

7328c8f4 - PCI: Add SPDX GPL-2.0 when no license was specified

Fri, 26 Jan 2018 17:45:16 +0000

PCI: Add SPDX GPL-2.0 when no license was specifiedb24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier tofiles with no license") added SPDX GPL-2.0 to several PCI files thatpreviously contained no license information.Add SPDX GPL-2.0 to all other PCI files that did not contain any licenseinformation and hence were under the default GPL version 2 license of thekernel.Signed-off-by: Bjorn Helgaas Reviewed-by: Greg Kroah-Hartman List of files: /linux-6.15/drivers/pci/pcie/Kconfig