Changes in Makefile

5f3de23d - PCI: amd-mdb: Add AMD MDB Root Port driver

Fri, 28 Feb 2025 09:33:51 +0000

PCI: amd-mdb: Add AMD MDB Root Port driverAdd support for AMD MDB (Multimedia DMA Bridge) IP core as Root Port.The Versal2 devices include MDB Module. The integrated block for MDBalong with the integrated bridge can function as PCIe Root Portcontroller at Gen5 32-GT/s operation per lane.Bridge supports error and INTx interrupts and are handled using platformspecific interrupt line in Versal2.Signed-off-by: Thippeswamy Havalige Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/20250228093351.923615-4-thippeswamy.havalige@amd.com[bhelgaas: only present on ARM64-based SoCs; squash Kconfig dependency onARM64 from Geert Uytterhoeven :https://lore.kernel.org/r/eaef1dea7edcf146aa377d5e5c5c85a76ff56bae.1742306383.git.geert+renesas@glider.be]Signed-off-by: Bjorn Helgaas [kwilczynski: commit log, code comments and error messages clean-up,drop redundant "depends on PCI" from Kconfig, expose the error codeas part of error messages where appropriatie, change "depends on"expression to match existing style from other drivers]Signed-off-by: Krzysztof Wilczyński List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

4fbfa17f - PCI: dwc: Add debugfs based Silicon Debug support for DWC

Fri, 21 Feb 2025 13:15:46 +0000

PCI: dwc: Add debugfs based Silicon Debug support for DWCAdd support to provide Silicon Debug interface to userspace.This set of debug registers are part of the RAS DES feature present inDesignWare PCIe controllers.Co-developed-by: Manivannan Sadhasivam Signed-off-by: Shradha Todi Reviewed-by: Manivannan Sadhasivam Reviewed-by: Fan Ni Tested-by: Hrishikesh Deleep Link: https://lore.kernel.org/r/20250221131548.59616-4-shradha.t@samsung.com[kwilczynski: commit log, tidy up Kconfig and drop "default y", tidy upcode comments, squashed patch that fixes a NULL pointer dereference whendebugfs is already unavailable during clean-up fromhttps://lore.kernel.org/linux-pci/20250225171239.19574-2-manivannan.sadhasivam@linaro.org,refactor dwc_pcie_debugfs_init() to not return errors, squashed patch thatchanges how lack of the RAS DES capability is handled fromhttps://lore.kernel.org/linux-pci/20250304151814.6xu7cbpwpqrvcad5@thinkpad]Signed-off-by: Krzysztof Wilczyński List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

d45736b5 - PCI: qcom: Add equalization settings for 16.0 GT/s

Wed, 11 Sep 2024 15:26:28 +0000

PCI: qcom: Add equalization settings for 16.0 GT/sDuring high data transmission rates such as 16.0 GT/s, there is anincreased risk of signal loss due to poor channel quality andinterference. This can impact receiver's ability to capture signalsaccurately.Hence, as signal compensation is achieved through appropriate laneequalization, apply lane equalization settings at both transmitterand receiver which results in an increase in the PCIe signal strength.While at it, modify the pcie-tegra194 driver to make use of thecommon GEN3_EQ_CONTROL_OFF definitions in pcie-designware.h.Link: https://lore.kernel.org/linux-pci/20240911-pci-qcom-gen4-stability-v7-3-743f5c1fd027@linaro.orgTested-by: Johan Hovold Signed-off-by: Shashank Babu Chinta Venkata [mani: dropped the code refactoring and minor changes]Signed-off-by: Manivannan Sadhasivam [kwilczynski: commit log]Signed-off-by: Krzysztof Wilczyński Reviewed-by: Johan Hovold Reviewed-by: Manivannan Sadhasivam List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

e242f26f - PCI: dw-rockchip: Add endpoint mode support

Fri, 07 Jun 2024 11:14:30 +0000

PCI: dw-rockchip: Add endpoint mode supportThe PCIe controller in rk3568 and rk3588 can operate in endpoint mode.This endpoint mode support heavily leverages the existing code inpcie-designware-ep.c.Add support for endpoint mode to the existing pcie-dw-rockchip gluedriver.[kwilczynski: squash with patch adding the PCI_ENDPOINT dependency]Link: https://lore.kernel.org/linux-pci/20240607-rockchip-pcie-ep-v1-v5-10-0a042d6b0049@kernel.orgSigned-off-by: Niklas Cassel Signed-off-by: Krzysztof Wilczyński Signed-off-by: Bjorn Helgaas Reviewed-by: Manivannan Sadhasivam List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

0d0c5510 - PCI: rcar-gen4: Add R-Car Gen4 PCIe controller support for host mode

Wed, 18 Oct 2023 08:56:28 +0000

PCI: rcar-gen4: Add R-Car Gen4 PCIe controller support for host modeAdd R-Car Gen4 PCIe controller support for host mode.This controller is based on Synopsys DesignWare PCIe. However, thisparticular controller has a number of vendor-specific registers, and assuch, requires initialization code like mode setting and retraining andso on.Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-13-yoshihiro.shimoda.uh@renesas.comSigned-off-by: Yoshihiro Shimoda Signed-off-by: Krzysztof Wilczyński Reviewed-by: Manivannan Sadhasivam Reviewed-by: Serge Semin List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

ba6ed462 - PCI: dwc: Add Baikal-T1 PCIe controller support

Sun, 13 Nov 2022 19:13:01 +0000

PCI: dwc: Add Baikal-T1 PCIe controller supportBaikal-T1 SoC is equipped with DWC PCIe v4.60a host controller. It can betrained to work up to Gen.3 speed over up to x4 lanes. The host controlleris attached to the DW PCIe 3.0 PCS via the PIPE-4 interface, which in itsturn is connected to the DWC 10G PHY. The whole system is supposed to befed up with four clock sources: DBI peripheral clock, AXI applicationclocks and external PHY/core reference clock generating the 100MHz signal.In addition to that the platform provide a way to reset each part of thecontroller: sticky/non-sticky bits, host controller core, PIPE interface,PCS/PHY and Hot/Power reset signal. The driver also provides a way tohandle the GPIO-based PERST# signal.Note due to the Baikal-T1 MMIO peculiarity we have to implement the DBIinterface accessors which make sure the IO operations are dword-aligned.Link: https://lore.kernel.org/r/20221113191301.5526-21-Sergey.Semin@baikalelectronics.ruSigned-off-by: Serge Semin Signed-off-by: Lorenzo Pieralisi List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

f55fee56 - PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller driver

Mon, 20 Sep 2021 06:59:45 +0000

PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller driverAdd driver for Qualcomm PCIe Endpoint controller based on the DesignWarecore with added Qualcomm-specific wrapper around the core. The driversupport is very basic such that it supports only enumeration, PCIeread/write, and MSI. There is no ASPM and PM support for now but these willbe added later.The driver is capable of using the PERST# and WAKE# side-band GPIOs foroperation and written on top of the DWC PCI framework.[bhelgaas: wrap a few long lines]Co-developed-by: Siddartha Mohanadoss [mani: restructured the driver and fixed several bugs for upstream]Link: https://lore.kernel.org/r/20210920065946.15090-3-manivannan.sadhasivam@linaro.orgSigned-off-by: Siddartha Mohanadoss Signed-off-by: Manivannan Sadhasivam Signed-off-by: Lorenzo Pieralisi Signed-off-by: Bjorn Helgaas Reviewed-by: Rob Herring List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

0e898eb8 - PCI: rockchip-dwc: Add Rockchip RK356X host controller driver

Fri, 25 Jun 2021 06:55:11 +0000

PCI: rockchip-dwc: Add Rockchip RK356X host controller driverAdd a driver for the DesignWare-based PCIe controller found onRK356X. The existing pcie-rockchip-host driver is only used forthe Rockchip-designed IP found on RK3399.Link: https://lore.kernel.org/r/20210625065511.1096935-1-xxm@rock-chips.comTested-by: Peter Geis Signed-off-by: Simon Xue Signed-off-by: Shawn Lin Signed-off-by: Lorenzo Pieralisi Signed-off-by: Bjorn Helgaas Reviewed-by: Kever Yang Reviewed-by: Rob Herring List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

da36024a - PCI: visconti: Add Toshiba Visconti PCIe host controller driver

Wed, 11 Aug 2021 08:38:29 +0000

PCI: visconti: Add Toshiba Visconti PCIe host controller driverAdd support for the PCIe RC controller on Toshiba Visconti ARM SoCs. ThisPCIe controller is based on the Synopsys DesignWare PCIe core.Link: https://lore.kernel.org/r/20210811083830.784065-3-nobuhiro1.iwamatsu@toshiba.co.jpSigned-off-by: Yuji Ishikawa Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Lorenzo Pieralisi Signed-off-by: Bjorn Helgaas Reviewed-by: Rob Herring List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

0c87f90b - PCI: keembay: Add support for Intel Keem Bay

Thu, 05 Aug 2021 21:10:10 +0000

PCI: keembay: Add support for Intel Keem BayAdd driver for Intel Keem Bay SoC PCIe controller. This controlleris based on DesignWare PCIe core.In Root Complex mode, only internal reference clock is possible forKeem Bay A0. For Keem Bay B0, external reference clock can be usedand will be the default configuration. Currently, keembay_pcie_of_datastructure has one member. It will be expanded later to handle thisdifference.Endpoint mode link initialization is handled by the boot firmware.Link: https://lore.kernel.org/r/20210805211010.29484-3-srikanth.thokala@intel.comSigned-off-by: Wan Ahmad Zainie Signed-off-by: Srikanth Thokala Signed-off-by: Lorenzo Pieralisi Reviewed-by: Krzysztof Wilczyński Reviewed-by: Rob Herring Acked-by: Andy Shevchenko List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

a512360f - PCI: tegra194: Fix MCFG quirk build regressions

Thu, 10 Jun 2021 06:41:34 +0000

PCI: tegra194: Fix MCFG quirk build regressions7f100744749e ("PCI: tegra: Add Tegra194 MCFG quirks for ECAM errata")caused a few build regressions: - 7f100744749e removed the Makefile rule for CONFIG_PCIE_TEGRA194, so pcie-tegra.c can no longer be built as a module. Restore that rule. - 7f100744749e added "#ifdef CONFIG_PCIE_TEGRA194" around the native driver, but that's only set when the driver is built-in (for a module, CONFIG_PCIE_TEGRA194_MODULE is defined). The ACPI quirk is completely independent of the rest of the native driver, so move the quirk to its own file and remove the #ifdef in the native driver. - 7f100744749e added symbols that are always defined but used only when CONFIG_PCIEASPM, which causes warnings when CONFIG_PCIEASPM is not set: drivers/pci/controller/dwc/pcie-tegra194.c:259:18: warning: ‘event_cntr_data_offset’ defined but not used [-Wunused-const-variable=] drivers/pci/controller/dwc/pcie-tegra194.c:250:18: warning: ‘event_cntr_ctrl_offset’ defined but not used [-Wunused-const-variable=] drivers/pci/controller/dwc/pcie-tegra194.c:243:27: warning: ‘pcie_gen_freq’ defined but not used [-Wunused-const-variable=]Fixes: 7f100744749e ("PCI: tegra: Add Tegra194 MCFG quirks for ECAM errata")Link: https://lore.kernel.org/r/20210610064134.336781-1-jonathanh@nvidia.comSigned-off-by: Jon Hunter Signed-off-by: Bjorn Helgaas Reviewed-by: Thierry Reding List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

e7e21b3a - PCI: fu740: Add SiFive FU740 PCIe host controller driver

Tue, 04 May 2021 10:59:39 +0000

PCI: fu740: Add SiFive FU740 PCIe host controller driverAdd driver for the SiFive FU740 PCIe host controller.This controller is based on the DesignWare PCIe core.Co-developed-by: Henry Styles Co-developed-by: Erik Danie Co-developed-by: Greentime Hu Link: https://lore.kernel.org/r/20210504105940.100004-6-greentime.hu@sifive.comSigned-off-by: Paul Walmsley Signed-off-by: Henry Styles Signed-off-by: Erik Danie Signed-off-by: Greentime Hu Signed-off-by: Lorenzo Pieralisi List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

7f100744 - PCI: tegra: Add Tegra194 MCFG quirks for ECAM errata

Fri, 16 Apr 2021 13:45:37 +0000

PCI: tegra: Add Tegra194 MCFG quirks for ECAM errataThe PCIe controller in Tegra194 SoC is not ECAM-compliant. With thecurrent hardware design, ECAM can be enabled only for one controller (theC5 controller) with bus numbers starting from 160 instead of 0. A differentapproach is taken to avoid this abnormal way of enabling ECAM for just onecontroller but to enable configuration space access for all the othercontrollers. In this approach, ops are added through MCFG quirk mechanismwhich access the configuration spaces by dynamically programming iATU(internal AddressTranslation Unit) to generate respective configurationaccesses just like the way it is done in DesignWare core sub-system.This issue is specific to Tegra194 and it would be fixed in the futuregenerations of Tegra SoCs.Link: https://lore.kernel.org/r/20210416134537.19474-1-vidyas@nvidia.comSigned-off-by: Vidya Sagar Signed-off-by: Bjorn Helgaas List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

6e5a1fff - PCI: Avoid building empty drivers

Mon, 08 Mar 2021 15:24:48 +0000

PCI: Avoid building empty driversThere are harmless warnings when compile testing the kernel withCONFIG_TRIM_UNUSED_KSYMS: drivers/pci/controller/dwc/pcie-al.o: no symbols drivers/pci/controller/pci-thunder-ecam.o: no symbols drivers/pci/controller/pci-thunder-pem.o: no symbolsThe problem here is that the host drivers get built even when theconfiguration symbols are all disabled, as they pretend to not be driversbut are silently enabled because of the promise that ACPI-based systemsneed no drivers.Add back the normal symbols to have these drivers built, and change thelogic to otherwise only build them when both CONFIG_PCI_QUIRKS andCONFIG_ACPI are enabled.As a side-effect, this enables compile-testing the drivers on otherarchitectures, which in turn needs the acpi_get_rc_resources() function tobe defined.Link: https://lore.kernel.org/r/20210308152501.2135937-3-arnd@kernel.orgSigned-off-by: Arnd Bergmann Signed-off-by: Bjorn Helgaas Reviewed-by: Robert Richter List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

8d7e33d6 - PCI: uniphier: Add Socionext UniPhier Pro5 PCIe endpoint controller driver

Thu, 14 May 2020 12:03:21 +0000

PCI: uniphier: Add Socionext UniPhier Pro5 PCIe endpoint controller driverAdd driver for the Socionext UniPhier Pro5 SoC endpoint controller.This controller is based on the DesignWare PCIe core.And add "host" to existing controller descriontions for the host controllerin Kconfig.Link: https://lore.kernel.org/r/1589457801-12796-3-git-send-email-hayashi.kunihiko@socionext.comSigned-off-by: Kunihiko Hayashi Signed-off-by: Lorenzo Pieralisi Reviewed-by: Rob Herring List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

ed22aaae - PCI: dwc: intel: PCIe RC controller driver

Mon, 09 Dec 2019 03:20:05 +0000

PCI: dwc: intel: PCIe RC controller driverAdd support to PCIe RC controller on Intel Gateway SoCs.PCIe controller is based of Synopsys DesignWare PCIe core.Intel PCIe driver requires Upconfigure support, Fast TrainingSequence and link speed configurations. So adding the respectivehelper functions in the PCIe DesignWare framework.It also programs hardware autonomous speed during speedconfiguration so defining it in pci_regs.h.Also, mark Intel PCIe driver depends on MSI IRQ Domainas Synopsys DesignWare framework depends on thePCI_MSI_IRQ_DOMAIN.Signed-off-by: Dilip Kota Signed-off-by: Lorenzo Pieralisi Reviewed-by: Andrew Murray Reviewed-by: Andy Shevchenko Acked-by: Gustavo Pimentel List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

56e15a23 - PCI: tegra: Add Tegra194 PCIe support

Tue, 13 Aug 2019 11:36:27 +0000

PCI: tegra: Add Tegra194 PCIe supportAdd support for Synopsys DesignWare core IP based PCIe host controllerpresent in the Tegra194 SoC.Signed-off-by: Vidya Sagar Signed-off-by: Lorenzo Pieralisi Acked-by: Thierry Reding List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

b5b24617 - PCI: layerscape: Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC separately

Wed, 14 Aug 2019 02:03:30 +0000

PCI: layerscape: Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC separatelyAdd CONFIG_PCI_LAYERSCAPE_EP so that endpoint and host controllerdrivers can be built separately.Signed-off-by: Xiaowei Bao Signed-off-by: Lorenzo Pieralisi List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

4166bfe5 - PCI: al: Add Amazon Annapurna Labs PCIe host controller driver

Thu, 28 Mar 2019 11:57:56 +0000

PCI: al: Add Amazon Annapurna Labs PCIe host controller driverAdd driver for Amazon's Annapurna Labs PCIe host controller. Thecontroller is based on DesignWare's IP.The controller doesn't support accessing the Root Port's config space viaECAM, so we obtain its base address via an AMZN0001 device.Furthermore, the DesignWare PCIe controller doesn't filter out configtransactions sent to devices 1 and up on its bus, so they are filtered bythe driver.All subordinate buses do support ECAM access.Implementing specific PCI config access functions involves: - Adding an init function to obtain the Root Port's base address from an AMZN0001 device. - Adding a new entry in the MCFG quirk array.[bhelgaas: Note that there is no Kconfig option for this driver because itis only intended for use with the generic ACPI host bridge driver. Thisdriver is only needed because the DesignWare IP doesn't completely supportECAM access to the root bus.]Link: https://lore.kernel.org/lkml/1553774276-24675-1-git-send-email-jonnyc@amazon.comCo-developed-by: Vladimir Aerov Signed-off-by: Jonathan Chocron Signed-off-by: Vladimir Aerov Signed-off-by: Bjorn Helgaas Reviewed-by: David Woodhouse Reviewed-by: Benjamin Herrenschmidt Acked-by: Lorenzo Pieralisi List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile

a805770d - PCI: layerscape: Add EP mode support

Thu, 21 Feb 2019 03:16:19 +0000

PCI: layerscape: Add EP mode supportAdd the PCIe EP mode support to the layerscape platform controller.Signed-off-by: Xiaowei Bao Signed-off-by: Lorenzo Pieralisi Reviewed-by: Minghuan Lian Reviewed-by: Zhiqiang Hou Reviewed-by: Kishon Vijay Abraham I List of files: /linux-6.15/drivers/pci/controller/dwc/Makefile