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    <title>Changes in Kconfig</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>e3aabb3c - memory: tegra30-emc: Print additional memory info</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#e3aabb3c</link>
        <description>memory: tegra30-emc: Print additional memory infoPrint out memory type and LPDDR2 configuration on Tegra30, making itsimilar to the memory info printed by the Tegra20 memory driver. Thisinfo is useful for debugging purposes.Tested-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt; # T30 ASUS TF201 LPDDR2Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;Link: https://lore.kernel.org/r/20211222043215.28237-1-digetx@gmail.comSigned-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Wed, 22 Dec 2021 04:32:14 +0000</pubDate>
        <dc:creator>Dmitry Osipenko &lt;digetx@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>131dd9a4 - memory: tegra20-emc: Support matching timings by LPDDR2 configuration</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#131dd9a4</link>
        <description>memory: tegra20-emc: Support matching timings by LPDDR2 configurationASUS Transformer TF101 doesn&apos;t provide RAM code and in this case memorytimings should be selected based on identity information read out fromSDRAM chip. Support matching timings by LPDDR2 configuration.Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;Link: https://lore.kernel.org/r/20211006224659.21434-10-digetx@gmail.comSigned-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Wed, 06 Oct 2021 22:46:59 +0000</pubDate>
        <dc:creator>Dmitry Osipenko &lt;digetx@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>56ebc9b0 - memory: tegra: Enable compile testing for all drivers</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#56ebc9b0</link>
        <description>memory: tegra: Enable compile testing for all driversEnable compile testing for all Tegra memory drivers.Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Tue, 01 Jun 2021 02:31:13 +0000</pubDate>
        <dc:creator>Dmitry Osipenko &lt;digetx@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>380def2d - memory: tegra124: Support interconnect framework</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#380def2d</link>
        <description>memory: tegra124: Support interconnect frameworkNow Internal and External memory controllers are memory interconnectionproviders. This allows us to use interconnect API for tuning of memoryconfiguration. EMC driver now supports OPPs and DVFS.Tested-by: Nicolas Chauvet &lt;kwizart@gmail.com&gt;Acked-by: Georgi Djakov &lt;georgi.djakov@linaro.org&gt;Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;Link: https://lore.kernel.org/r/20201228154920.18846-4-digetx@gmail.comSigned-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Mon, 28 Dec 2020 15:49:18 +0000</pubDate>
        <dc:creator>Dmitry Osipenko &lt;digetx@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>281462e5 - memory: tegra124-emc: Make driver modular</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#281462e5</link>
        <description>memory: tegra124-emc: Make driver modularAdd modularization support to the Tegra124 EMC driver, which now can becompiled as a loadable kernel module.Note that EMC clock must be registered at clk-init time, otherwise PLLMwill be disabled as unused clock at boot time if EMC driver is compiledas a module. Hence add a prepare/complete callbacks. similarly to what isdone for the Tegra20/30 EMC drivers.Tested-by: Nicolas Chauvet &lt;kwizart@gmail.com&gt;Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;Link: https://lore.kernel.org/r/20201228154920.18846-2-digetx@gmail.comSigned-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Mon, 28 Dec 2020 15:49:16 +0000</pubDate>
        <dc:creator>Dmitry Osipenko &lt;digetx@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>d76fa3f2 - memory: tegra30: Support interconnect framework</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#d76fa3f2</link>
        <description>memory: tegra30: Support interconnect frameworkNow Internal and External memory controllers are memory interconnectionproviders. This allows us to use interconnect API for tuning of memoryconfiguration. EMC driver now supports OPPs and DVFS. MC driver nowsupports tuning of memory arbitration latency, which needs to be donefor ISO memory clients, like a Display client for example.Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;Tested-by: Peter Geis &lt;pgwipeout@gmail.com&gt;Acked-by: Georgi Djakov &lt;georgi.djakov@linaro.org&gt;Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;Link: https://lore.kernel.org/r/20201203192439.16177-4-digetx@gmail.comSigned-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Thu, 03 Dec 2020 19:24:32 +0000</pubDate>
        <dc:creator>Dmitry Osipenko &lt;digetx@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>0c56eda8 - memory: tegra30-emc: Make driver modular</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#0c56eda8</link>
        <description>memory: tegra30-emc: Make driver modularAdd modularization support to the Tegra30 EMC driver, which now can becompiled as a loadable kernel module.Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;Link: https://lore.kernel.org/r/20201111011456.7875-8-digetx@gmail.comSigned-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Wed, 11 Nov 2020 01:14:37 +0000</pubDate>
        <dc:creator>Dmitry Osipenko &lt;digetx@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>dedf62d6 - memory: tegra20-emc: Add devfreq support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#dedf62d6</link>
        <description>memory: tegra20-emc: Add devfreq supportAdd devfreq support to the Tegra20 EMC driver. Memory utilizationstatistics will be periodically polled from the memory controller andappropriate minimum clock rate will be selected by the devfreq governor.Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;Reviewed-by: Chanwoo Choi &lt;cw00.choi@samsung.com&gt;Link: https://lore.kernel.org/r/20201111011456.7875-5-digetx@gmail.comSigned-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Wed, 11 Nov 2020 01:14:34 +0000</pubDate>
        <dc:creator>Dmitry Osipenko &lt;digetx@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>d5ef16ba - memory: tegra20: Support interconnect framework</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#d5ef16ba</link>
        <description>memory: tegra20: Support interconnect frameworkNow Internal and External Memory Controllers are memory interconnectionproviders. This allows us to use interconnect API for tuning of memoryconfiguration. EMC driver now supports OPPs and DVFS.Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;Link: https://lore.kernel.org/r/20201104164923.21238-36-digetx@gmail.comSigned-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Wed, 04 Nov 2020 16:49:11 +0000</pubDate>
        <dc:creator>Dmitry Osipenko &lt;digetx@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>0260979b - memory: tegra20-emc: Make driver modular</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#0260979b</link>
        <description>memory: tegra20-emc: Make driver modularAdd modularization support to the Tegra20 EMC driver, which now can becompiled as a loadable kernel module.Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;Link: https://lore.kernel.org/r/20201104164923.21238-34-digetx@gmail.comSigned-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Wed, 04 Nov 2020 16:49:09 +0000</pubDate>
        <dc:creator>Dmitry Osipenko &lt;digetx@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>06f07981 - memory: tegra-mc: Add interconnect framework</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#06f07981</link>
        <description>memory: tegra-mc: Add interconnect frameworkAdd common SoC-agnostic ICC framework which turns Tegra Memory Controllerinto a memory interconnection provider. This allows us to use interconnectAPI for tuning of memory configurations.Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;Tested-by: Peter Geis &lt;pgwipeout@gmail.com&gt;Tested-by: Nicolas Chauvet &lt;kwizart@gmail.com&gt;Link: https://lore.kernel.org/r/20201104164923.21238-33-digetx@gmail.comSigned-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Wed, 04 Nov 2020 16:49:08 +0000</pubDate>
        <dc:creator>Dmitry Osipenko &lt;digetx@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>10de2114 - memory: tegra: Add EMC scaling support code for Tegra210</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#10de2114</link>
        <description>memory: tegra: Add EMC scaling support code for Tegra210This is the initial patch for Tegra210 EMC frequency scaling. It has thecode to program various aspects of the EMC that are standardized, but itdoes not yet include the specific programming sequence needed for clockscaling.The driver is designed to support LPDDR4 SDRAM. Devices that use LPDDR4need to perform training of the RAM before it can be used. Firmware willperform this training during early boot and pass a table of supportedfrequencies to the kernel via device tree.For the frequencies above 800 MHz, periodic retraining is needed tocompensate for changes in timing. This periodic training will have to beperformed until the frequency drops back to or below 800 MHz.This driver provides helpers used during this runtime retraining thatwill be used by the sequence specific code in a follow-up patch.Based on work by Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;.Signed-off-by: Joseph Lo &lt;josephl@nvidia.com&gt;Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Wed, 29 May 2019 08:21:36 +0000</pubDate>
        <dc:creator>Joseph Lo &lt;josephl@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>e34212c7 - memory: tegra: Introduce Tegra30 EMC driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#e34212c7</link>
        <description>memory: tegra: Introduce Tegra30 EMC driverIntroduce driver for the External Memory Controller (EMC) found on Tegra30chips, it controls the external DRAM on the board. The purpose of thisdriver is to program memory timing for external memory on the EMC clockrate change.Acked-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;Tested-by: Peter Geis &lt;pgwipeout@gmail.com&gt;Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Sun, 11 Aug 2019 21:00:40 +0000</pubDate>
        <dc:creator>Dmitry Osipenko &lt;digetx@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>ec8f24b7 - treewide: Add SPDX license identifier - Makefile/Kconfig</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#ec8f24b7</link>
        <description>treewide: Add SPDX license identifier - Makefile/KconfigAdd SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any formThese files fall under the project license, GPL v2 only. The resulting SPDXlicense identifier is:  GPL-2.0-onlySigned-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Sun, 19 May 2019 12:07:45 +0000</pubDate>
        <dc:creator>Thomas Gleixner &lt;tglx@linutronix.de&gt;</dc:creator>
    </item>
<item>
        <title>96e5da7c - memory: tegra: Introduce Tegra20 EMC driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#96e5da7c</link>
        <description>memory: tegra: Introduce Tegra20 EMC driverIntroduce driver for the External Memory Controller (EMC) found on Tegra20chips, which controls the external DRAM on the board. The purpose of thisdriver is to program memory timing for external memory on the EMC clockrate change.Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;Acked-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Sun, 21 Oct 2018 18:30:52 +0000</pubDate>
        <dc:creator>Dmitry Osipenko &lt;digetx@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>73a7f0a9 - memory: tegra: Add EMC (external memory controller) driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#73a7f0a9</link>
        <description>memory: tegra: Add EMC (external memory controller) driverImplements functionality needed to change the rate of the memory busclock.Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;Signed-off-by: Tomeu Vizoso &lt;tomeu.vizoso@collabora.com&gt;Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Thu, 12 Mar 2015 14:48:03 +0000</pubDate>
        <dc:creator>Mikko Perttunen &lt;mperttunen@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>89184651 - memory: Add NVIDIA Tegra memory controller support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/memory/tegra/Kconfig#89184651</link>
        <description>memory: Add NVIDIA Tegra memory controller supportThe memory controller on NVIDIA Tegra exposes various knobs that can beused to tune the behaviour of the clients attached to it.Currently this driver sets up the latency allowance registers to the HWdefaults. Eventually an API should be exported by this driver (via acustom API or a generic subsystem) to allow clients to register latencyrequirements.This driver also registers an IOMMU (SMMU) that&apos;s implemented by thememory controller. It is supported on Tegra30, Tegra114 and Tegra124currently. Tegra20 has a GART instead.The Tegra SMMU operates on memory clients and SWGROUPs. A memory clientis a unidirectional, special-purpose DMA master. A SWGROUP represents aset of memory clients that form a logical functional unit correspondingto a single device. Typically a device has two clients: one client forread transactions and one client for write transactions, but there arealso devices that have only read clients, but many of them (such as thedisplay controllers).Because there is no 1:1 relationship between memory clients and devicesthe driver keeps a table of memory clients and the SWGROUPs that theybelong to per SoC. Note that this is an exception and due to the factthat the SMMU is tightly integrated with the rest of the Tegra SoC. Theuse of these tables is discouraged in drivers for generic IOMMU devicessuch as the ARM SMMU because the same IOMMU could be used in any numberof SoCs and keeping such tables for each SoC would not scale.Acked-by: Joerg Roedel &lt;jroedel@suse.de&gt;Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/memory/tegra/Kconfig</description>
        <pubDate>Wed, 16 Apr 2014 07:24:44 +0000</pubDate>
        <dc:creator>Thierry Reding &lt;treding@nvidia.com&gt;</dc:creator>
    </item>
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