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    <title>Changes in Kconfig</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>9b3ae50c - irqchip/irq-bcm2712-mip: Enable driver when ARCH_BCM2835 is enabled</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#9b3ae50c</link>
        <description>irqchip/irq-bcm2712-mip: Enable driver when ARCH_BCM2835 is enabledThe BCM2712 MIP driver is required for Raspberry PI5, but it&apos;s notautomatically enabled when ARCH_BCM2835 is enabled and depends onARCH_BRCMSTB.ARCH_BCM2835 shares drivers with ARCH_BRCMSTB platforms, but Raspberry PI5does not require the BRCMSTB specific drivers, which are selected viaARCH_BRCMSTB.Enable the interrupt controller for both ARCH_BRCMSTB and ARCH_BCM2835.[ tglx: Massage changelog ]Fixes: 32c6c054661a (&quot;irqchip: Add Broadcom BCM2712 MSI-X interrupt controller&quot;)Signed-off-by: Peter Robinson &lt;pbrobinson@gmail.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Link: https://lore.kernel.org/all/20250416082523.179507-1-pbrobinson@gmail.com

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Wed, 16 Apr 2025 08:25:17 +0000</pubDate>
        <dc:creator>Peter Robinson &lt;pbrobinson@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>c6674154 - irqchip: Add the Sophgo SG2042 MSI interrupt controller</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#c6674154</link>
        <description>irqchip: Add the Sophgo SG2042 MSI interrupt controllerAdd driver for Sophgo SG2042 MSI interrupt controller.Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Reviewed-by: Inochi Amaoto &lt;inochiama@gmail.com&gt;Link: https://lore.kernel.org/all/3104216ca90a5f532bafb676c1c5b1efb19e94d1.1740535748.git.unicorn_wang@outlook.com

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Wed, 26 Feb 2025 02:15:19 +0000</pubDate>
        <dc:creator>Chen Wang &lt;unicorn_wang@outlook.com&gt;</dc:creator>
    </item>
<item>
        <title>32c6c054 - irqchip: Add Broadcom BCM2712 MSI-X interrupt controller</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#32c6c054</link>
        <description>irqchip: Add Broadcom BCM2712 MSI-X interrupt controllerAdd an interrupt controller driver for MSI-X Interrupt Peripheral (MIP)hardware block found in BCM2712. The interrupt controller is used tohandle MSI-X interrupts from peripherials behind PCIe endpoints likeRPi1 south bridge found in RPi5.There are two MIPs on BCM2712, the first has 64 consecutive SPIsassigned to 64 output vectors, and the second has 17 SPIs, but only8 of them are consecutive starting at the 8th output vector.Signed-off-by: Stanimir Varbanov &lt;svarbanov@suse.de&gt;Reviewed-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Tested-by: Ivan T. Ivanov &lt;iivanov@suse.de&gt;Link: https://lore.kernel.org/r/20250224083559.47645-4-svarbanov@suse.de[kwilczynski: commit log]Signed-off-by: Krzysztof Wilczy&#324;ski &lt;kwilczynski@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Mon, 24 Feb 2025 08:35:55 +0000</pubDate>
        <dc:creator>Stanimir Varbanov &lt;svarbanov@suse.de&gt;</dc:creator>
    </item>
<item>
        <title>96093fe5 - irqchip: Have CONFIG_IRQ_MSI_IOMMU be selected by irqchips that need it</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#96093fe5</link>
        <description>irqchip: Have CONFIG_IRQ_MSI_IOMMU be selected by irqchips that need itCurrently, IRQ_MSI_IOMMU is selected if DMA_IOMMU is available to providean implementation for iommu_dma_prepare/compose_msi_msg(). However, it&apos;llmake more sense for irqchips that call prepare/compose to select it, andthat will trigger all the additional code and data to be compiled intothe kernel.If IRQ_MSI_IOMMU is selected with no IOMMU side implementation, then theprepare/compose() will be NOP stubs.If IRQ_MSI_IOMMU is not selected by an irqchip, then the related code onthe iommu side is compiled out.Link: https://patch.msgid.link/r/a2620f67002c5cdf974e89ca3bf905f5c0817be6.1740014950.git.nicolinc@nvidia.comSigned-off-by: Nicolin Chen &lt;nicolinc@nvidia.com&gt;Reviewed-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Thu, 20 Feb 2025 01:31:39 +0000</pubDate>
        <dc:creator>Jason Gunthorpe &lt;jgg@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>fe35ecee - irqchip/riscv-imsic: Move to common MSI library</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#fe35ecee</link>
        <description>irqchip/riscv-imsic: Move to common MSI librarySimplify the leaf MSI domain handling in the RISC-V IMSIC driver byusing msi_lib_init_dev_msi_info() and msi_lib_irq_domain_select()provided by the common MSI library.Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Signed-off-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Link: https://lore.kernel.org/all/20250217085657.789309-4-apatel@ventanamicro.com

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Mon, 17 Feb 2025 08:56:49 +0000</pubDate>
        <dc:creator>Thomas Gleixner &lt;tglx@linutronix.de&gt;</dc:creator>
    </item>
<item>
        <title>e06c9e36 - irqchip/lan966x-oic: Make CONFIG_LAN966X_OIC depend on CONFIG_MCHP_LAN966X_PCI</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#e06c9e36</link>
        <description>irqchip/lan966x-oic: Make CONFIG_LAN966X_OIC depend on CONFIG_MCHP_LAN966X_PCIThe Microchip LAN966x outband interrupt controller is only present onMicrochip LAN966x SoCs, and only used in PCI endpoint mode.  Hence add adependency on MCHP_LAN966X_PCI, to prevent asking the user about thisdriver when configuring a kernel without Microchip LAN966x PCIe support.Fixes: 3e3a7b35332924c8 (&quot;irqchip: Add support for LAN966x OIC&quot;)Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Acked-by: Herve Codina &lt;herve.codina@bootlin.com&gt;Link: https://lore.kernel.org/all/28e8a605e72ee45e27f0d06b2b71366159a9c782.1737383314.git.geert+renesas@glider.be

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Mon, 20 Jan 2025 14:35:02 +0000</pubDate>
        <dc:creator>Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</dc:creator>
    </item>
<item>
        <title>b8b26ae3 - irqchip/ti-sci-inta : Add module build support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#b8b26ae3</link>
        <description>irqchip/ti-sci-inta : Add module build supportAdd module build support in Kconfig for the TI SCI interrupt aggregatordriver. The driver&apos;s default build is built-in and it also depends onARCH_K3 as the driver uses some 64 bit ops and should only be built for64-bit platforms.Signed-off-by: Nicolas Frayer &lt;nfrayer@baylibre.com&gt;Signed-off-by: Guillaume La Roque &lt;glaroque@baylibre.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Reviewed-by: Nishanth Menon &lt;nm@ti.com&gt;Link: https://lore.kernel.org/all/20241224-timodules-v4-2-c5e010f58e2c@baylibre.com

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Tue, 24 Dec 2024 19:36:43 +0000</pubDate>
        <dc:creator>Nicolas Frayer &lt;nfrayer@baylibre.com&gt;</dc:creator>
    </item>
<item>
        <title>2d95ffae - irqchip/ti-sci-intr: Add module build support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#2d95ffae</link>
        <description>irqchip/ti-sci-intr: Add module build supportAdd module build support in Kconfig for the TI SCI interrupt routerdriver. This driver depends on the TI sci firmware driver which areadysupports module build.Signed-off-by: Nicolas Frayer &lt;nfrayer@baylibre.com&gt;Signed-off-by: Guillaume La Roque &lt;glaroque@baylibre.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Reviewed-by: Nishanth Menon &lt;nm@ti.com&gt;Link: https://lore.kernel.org/all/20241224-timodules-v4-1-c5e010f58e2c@baylibre.com

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Tue, 24 Dec 2024 19:36:42 +0000</pubDate>
        <dc:creator>Nicolas Frayer &lt;nfrayer@baylibre.com&gt;</dc:creator>
    </item>
<item>
        <title>9151299e - irqchip/stm32mp-exti: CONFIG_STM32MP_EXTI should not default to y when compile-testing</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#9151299e</link>
        <description>irqchip/stm32mp-exti: CONFIG_STM32MP_EXTI should not default to y when compile-testingMerely enabling compile-testing should not enable additional functionality.Fixes: 0be58e0553812fcb (&quot;irqchip/stm32mp-exti: Allow building as module&quot;)Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Link: https://lore.kernel.org/all/ef5ec063b23522058f92087e072419ea233acfe9.1733243115.git.geert+renesas@glider.be

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Tue, 03 Dec 2024 16:27:40 +0000</pubDate>
        <dc:creator>Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</dc:creator>
    </item>
<item>
        <title>25caea95 - irqchip: Add T-HEAD C900 ACLINT SSWI driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#25caea95</link>
        <description>irqchip: Add T-HEAD C900 ACLINT SSWI driverAdd a driver for the T-HEAD C900 ACLINT SSWI device. This device allowsthe system with T-HEAD cpus to send ipi via fast device interface.Signed-off-by: Inochi Amaoto &lt;inochiama@gmail.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Link: https://lore.kernel.org/all/20241031060859.722258-3-inochiama@gmail.com

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Thu, 31 Oct 2024 06:08:58 +0000</pubDate>
        <dc:creator>Inochi Amaoto &lt;inochiama@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>0053892f - irqchip/mips-gic: Fix selection of GENERIC_IRQ_EFFECTIVE_AFF_MASK</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#0053892f</link>
        <description>irqchip/mips-gic: Fix selection of GENERIC_IRQ_EFFECTIVE_AFF_MASKWithout SMP enabled (such as in allnoconfig), there is a Kconfig warningbecause CONFIG_IRQ_EFFECTIVE_AFF_MASK is unconditionally selected byCONFIG_MIPS_GIC:  WARNING: unmet direct dependencies detected for GENERIC_IRQ_EFFECTIVE_AFF_MASK    Depends on [n]: SMP [=n]    Selected by [y]:    - MIPS_GIC [=y]Add a dependency on SMP to the selection, which matches all otherselections of CONFIG_IRQ_EFFECTIVE_AFF_MASK.Fixes: 322a90638768 (&quot;irqchip/mips-gic: Multi-cluster support&quot;)Signed-off-by: Nathan Chancellor &lt;nathan@kernel.org&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Link: https://lore.kernel.org/all/20241101-mips-fix-generic_irq_effective_aff_mask-select-v1-1-d94db6e0de0d@kernel.org

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Fri, 01 Nov 2024 16:33:05 +0000</pubDate>
        <dc:creator>Nathan Chancellor &lt;nathan@kernel.org&gt;</dc:creator>
    </item>
<item>
        <title>322a9063 - irqchip/mips-gic: Multi-cluster support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#322a9063</link>
        <description>irqchip/mips-gic: Multi-cluster supportThe MIPS I6500 CPU &amp; CM (Coherence Manager) 3.5 introduce the concept ofmultiple clusters to the system. In these systems, each cluster containsits own GIC, so the GIC isn&apos;t truly global any longer. Access toregisters in the GICs of remote clusters is possible using a redirectregister block much like the redirect register blocks provided by theCM &amp; CPC, and configured through the same GCR_REDIRECT register thatmips_cm_lock_other() abstraction builds upon.It is expected that external interrupts are connected identically on allclusters. That is, if there is a device providing an interrupt connectedto GIC interrupt pin 0 then it should be connected to pin 0 of every GICin the system. For the most part, the GIC can be treated as though it isstill truly global, so long as interrupts in the cluster are configuredproperly.Introduce support for such multi-cluster systems in the MIPS GIC irqchipdriver. A newly introduced gic_irq_lock_cluster() function allows:  1) Configure access to a GIC in a remote cluster via the redirect     register block, using mips_cm_lock_other().Or:  2) Detect that the interrupt in question is affine to the local     cluster and plain old GIC register access to the GIC in the     local cluster should be used.It is possible to access the local cluster&apos;s GIC registers via theredirect block, but keeping the special case for them is both good forperformance (because we avoid the locking &amp; indirection overhead ofusing the redirect block) and necessary to maintain compatibility withsystems using CM revisions prior to 3.5 which don&apos;t support the redirectblock.The gic_irq_lock_cluster() function relies upon an IRQs effectiveaffinity in order to discover which cluster the IRQ is affine to. Inorder to track this &amp; allow it to be updated at an appropriate pointduring gic_set_affinity() select the generic support for effectiveaffinity using CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK.gic_set_affinity() is the one function which gains much complexity. Itnow deconfigures routing to any VP(E), ie. CPU, on the old cluster whenmoving affinity to a new cluster.gic_shared_irq_domain_map() moves its update of the IRQs effectiveaffinity to before its use of gic_irq_lock_cluster(), to ensure thatoperation is on the cluster the IRQ is affine to.The remaining changes are straightforward use of the gic_irq_lock_cluster()function to select between local cluster &amp; remote cluster code-paths whenconfiguring interrupts.Signed-off-by: Paul Burton &lt;paulburton@kernel.org&gt;Signed-off-by: Chao-ying Fu &lt;cfu@wavecomp.com&gt;Signed-off-by: Dragan Mladjenovic &lt;dragan.mladjenovic@syrmia.com&gt;Signed-off-by: Aleksandar Rikalo &lt;arikalo@gmail.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Tested-by: Serge Semin &lt;fancer.lancer@gmail.com&gt;Tested-by: Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;Link: https://lore.kernel.org/all/20241028175935.51250-5-arikalo@gmail.com

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Mon, 28 Oct 2024 17:59:26 +0000</pubDate>
        <dc:creator>Paul Burton &lt;paulburton@kernel.org&gt;</dc:creator>
    </item>
<item>
        <title>0d7605e7 - irqchip: Add RZ/V2H(P) Interrupt Control Unit (ICU) driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#0d7605e7</link>
        <description>irqchip: Add RZ/V2H(P) Interrupt Control Unit (ICU) driverAdd driver for the Renesas RZ/V2H(P) Interrupt Control Unit (ICU).This driver supports the external interrupts NMI, IRQn, and TINTn.Signed-off-by: Fabrizio Castro &lt;fabrizio.castro.jz@renesas.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Link: https://lore.kernel.org/all/20241009230817.798582-3-fabrizio.castro.jz@renesas.com

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Wed, 09 Oct 2024 23:08:16 +0000</pubDate>
        <dc:creator>Fabrizio Castro &lt;fabrizio.castro.jz@renesas.com&gt;</dc:creator>
    </item>
<item>
        <title>5fd7e1ee - irqchip: Remove obsolete config ARM_GIC_V3_ITS_PCI</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#5fd7e1ee</link>
        <description>irqchip: Remove obsolete config ARM_GIC_V3_ITS_PCICommit b5712bf89b4b (&quot;irqchip/gic-v3-its: Provide MSI parent forPCI/MSI[-X]&quot;) moves the functionality of irq-gic-v3-its-pci-msi.c intoirq-gic-v3-its-msi-parent.c, and drops the former file.With that, the config option ARM_GIC_V3_ITS_PCI is obsolete, but thedefinition of that config was not removed in the commit above.Remove this obsolete config ARM_GIC_V3_ITS_PCI.Signed-off-by: Lukas Bulwahn &lt;lukas.bulwahn@redhat.com&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Link: https://lore.kernel.org/all/20240926125502.363364-1-lukas.bulwahn@redhat.com

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Thu, 26 Sep 2024 12:55:02 +0000</pubDate>
        <dc:creator>Lukas Bulwahn &lt;lukas.bulwahn@redhat.com&gt;</dc:creator>
    </item>
<item>
        <title>0b3af759 - irqchip/loongson-pch-msi: Switch to MSI parent domains</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#0b3af759</link>
        <description>irqchip/loongson-pch-msi: Switch to MSI parent domainsRemove the global PCI/MSI irqdomain implementation and provide therequired MSI parent functionality by filling in msi_parent_ops, so thePCI/MSI code can detect the new parent and setup per-device MSI domains.Signed-off-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;Signed-off-by: Tianyang Zhang &lt;zhangtianyang@loongson.cn&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Link: https://lore.kernel.org/all/20240815112608.26925-2-zhangtianyang@loongson.cn

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Thu, 15 Aug 2024 11:26:07 +0000</pubDate>
        <dc:creator>Huacai Chen &lt;chenhuacai@loongson.cn&gt;</dc:creator>
    </item>
<item>
        <title>e0b99c4c - irqchip/mvebu-odmi: Switch to parent MSI</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#e0b99c4c</link>
        <description>irqchip/mvebu-odmi: Switch to parent MSIAll platform MSI users and the PCI/MSI code handle per device MSI domainswhen the irqdomain associated to the device provides MSI parentfunctionality.Remove the &quot;global&quot; platform domain related code and provide the MSI parentfunctionality by filling in msi_parent_ops.Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Signed-off-by: Anna-Maria Behnsen &lt;anna-maria@linutronix.de&gt;Signed-off-by: Shivamurthy Shastri &lt;shivamurthy.shastri@linutronix.de&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Link: https://lore.kernel.org/r/20240623142235.759892514@linutronix.de

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Sun, 23 Jun 2024 15:19:00 +0000</pubDate>
        <dc:creator>Thomas Gleixner &lt;tglx@linutronix.de&gt;</dc:creator>
    </item>
<item>
        <title>cdb23872 - irqchip/mvebu-gicp: Switch to MSI parent</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#cdb23872</link>
        <description>irqchip/mvebu-gicp: Switch to MSI parentAll platform MSI users and the PCI/MSI code handle per device MSI domainswhen the irqdomain associated to the device provides MSI parentfunctionality.Remove the &quot;global&quot; platform domain related code and provide the MSI parentfunctionality by filling in msi_parent_ops.Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Signed-off-by: Anna-Maria Behnsen &lt;anna-maria@linutronix.de&gt;Signed-off-by: Shivamurthy Shastri &lt;shivamurthy.shastri@linutronix.de&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Link: https://lore.kernel.org/r/20240623142235.699780279@linutronix.de

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Sun, 23 Jun 2024 15:18:58 +0000</pubDate>
        <dc:creator>Thomas Gleixner &lt;tglx@linutronix.de&gt;</dc:creator>
    </item>
<item>
        <title>7b2f8aa0 - irqchip/imx-mu-msi: Switch to MSI parent</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#7b2f8aa0</link>
        <description>irqchip/imx-mu-msi: Switch to MSI parentAll platform MSI users and the PCI/MSI code handle per device MSI domainswhen the irqdomain associated to the device provides MSI parentfunctionality.Remove the &quot;global&quot; platform domain related code and provide the MSI parentfunctionality by filling in msi_parent_ops.Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Signed-off-by: Anna-Maria Behnsen &lt;anna-maria@linutronix.de&gt;Signed-off-by: Shivamurthy Shastri &lt;shivamurthy.shastri@linutronix.de&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Link: https://lore.kernel.org/r/20240623142235.574932935@linutronix.de

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Sun, 23 Jun 2024 15:18:55 +0000</pubDate>
        <dc:creator>Thomas Gleixner &lt;tglx@linutronix.de&gt;</dc:creator>
    </item>
<item>
        <title>74e44454 - irqchip/gic-v2m: Switch to device MSI</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#74e44454</link>
        <description>irqchip/gic-v2m: Switch to device MSIAll platform MSI users and the PCI/MSI code handle per device MSI domainswhen the irqdomain associated to the device provides MSI parentfunctionality.Remove the &quot;global&quot; PCI/MSI and platform domain related code and providethe MSI parent functionality by filling in msi_parent_ops.Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Signed-off-by: Anna-Maria Behnsen &lt;anna-maria@linutronix.de&gt;Signed-off-by: Shivamurthy Shastri &lt;shivamurthy.shastri@linutronix.de&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Link: https://lore.kernel.org/r/20240623142235.514419280@linutronix.de

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Sun, 23 Jun 2024 15:18:53 +0000</pubDate>
        <dc:creator>Thomas Gleixner &lt;tglx@linutronix.de&gt;</dc:creator>
    </item>
<item>
        <title>48f71d56 - irqchip/gic-v3-its: Provide MSI parent infrastructure</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/irqchip/Kconfig#48f71d56</link>
        <description>irqchip/gic-v3-its: Provide MSI parent infrastructureTo support per device MSI domains the ITS must provide MSI parent domainfunctionality.Provide the basic skeleton for this:   - msi_parent_ops   - child domain init callback   - the MSI parent flag set in irqdomain::flagsThis does not make ITS a functional parent domain as there is no bit set inthe bus_select_mask yet, but it provides the base to implement PCI andplatform MSI support gradually on top.Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Signed-off-by: Anna-Maria Behnsen &lt;anna-maria@linutronix.de&gt;Signed-off-by: Shivamurthy Shastri &lt;shivamurthy.shastri@linutronix.de&gt;Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;Link: https://lore.kernel.org/r/20240623142234.903076277@linutronix.de

            List of files:
            /linux-6.15/drivers/irqchip/Kconfig</description>
        <pubDate>Sun, 23 Jun 2024 15:18:36 +0000</pubDate>
        <dc:creator>Thomas Gleixner &lt;tglx@linutronix.de&gt;</dc:creator>
    </item>
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