Changes in Kconfig

bbe1e78a - iommu/amd: Fix compilation error

Mon, 29 Apr 2024 11:17:07 +0000

iommu/amd: Fix compilation errorWith WERROR=y, which is default, clang is not happy:.../amd/pasid.c:168:3: error: call to undeclared function 'mmu_notifier_unregister'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration].../amd/pasid.c:191:8: error: call to undeclared function 'mmu_notifier_register'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]2 errors generated.Select missed dependency.Fixes: a5a91e54846d ("iommu/amd: Add SVA domain support")Signed-off-by: Andy Shevchenko Reviewed-by: Jason Gunthorpe Link: https://lore.kernel.org/r/20240429111707.2795194-1-andriy.shevchenko@linux.intel.comSigned-off-by: Joerg Roedel List of files: /linux-6.15/drivers/iommu/amd/Kconfig

1af95763 - iommu/amd: Initial SVA support for AMD IOMMU

Thu, 18 Apr 2024 10:33:58 +0000

iommu/amd: Initial SVA support for AMD IOMMUThis includes : - Add data structure to track per protection domain dev/pasid binding details protection_domain->dev_data_list will track attached list of dev_data/PASIDs. - Move 'to_pdomain()' to header file - Add iommu_sva_set_dev_pasid(). It will check whether PASID is supported or not. Also adds PASID to SVA protection domain list as well as to device GCR3 table. - Add iommu_ops.remove_dev_pasid support. It will unbind PASID from device. Also remove pasid data from protection domain device list. - Add IOMMU_SVA as dependency to AMD_IOMMU driverFor a given PASID, iommu_set_dev_pasid() will bind all devices to sameSVA protection domain (1 PASID : 1 SVA protection domain : N devices).This protection domain is different from device protection domain (onethat's mapped in attach_device() path). IOMMU uses domain ID for caching,invalidation, etc. In SVA mode it will use per-device-domain-ID. Hence ininvalidation path we retrieve domain ID from gcr3_info_table structure anduse that for invalidation.Co-developed-by: Wei Huang Signed-off-by: Wei Huang Co-developed-by: Suravee Suthikulpanit Signed-off-by: Suravee Suthikulpanit Signed-off-by: Vasant Hegde Reviewed-by: Jason Gunthorpe Link: https://lore.kernel.org/r/20240418103400.6229-14-vasant.hegde@amd.comSigned-off-by: Joerg Roedel List of files: /linux-6.15/drivers/iommu/amd/Kconfig

c4cb2311 - iommu/amd: Add support for enable/disable IOPF

Thu, 18 Apr 2024 10:33:57 +0000

iommu/amd: Add support for enable/disable IOPFReturn success from enable_feature(IOPF) path as this interface is goingaway. Instead we will enable/disable IOPF support in attach/detach devicepath.In attach device path, if device is capable of PRI, then we will add it toper IOMMU IOPF queue and enable PPR support in IOMMU. Also it willattach device to domain even if it fails to enable PRI or add device toIOPF queue as device can continue to work without PRI support.In detach device patch it follows following sequence: - Flush the queue for the given device - Disable PPR support in DTE[devid] - Remove device from IOPF queue - Disable device PRIAlso add IOMMU_IOPF as dependency to AMD_IOMMU driver.Co-developed-by: Suravee Suthikulpanit Signed-off-by: Suravee Suthikulpanit Signed-off-by: Vasant Hegde Reviewed-by: Jason Gunthorpe Link: https://lore.kernel.org/r/20240418103400.6229-13-vasant.hegde@amd.comSigned-off-by: Joerg Roedel List of files: /linux-6.15/drivers/iommu/amd/Kconfig

421a511a - iommu/amd: Access/Dirty bit support in IOPTEs

Tue, 24 Oct 2023 13:51:02 +0000

iommu/amd: Access/Dirty bit support in IOPTEsIOMMU advertises Access/Dirty bits if the extended feature register reportsit. Relevant AMD IOMMU SDM ref[0] "1.3.8 Enhanced Support for Access andDirty Bits"To enable it set the DTE flag in bits 7 and 8 to enable access, oraccess+dirty. With that, the IOMMU starts marking the D and A flags onevery Memory Request or ATS translation request. It is on the VMM side tosteer whether to enable dirty tracking or not, rather than wrongly doing inIOMMU. Relevant AMD IOMMU SDM ref [0], "Table 7. Device Table Entry (DTE)Field Definitions" particularly the entry "HAD".To actually toggle on and off it's relatively simple as it's setting 2 bitson DTE and flush the device DTE cache.To get what's dirtied use existing AMD io-pgtable support, by walking thepagetables over each IOVA, with fetch_pte(). The IOTLB flushing is left tothe caller (much like unmap), and iommu_dirty_bitmap_record() is the oneadding page-ranges to invalidate. This allows caller to batch the flushover a big span of IOVA space, without the iommu wondering about when toflush.Worthwhile sections from AMD IOMMU SDM:"2.2.3.1 Host Access Support""2.2.3.2 Host Dirty Support"For details on how IOMMU hardware updates the dirty bit see, and expectsfrom its consequent clearing by CPU:"2.2.7.4 Updating Accessed and Dirty Bits in the Guest Address Tables""2.2.7.5 Clearing Accessed and Dirty Bits"Quoting the SDM:"The setting of accessed and dirty status bits in the page tables isvisible to both the CPU and the peripheral when sharing guest page tables.The IOMMU interlocked operations to update A and D bits must be 64-bitoperations and naturally aligned on a 64-bit boundary".. and for the IOMMU update sequence to Dirty bit, essentially is states:1. Decodes the read and write intent from the memory access.2. If P=0 in the page descriptor, fail the access.3. Compare the A & D bits in the descriptor with the read and writeintent in the request.4. If the A or D bits need to be updated in the descriptor:* Start atomic operation.* Read the descriptor as a 64-bit access.* If the descriptor no longer appears to require an update, release theatomic lock withno further action and continue to step 5.* Calculate the new A & D bits.* Write the descriptor as a 64-bit access.* End atomic operation.5. Continue to the next stage of translation or to the memory access.Access/Dirty bits readout also need to consider the non-default page-sizes(aka replicated PTEs as mentined by manual), as AMD supports all powers oftwo (except 512G) page sizes.Select IOMMUFD_DRIVER only if IOMMUFD is enabled considering that IOMMUdirty tracking requires IOMMUFD.Link: https://lore.kernel.org/r/20231024135109.73787-12-joao.m.martins@oracle.comSigned-off-by: Joao Martins Reviewed-by: Suravee Suthikulpanit Signed-off-by: Jason Gunthorpe List of files: /linux-6.15/drivers/iommu/amd/Kconfig

5a0b11a1 - iommu/amd: Remove iommu_v2 module

Fri, 06 Oct 2023 09:57:02 +0000

iommu/amd: Remove iommu_v2 moduleAMD GPU driver which was the only in-kernel user of iommu_v2 moduleremoved dependency on iommu_v2 module.Also we are working on adding SVA support in AMD IOMMU driver. Devicedrivers are expected to use common SVA framework to enable devicePASID/PRI features.Removing iommu_v2 module and then adding SVA simplifies the development.Hence remove iommu_v2 module.Cc: Alex Deucher Cc: Joerg Roedel Cc: Felix Kuehling Signed-off-by: Vasant Hegde Reviewed-by: Jason Gunthorpe Reviewed-by: Jerry Snitselaar Tested-by: Alex Deucher Link: https://lore.kernel.org/r/20231006095706.5694-2-vasant.hegde@amd.comSigned-off-by: Joerg Roedel List of files: /linux-6.15/drivers/iommu/amd/Kconfig

de9f8a91 - iommu/dma: Clean up Kconfig

Tue, 16 Aug 2022 17:28:03 +0000

iommu/dma: Clean up KconfigAlthough iommu-dma is a per-architecture chonce, that is currentlyimplemented in a rather haphazard way. Selecting from the arch Kconfigwas the original logical approach, but is complicated by having tomanage dependencies; conversely, selecting from drivers ends up hidingthe architecture dependency *too* well. Instead, let's just have itenable itself automatically when IOMMU API support is enabled for therelevant architectures. It can't get much clearer than that.Signed-off-by: Robin Murphy Acked-by: Catalin Marinas Link: https://lore.kernel.org/r/2e33c8bc2b1bb478157b7964bfed976cb7466139.1660668998.git.robin.murphy@arm.comSigned-off-by: Joerg Roedel List of files: /linux-6.15/drivers/iommu/amd/Kconfig

c9b258c6 - iommu/amd: Prepare for generic IO page table framework

Tue, 15 Dec 2020 07:36:54 +0000

iommu/amd: Prepare for generic IO page table frameworkAdd initial hook up code to implement generic IO page table framework.Signed-off-by: Suravee Suthikulpanit Link: https://lore.kernel.org/r/20201215073705.123786-3-suravee.suthikulpanit@amd.comSigned-off-by: Joerg Roedel List of files: /linux-6.15/drivers/iommu/amd/Kconfig

e52d58d5 - iommu/amd: Use cmpxchg_double() when updating 128-bit IRTE

Thu, 03 Sep 2020 09:38:22 +0000

iommu/amd: Use cmpxchg_double() when updating 128-bit IRTEWhen using 128-bit interrupt-remapping table entry (IRTE) (a.k.a GA mode),current driver disables interrupt remapping when it updates the IRTEso that the upper and lower 64-bit values can be updated safely.However, this creates a small window, where the interrupt couldarrive and result in IO_PAGE_FAULT (for interrupt) as shown below. IOMMU Driver Device IRQ ============ =========== irte.RemapEn=0 ... change IRTE IRQ from device ==> IO_PAGE_FAULT !! ... irte.RemapEn=1This scenario has been observed when changing irq affinity on a systemrunning I/O-intensive workload, in which the destination APIC IDin the IRTE is updated.Instead, use cmpxchg_double() to update the 128-bit IRTE at once withoutdisabling the interrupt remapping. However, this means several features,which require GA (128-bit IRTE) support will also be affected if cmpxchg16bis not supported (which is unprecedented for AMD processors w/ IOMMU).Fixes: 880ac60e2538 ("iommu/amd: Introduce interrupt remapping ops structure")Reported-by: Sean Osborne Signed-off-by: Suravee Suthikulpanit Tested-by: Erik Rockstrom Reviewed-by: Joao Martins Link: https://lore.kernel.org/r/20200903093822.52012-3-suravee.suthikulpanit@amd.comSigned-off-by: Joerg Roedel List of files: /linux-6.15/drivers/iommu/amd/Kconfig

cbe94c6e - iommu/amd: Move Kconfig and Makefile bits down into amd directory

Tue, 30 Jun 2020 20:06:36 +0000

iommu/amd: Move Kconfig and Makefile bits down into amd directoryMove AMD Kconfig and Makefile bits down into the amd directorywith the rest of the AMD specific files.Signed-off-by: Jerry Snitselaar Cc: Joerg Roedel Cc: Suravee Suthikulpanit Link: https://lore.kernel.org/r/20200630200636.48600-3-jsnitsel@redhat.comSigned-off-by: Joerg Roedel List of files: /linux-6.15/drivers/iommu/amd/Kconfig