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    <title>Changes in xe_sync.h</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>5e4e1ed6 - drm/xe: Remove unused xe_sync_entry_wait</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/xe/xe_sync.h#5e4e1ed6</link>
        <description>drm/xe: Remove unused xe_sync_entry_waitxe_sync_entry_wait is no longer used, remove it.Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;Reviewed-by: Thomas Hellstr&#246;m &lt;thomas.hellstrom@linux.intel.com&gt;Reviewed-by: Nirmoy Das &lt;nirmoy.das@intel.com&gt;Link: https://patchwork.freedesktop.org/patch/msgid/20240717140429.1396820-2-matthew.brost@intel.com

            List of files:
            /linux-6.15/drivers/gpu/drm/xe/xe_sync.h</description>
        <pubDate>Wed, 17 Jul 2024 14:04:29 +0000</pubDate>
        <dc:creator>Matthew Brost &lt;matthew.brost@intel.com&gt;</dc:creator>
    </item>
<item>
        <title>5aa5eea0 - drm/xe: Move ufence add to vm_bind_ioctl_ops_fini</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/xe/xe_sync.h#5aa5eea0</link>
        <description>drm/xe: Move ufence add to vm_bind_ioctl_ops_finiRather than adding a ufence to a VMA in the bind function, add theufence to all VMAs in the IOCTL that require binds invm_bind_ioctl_ops_fini. This help withs the transition to job 1 per VMbind IOCTL.v2: - Rebasev3: - Fix typo in commit (Oak)Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;Reviewed-by: Oak Zeng &lt;oak.zeng@intel.com&gt;Link: https://patchwork.freedesktop.org/patch/msgid/20240425045513.1913039-12-matthew.brost@intel.com

            List of files:
            /linux-6.15/drivers/gpu/drm/xe/xe_sync.h</description>
        <pubDate>Thu, 25 Apr 2024 04:55:11 +0000</pubDate>
        <dc:creator>Matthew Brost &lt;matthew.brost@intel.com&gt;</dc:creator>
    </item>
<item>
        <title>5dffaa1b - drm/xe: Create a helper function to init job&apos;s user fence</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/xe/xe_sync.h#5dffaa1b</link>
        <description>drm/xe: Create a helper function to init job&apos;s user fenceRefactor xe_sync_entry_signal so it doesn&apos;t have tomodify xe_sched_job struct instead create a new helper functionto set user fence values for a job.v2: Move the sync type check to xe_sched_job_init_user_fence(Lucas)Cc: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;Cc: Matthew Auld &lt;matthew.auld@intel.com&gt;Cc: Matthew Brost &lt;matthew.brost@intel.com&gt;Cc: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;Signed-off-by: Nirmoy Das &lt;nirmoy.das@intel.com&gt;Reviewed-by: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;Link: https://patchwork.freedesktop.org/patch/msgid/20240321161142.4954-1-nirmoy.das@intel.comSigned-off-by: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/xe/xe_sync.h</description>
        <pubDate>Thu, 21 Mar 2024 16:11:42 +0000</pubDate>
        <dc:creator>Nirmoy Das &lt;nirmoy.das@intel.com&gt;</dc:creator>
    </item>
<item>
        <title>86b3cd6d - drm/xe: Expose user fence from xe_sync_entry</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/xe/xe_sync.h#86b3cd6d</link>
        <description>drm/xe: Expose user fence from xe_sync_entryBy allowing getting reference to user fence, we cancontrol the lifetime outside of sync entries.This is needed to allow vma to track the associateduser fence that was provided with bind ioctl.v2: xe_user_fence can be kept opaque (Jani, Matt)v3: indent fix (Matt)Cc: Thomas Hellstr&#246;m &lt;thomas.hellstrom@linux.intel.com&gt;Cc: Matthew Brost &lt;matthew.brost@intel.com&gt;Cc: Jani Nikula &lt;jani.nikula@linux.intel.com&gt;Signed-off-by: Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;Reviewed-by: Matthew Brost &lt;matthew.brost@intel.com&gt;Signed-off-by: Thomas Hellstr&#246;m &lt;thomas.hellstrom@linux.intel.com&gt;Link: https://patchwork.freedesktop.org/patch/msgid/20240215181152.450082-2-mika.kuoppala@linux.intel.com(cherry picked from commit 977e5b82e0901480bc201342d39f855fc0a2ef47)Signed-off-by: Thomas Hellstr&#246;m &lt;thomas.hellstrom@linux.intel.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/xe/xe_sync.h</description>
        <pubDate>Thu, 15 Feb 2024 18:11:51 +0000</pubDate>
        <dc:creator>Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;</dc:creator>
    </item>
<item>
        <title>977e5b82 - drm/xe: Expose user fence from xe_sync_entry</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/xe/xe_sync.h#977e5b82</link>
        <description>drm/xe: Expose user fence from xe_sync_entryBy allowing getting reference to user fence, we cancontrol the lifetime outside of sync entries.This is needed to allow vma to track the associateduser fence that was provided with bind ioctl.v2: xe_user_fence can be kept opaque (Jani, Matt)v3: indent fix (Matt)Cc: Thomas Hellstr&#246;m &lt;thomas.hellstrom@linux.intel.com&gt;Cc: Matthew Brost &lt;matthew.brost@intel.com&gt;Cc: Jani Nikula &lt;jani.nikula@linux.intel.com&gt;Signed-off-by: Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;Reviewed-by: Matthew Brost &lt;matthew.brost@intel.com&gt;Signed-off-by: Thomas Hellstr&#246;m &lt;thomas.hellstrom@linux.intel.com&gt;Link: https://patchwork.freedesktop.org/patch/msgid/20240215181152.450082-2-mika.kuoppala@linux.intel.com

            List of files:
            /linux-6.15/drivers/gpu/drm/xe/xe_sync.h</description>
        <pubDate>Thu, 15 Feb 2024 18:11:51 +0000</pubDate>
        <dc:creator>Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;</dc:creator>
    </item>
<item>
        <title>efeff7b3 - drm/xe: Only allow 1 ufence per exec / bind IOCTL</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/xe/xe_sync.h#efeff7b3</link>
        <description>drm/xe: Only allow 1 ufence per exec / bind IOCTLThe way exec ufences are coded only 1 ufence per IOCTL will be signaled.It is possible to fix this but for current use cases 1 ufence per IOCTLis sufficient. Enforce a limit of 1 ufence per IOCTL (both exec and bindto be uniform).v2:- Add fixes tag (Thomas)Fixes: dd08ebf6c352 (&quot;drm/xe: Introduce a new DRM driver for Intel GPUs&quot;)Cc: Mika Kahola &lt;mika.kahola@intel.com&gt;Cc: Thomas Hellstr&#246;m &lt;thomas.hellstrom@linux.intel.com&gt;Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;Reviewed-by: Brian Welty &lt;brian.welty@intel.com&gt;Link: https://patchwork.freedesktop.org/patch/msgid/20240124234413.1640825-1-matthew.brost@intel.com(cherry picked from commit d1df9bfbf68c65418f30917f406b6d5bd597714e)Signed-off-by: Thomas Hellstr&#246;m &lt;thomas.hellstrom@linux.intel.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/xe/xe_sync.h</description>
        <pubDate>Wed, 24 Jan 2024 23:44:13 +0000</pubDate>
        <dc:creator>Matthew Brost &lt;matthew.brost@intel.com&gt;</dc:creator>
    </item>
<item>
        <title>d1df9bfb - drm/xe: Only allow 1 ufence per exec / bind IOCTL</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/xe/xe_sync.h#d1df9bfb</link>
        <description>drm/xe: Only allow 1 ufence per exec / bind IOCTLThe way exec ufences are coded only 1 ufence per IOCTL will be signaled.It is possible to fix this but for current use cases 1 ufence per IOCTLis sufficient. Enforce a limit of 1 ufence per IOCTL (both exec and bindto be uniform).v2:- Add fixes tag (Thomas)Fixes: dd08ebf6c352 (&quot;drm/xe: Introduce a new DRM driver for Intel GPUs&quot;)Cc: Mika Kahola &lt;mika.kahola@intel.com&gt;Cc: Thomas Hellstr&#246;m &lt;thomas.hellstrom@linux.intel.com&gt;Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;Reviewed-by: Brian Welty &lt;brian.welty@intel.com&gt;Link: https://patchwork.freedesktop.org/patch/msgid/20240124234413.1640825-1-matthew.brost@intel.com

            List of files:
            /linux-6.15/drivers/gpu/drm/xe/xe_sync.h</description>
        <pubDate>Wed, 24 Jan 2024 23:44:13 +0000</pubDate>
        <dc:creator>Matthew Brost &lt;matthew.brost@intel.com&gt;</dc:creator>
    </item>
<item>
        <title>eb9702ad - drm/xe: Allow num_batch_buffer / num_binds == 0 in IOCTLs</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/xe/xe_sync.h#eb9702ad</link>
        <description>drm/xe: Allow num_batch_buffer / num_binds == 0 in IOCTLsThe idea being out-syncs can signal indicating all previous operationson the bind queue are complete. An example use case of this would besupport for implementing vkQueueWaitIdle easily.All in-syncs are waited on before signaling out-syncs. This isimplemented by forming a composite software fence of in-syncs andinstalling this fence in the out-syncs and exec queue last fence slot.The last fence must be added as a dependency for jobs on user execqueues as it is possible for the last fence to be a composite softwarefence (unordered, ioctl with zero bb or binds) rather than hardwarefence (ordered, previous job on queue).Cc: Thomas Hellstr&#246;m &lt;thomas.hellstrom@linux.intel.com&gt;Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;Reviewed-by: Thomas Hellstr&#246;m &lt;thomas.hellstrom@linux.intel.com&gt;Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/xe/xe_sync.h</description>
        <pubDate>Tue, 05 Dec 2023 18:39:54 +0000</pubDate>
        <dc:creator>Matthew Brost &lt;matthew.brost@intel.com&gt;</dc:creator>
    </item>
<item>
        <title>53bf60f6 - drm/xe: Use a flags field instead of bools for sync parse</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/xe/xe_sync.h#53bf60f6</link>
        <description>drm/xe: Use a flags field instead of bools for sync parseUse a flags field instead of severval bools for sync parse as it iseasier to read and less bug prone.v2: Pull in header change from subsequent patchSuggested-by: Thomas Hellstr&#246;m &lt;thomas.hellstrom@linux.intel.com&gt;Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;Reviewed-by: Thomas Hellstr&#246;m &lt;thomas.hellstrom@linux.intel.com&gt;Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/xe/xe_sync.h</description>
        <pubDate>Tue, 05 Dec 2023 18:56:17 +0000</pubDate>
        <dc:creator>Matthew Brost &lt;matthew.brost@intel.com&gt;</dc:creator>
    </item>
<item>
        <title>f3e9b1f4 - drm/xe: Remove async worker and rework sync binds</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/xe/xe_sync.h#f3e9b1f4</link>
        <description>drm/xe: Remove async worker and rework sync bindsAsync worker is gone. All jobs and memory allocations done in IOCTL toalign with dma fencing rules.Async vs. sync now means when do bind operations complete relative tothe IOCTL. Async completes when out-syncs signal while sync completeswhen the IOCTL returns. In-syncs and out-syncs are only allowed in asyncmode.If memory allocations fail in the job creation step the VM is killed.This is temporary, eventually a proper unwind will be done and VM willbe usable.Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;Reviewed-by: Thomas Hellstr&#246;m &lt;thomas.hellstrom@linux.intel.com&gt;Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/xe/xe_sync.h</description>
        <pubDate>Thu, 14 Sep 2023 20:40:50 +0000</pubDate>
        <dc:creator>Matthew Brost &lt;matthew.brost@intel.com&gt;</dc:creator>
    </item>
<item>
        <title>dd08ebf6 - drm/xe: Introduce a new DRM driver for Intel GPUs</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/xe/xe_sync.h#dd08ebf6</link>
        <description>drm/xe: Introduce a new DRM driver for Intel GPUsXe, is a new driver for Intel GPUs that supports both integrated anddiscrete platforms starting with Tiger Lake (first Intel Xe Architecture).The code is at a stage where it is already functional and has experimentalsupport for multiple platforms starting from Tiger Lake, with initialsupport implemented in Mesa (for Iris and Anv, our OpenGL and Vulkandrivers), as well as in NEO (for OpenCL and Level0).The new Xe driver leverages a lot from i915.As for display, the intent is to share the display code with the i915driver so that there is maximum reuse there. But it is not addedin this patch.This initial work is a collaboration of many people and unfortunatelythe big squashed patch won&apos;t fully honor the proper credits. But let&apos;sget some git quick stats so we can at least try to preserve some of thecredits:Co-developed-by: Matthew Brost &lt;matthew.brost@intel.com&gt;Co-developed-by: Matthew Auld &lt;matthew.auld@intel.com&gt;Co-developed-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;Co-developed-by: Thomas Hellstr&#246;m &lt;thomas.hellstrom@linux.intel.com&gt;Co-developed-by: Francois Dugast &lt;francois.dugast@intel.com&gt;Co-developed-by: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;Co-developed-by: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;Co-developed-by: Philippe Lecluse &lt;philippe.lecluse@intel.com&gt;Co-developed-by: Nirmoy Das &lt;nirmoy.das@intel.com&gt;Co-developed-by: Jani Nikula &lt;jani.nikula@intel.com&gt;Co-developed-by: Jos&#233; Roberto de Souza &lt;jose.souza@intel.com&gt;Co-developed-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;Co-developed-by: Dave Airlie &lt;airlied@redhat.com&gt;Co-developed-by: Faith Ekstrand &lt;faith.ekstrand@collabora.com&gt;Co-developed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;Co-developed-by: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/xe/xe_sync.h</description>
        <pubDate>Thu, 30 Mar 2023 21:31:57 +0000</pubDate>
        <dc:creator>Matthew Brost &lt;matthew.brost@intel.com&gt;</dc:creator>
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