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    <title>Changes in clock_source.h</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>0127f044 - drm/amd/display: Refactor input mode programming for DIG FIFO</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h#0127f044</link>
        <description>drm/amd/display: Refactor input mode programming for DIG FIFO[WHY]Input mode for the DIG FIFO should be programmed as part of streamencoder setup.[HOW]Pre-calculate the pixels per cycle as part of the pixel clock params,and program as part of stream encoder setup.Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;Signed-off-by: Dillon Varone &lt;dillon.varone@amd.com&gt;Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h</description>
        <pubDate>Mon, 15 Apr 2024 17:13:56 +0000</pubDate>
        <dc:creator>Dillon Varone &lt;dillon.varone@amd.com&gt;</dc:creator>
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        <title>1c5a2fa9 - drm/amd/display: Use correct DTO_SRC_SEL for 128b/132b encoding</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h#1c5a2fa9</link>
        <description>drm/amd/display: Use correct DTO_SRC_SEL for 128b/132b encoding[WHY]DP DTO isn&apos;t used for 128b/132b encoding[HOW]Check current link rate to determine whether using 8b/10b or 128/132b encodingReviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;Signed-off-by: Michael Strauss &lt;michael.strauss@amd.com&gt;Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h</description>
        <pubDate>Thu, 09 Jun 2022 14:45:34 +0000</pubDate>
        <dc:creator>Michael Strauss &lt;michael.strauss@amd.com&gt;</dc:creator>
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        <title>77a2b726 - drm/amd/display: Synchronize displays with different timings</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h#77a2b726</link>
        <description>drm/amd/display: Synchronize displays with different timings[why] Vendor based fan noise improvement[how]Report timing synchronizable when DP streams time framedifference is less than 0.05 percent. Adjust DP  DTOs andsync displays using  MASTER_UPDATE_LOCK_DB_X_YSigned-off-by: Vladimir Stempen &lt;vladimir.stempen@amd.com&gt;Acked-by: Bindu Ramamurthy &lt;bindu.r@amd.com&gt;Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h</description>
        <pubDate>Tue, 29 Dec 2020 20:01:12 +0000</pubDate>
        <dc:creator>Vladimir Stempen &lt;vladimir.stempen@amd.com&gt;</dc:creator>
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        <title>46570f09 - drm/amd/display: Keep clocks high before seamless boot done</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h#46570f09</link>
        <description>drm/amd/display: Keep clocks high before seamless boot done[Why]UEFI boot usually uses a boot profile that uses higher clocksand watermark settings.UEFI boot surface is less optimal, for example it uses linear surface[How]Before we finish our seamless boot sequence, keep the clock andwatermark settings from boot.Update to optimal settings only after first flip away from UEFIframe buffer.Signed-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h</description>
        <pubDate>Sat, 09 Feb 2019 01:50:51 +0000</pubDate>
        <dc:creator>Anthony Koo &lt;Anthony.Koo@amd.com&gt;</dc:creator>
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        <title>68f1a00c - drm/amd/display: interface to check if timing can be seamless</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h#68f1a00c</link>
        <description>drm/amd/display: interface to check if timing can be seamless[Why]Need to figure out whether a timing we want to commit matchessomething that GOP already programmed, in which casewe can decide to some optimizations[How]1. Add way to check for DIG FE2. Add way to check for matching OTG timing3. Add way to check for matching pixel clock (if possible)    - Currently only support DP for pixel clock, since it is easy to calcSigned-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h</description>
        <pubDate>Sun, 20 Jan 2019 06:08:02 +0000</pubDate>
        <dc:creator>Anthony Koo &lt;Anthony.Koo@amd.com&gt;</dc:creator>
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        <title>380604e2 - drm/amd/display: Use 100 Hz precision for pipe pixel clocks</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h#380604e2</link>
        <description>drm/amd/display: Use 100 Hz precision for pipe pixel clocks[Why]Users would like more accurate pixel clocks, especially for fractional&quot;TV&quot; frame rates like 59.94 Hz.[How]Store and communicate pixel clocks with 100 Hz accuracy fromdc_crtc_timing through to BIOS command table setpixelclock call.Signed-off-by: Ken Chalmers &lt;ken.chalmers@amd.com&gt;Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h</description>
        <pubDate>Tue, 06 Nov 2018 19:24:12 +0000</pubDate>
        <dc:creator>Ken Chalmers &lt;ken.chalmers@amd.com&gt;</dc:creator>
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        <title>e6ada541 - drm/amd/display: remove unused clk_src code</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h#e6ada541</link>
        <description>drm/amd/display: remove unused clk_src codeSigned-off-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h</description>
        <pubDate>Mon, 30 Jul 2018 18:45:42 +0000</pubDate>
        <dc:creator>Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;</dc:creator>
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        <title>391e20d8 - drm/amd/display: add display write back(DWB)</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h#391e20d8</link>
        <description>drm/amd/display: add display write back(DWB)Signed-off-by: Duke Du &lt;Duke.Du@amd.com&gt;Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;Acked-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h</description>
        <pubDate>Thu, 03 Aug 2017 14:20:52 +0000</pubDate>
        <dc:creator>Duke Du &lt;Duke.Du@amd.com&gt;</dc:creator>
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        <title>cc4d99b8 - drm/amd/display: HDMI YCbCr422 12bpc pixel format issue</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h#cc4d99b8</link>
        <description>drm/amd/display: HDMI YCbCr422 12bpc pixel format issueSigned-off-by: Charlene Liu &lt;charlene.liu@amd.com&gt;Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;Acked-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h</description>
        <pubDate>Thu, 02 Feb 2017 01:35:53 +0000</pubDate>
        <dc:creator>Charlene Liu &lt;charlene.liu@amd.com&gt;</dc:creator>
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        <title>4562236b - drm/amd/dc: Add dc display driver (v2)</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h#4562236b</link>
        <description>drm/amd/dc: Add dc display driver (v2)Supported DCE versions: 8.0, 10.0, 11.0, 11.2v2: rebase against 4.11Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;

            List of files:
            /linux-6.15/drivers/gpu/drm/amd/display/dc/inc/clock_source.h</description>
        <pubDate>Tue, 12 Sep 2017 19:58:20 +0000</pubDate>
        <dc:creator>Harry Wentland &lt;harry.wentland@amd.com&gt;</dc:creator>
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