Changes in Makefile

0cfdfebe - drm/amd/display: Refactor HUBP into component folder.

Thu, 25 Apr 2024 11:33:59 +0000

drm/amd/display: Refactor HUBP into component folder.[why]cleaning up the code refactor requires hubp to be in its own component.[how]move all files under newly created hubp folder and fixing the makefiles.Reviewed-by: Martin Leung Acked-by: Tom Chung Signed-off-by: Bhuvana Chandra Pinninti Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

0a8d2528 - drm/amd/display: Refactor DCCG into component folder

Mon, 22 Apr 2024 10:04:02 +0000

drm/amd/display: Refactor DCCG into component folder[why]cleaning up the code refactor requires dccg to be in its own component.[how]move all files under newly created dccg folder and fixing themakefiles.Reviewed-by: Martin Leung Acked-by: Tom Chung Signed-off-by: Revalla Hari Krishna Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

f5d75327 - drm/amd/display: Fix invalid Copyright notice

Mon, 22 Apr 2024 14:17:17 +0000

drm/amd/display: Fix invalid Copyright notice[Why && How]Copyright notice failed in the Palamida scan and make changes toalign with our guidelines.Acked-by: Tom Chung Signed-off-by: Leo Ma Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

f9c7818c - drm/amd/display: Refactor HUBBUB into component folder

Thu, 18 Apr 2024 12:46:40 +0000

drm/amd/display: Refactor HUBBUB into component folder[why]cleaning up the code refactor requires hubbub to be in its own component.[how]Move all files under newly created hubbub folder and fix the makefiles.Reviewed-by: Martin Leung Acked-by: Wayne Lin Signed-off-by: Revalla Hari Krishna Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

f6154d8b - drm/amd/display: Refactor INIT into component folder

Wed, 13 Dec 2023 14:26:38 +0000

drm/amd/display: Refactor INIT into component folder[why]Move all init files to hwss folder.[how]moved the dcnxx_init.c and .h files into inside the hwss and cleared thelinkage errors.Tested-by: Daniel Wheeler Reviewed-by: Martin Leung Acked-by: Rodrigo Siqueira Signed-off-by: Revalla Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

8b8eed05 - drm/amd/display: Refactor resource into component directory

Fri, 06 Oct 2023 09:35:42 +0000

drm/amd/display: Refactor resource into component directory[WHY]Move all resource files to unique folder resource.[HOW]Created resource folder in dc, moved thedcnxx_resource.c and dcnxx_resource.h files intocorresponding new folders inside the resource andmade appropriate changes for compilation in Makefiles.Reviewed-by: Martin Leung Acked-by: Alex Hung Signed-off-by: Mounika Adhuri Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

e53524cd - drm/amd/display: Refactor HWSS into component folder

Fri, 22 Sep 2023 12:53:28 +0000

drm/amd/display: Refactor HWSS into component folder[why]Rename hw_sequencer to hwseq.Move all hwseq files to uniquefolder hwss.[how]creating hwss repo in dc, and moved the dcnxx_hwseq.cand .h files into corresponding new folders inside the hwssand cleared the linkage errors by adding relative pathsin the Makefile.template.Reviewed-by: Martin Leung Acked-by: Tom Chung Signed-off-by: Mounika Adhuri Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

22f87d99 - drm/amd/display: move FPU operations from dcn21 to dml/dcn20 folder

Mon, 28 Feb 2022 21:10:46 +0000

drm/amd/display: move FPU operations from dcn21 to dml/dcn20 folderdml/dcn20_fpu file centralizes all DCN2x functions that require FPU access.Therefore, this patch moves FPU-related code from dcn21 to dcn20_fpu. Theseinclude:- dcn21_populate_dml_pipes_from_context()- dcn21_validate_bandwidth_fp() and related: - dcn21_calculate_wm(), - patch_bounding_box(), - calculate_wm_set_for_vlevel()- renaming update_bw_bounding_box() to dcn21_update_bw_bounding_box(), moveto dcn20_fpu with related static function construct_low_pstate_lvl()Also, make dcn21_fast_validate_bw() public in dcn21_resource as it is calledby dcn21_validate_bandwidth_fp() now in dcn20_fpu.Reuse dcn20_fpu_adjust_dppclk() in dcn21_fast_validate_bw() as it isolatesthe same FPU operation.Include dchubbub.h as it is required in dcn21_populate_dml_pipes_from_context()Signed-off-by: Melissa Wen Acked-by: Alan Liu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

c241ed2f - drm/amdgpu/display: drop DCN support for aarch64

Mon, 04 Jan 2021 16:24:20 +0000

drm/amdgpu/display: drop DCN support for aarch64From Ard:"Simply disabling -mgeneral-regs-only left and right is risky, given thatthe standard AArch64 ABI permits the use of FP/SIMD registers anywhere,and GCC is known to use SIMD registers for spilling, and may inventother uses of the FP/SIMD register file that have nothing to do with thefloating point code in question. Note that putting kernel_neon_begin()and kernel_neon_end() around the code that does use FP is not sufficienthere, the problem is in all the other code that may be emitted withreferences to SIMD registers in it.So the only way to do this properly is to put all floating point code ina separate compilation unit, and only compile that unit with-mgeneral-regs-only."Disable support until the code can be properly refactored to support thisproperly on aarch64.Acked-by: Will Deacon Reported-by: Ard Biesheuvel Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

88d5cb25 - drm/amdgpu/display: drop DCN support for aarch64

Mon, 04 Jan 2021 16:24:20 +0000

c07cbc1f - drm/amd/display: update dpp dto phase and modulo.

Mon, 26 Oct 2020 16:33:24 +0000

drm/amd/display: update dpp dto phase and modulo.[Why & How]Program modulo with ref dpp clk Mhz/10.Program phase with pipe dpp clk Mhz /10.DMUB FW could use these value to determine optimization clkfor PSR power saving.Signed-off-by: Yongqiang Sun Acked-by: Bindu Ramamurthy Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

c38d444e - drm/amd/display: add DCN support for aarch64

Sat, 08 Aug 2020 20:44:58 +0000

drm/amd/display: add DCN support for aarch64This adds ARM64 support into the DCN. This mainly enables supportfor Navi graphics cards. The dcn10 changes haven't been tested,since I don't have the relevant hardware available, but thereis no way to conditionally disable them, so I've done them anyway.Signed-off-by: Daniel Kolesa Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

16a9dea1 - amdgpu: Enable initial DCN support on POWER

Sat, 07 Dec 2019 22:47:46 +0000

amdgpu: Enable initial DCN support on POWERDCN requires floating point support to operate. Add the appropriatex86/ppc64 guards and FPU / AltiVec / VSX context switches to DCN.Note that the current DC20 code doesn't contain all required FPUwrappers on x86 or POWER, so this patch is insufficient to fullyenable DC20 on POWER.v2: s/X86_64/X86/g to retain previous behavior.Signed-off-by: Timothy Pearson Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

ad808910 - drm/amdgpu: fix license on Kconfig and Makefiles

Wed, 11 Dec 2019 15:09:03 +0000

drm/amdgpu: fix license on Kconfig and Makefilesamdgpu is MIT licensed.Fixes: ec8f24b7faaf3d ("treewide: Add SPDX license identifier - Makefile/Kconfig")Reviewed-by: Christian König Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

78c77382 - drm/amd/display: cleanup of function pointer tables

Tue, 29 Oct 2019 19:05:56 +0000

drm/amd/display: cleanup of function pointer tables[Why]It is becoming increasingly hard to figure out whichfunction is called on the different DCN versions[How]1. Make function pointer table init in its own init.c file2. Remove other scenarios in hwseq.c file that need toinclude headers of other DCN versions. (If needed,it should have been done via the function pointers)Signed-off-by: Anthony Koo Reviewed-by: Aric Cyr Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

bd95c144 - drm/amdgpu: fix license on Kconfig and Makefiles

Wed, 11 Dec 2019 15:09:03 +0000

e8a170ff - drm/amdgpu: enable -msse2 for GCC 7.1+ users

Wed, 16 Oct 2019 23:02:09 +0000

drm/amdgpu: enable -msse2 for GCC 7.1+ usersA final attempt at enabling sse2 for GCC users.Orininally attempted in:commit 10117450735c ("drm/amd/display: add -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines")Reverted due to "reported instability" in:commit 193392ed9f69 ("Revert "drm/amd/display: add -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines"")Re-added just for Clang in:commit 0f0727d971f6 ("drm/amd/display: readd -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines")The original report didn't have enough information to know if the GPFwas due to misalignment, but I suspect that it was. (The missinginformation was the disassembly of the function at the bottom of thetrace, to see if the instruction pointer pointed to an instruction with16B alignment memory operand requirements. The stack trace does showthe stack was only 8B but not 16B aligned though, which makes this astrong possibility).Now that the stack misalignment issue has been fixed for users of GCC7.1+, reattempt adding -msse2. This matches Clang.It will likely never be safe to enable this for pre-GCC 7.1 AND use a16B aligned stack in these translation units.This is only a functional change for GCC 7.1+ users, and should be boottested.Link: https://bugs.freedesktop.org/show_bug.cgi?id=109487Signed-off-by: Nick Desaulniers Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

00db2971 - drm/amdgpu: fix stack alignment ABI mismatch for GCC 7.1+

Wed, 16 Oct 2019 23:02:08 +0000

drm/amdgpu: fix stack alignment ABI mismatch for GCC 7.1+GCC earlier than 7.1 errors when compiling code that makes use of`double`s and sets a stack alignment outside of the range of [2^4-2^12]:$ cat foo.cdouble foo(double x, double y) { return x + y;}$ gcc-4.9 -mpreferred-stack-boundary=3 foo.cerror: -mpreferred-stack-boundary=3 is not between 4 and 12This is likely why the AMDGPU driver was ever compiled with a differentstack alignment (and thus different ABI) than the rest of the x86kernel. The kernel uses 8B stack alignment, while the driver was using16B stack alignment in a few places.Since GCC 7.1+ doesn't error, fix the ABI mismatch for users of newerversions of GCC.There was discussion about whether to mark the driver broken or not forusers of GCC earlier than 7.1, but since the driver currently isworking, don't explicitly break the driver for them here.Relying on differing stack alignment is unspecified behavior, andbrittle, and may break in the future.This patch is no functional change for GCC users earlier than 7.1. It'sbeen compile tested on GCC 4.9 and 8.3 to check the correct flags. Itshould be boot tested when built with GCC 7.1+.-mincoming-stack-boundary= or -mstackrealign may help keep this codebuilding for pre-GCC 7.1 users.The version check for GCC is broken into two conditionals, both becausecc-ifversion is currently GCC specific, and it simplifies a subsequentpatch.Signed-off-by: Nick Desaulniers Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

c868868f - drm/amdgpu: fix stack alignment ABI mismatch for Clang

Wed, 16 Oct 2019 23:02:07 +0000

drm/amdgpu: fix stack alignment ABI mismatch for ClangThe x86 kernel is compiled with an 8B stack alignment via`-mpreferred-stack-boundary=3` for GCC since 3.6-rc1 viacommit d9b0cde91c60 ("x86-64, gcc: Use -mpreferred-stack-boundary=3 if supported")or `-mstack-alignment=8` for Clang. Parts of the AMDGPU driver arecompiled with 16B stack alignment.Generally, the stack alignment is part of the ABI. Linking together twodifferent translation units with differing stack alignment is dangerous,particularly when the translation unit with the smaller stack alignmentmakes calls into the translation unit with the larger stack alignment.While 8B aligned stacks are sometimes also 16B aligned, they are notalways.Multiple users have reported General Protection Faults (GPF) when usingthe AMDGPU driver compiled with Clang. Clang is placing objects in stackslots assuming the stack is 16B aligned, and selecting instructions thatrequire 16B aligned memory operands.At runtime, syscall handlers with 8B aligned stack call into code thatassumes 16B stack alignment. When the stack is a multiple of 8B but not16B, these instructions result in a GPF.Remove the code that added compatibility between the differing compilerflags, as it will result in runtime GPFs when built with Clang. Cleanupsfor GCC will be sent in later patches in the series.Link: https://github.com/ClangBuiltLinux/linux/issues/735Debugged-by: Yuxuan Shui Reported-by: Shirish S Reported-by: Yuxuan Shui Suggested-by: Andrew Cooper Signed-off-by: Nick Desaulniers Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile

91c665bd - drm/amd/display: create dcn21_link_encoder files

Wed, 02 Oct 2019 15:55:12 +0000

drm/amd/display: create dcn21_link_encoder files[Why]DCN20 and DCN21 have different phy programming sequences.[How]Create a separate dcn21_link_encoder for RenoirSigned-off-by: Bhawanpreet Lakha Reviewed-by: Roman Li Signed-off-by: Alex Deucher List of files: /linux-6.15/drivers/gpu/drm/amd/display/dc/dcn21/Makefile