Changes in Makefile

3cd8cc98 - platform/x86: Drop the PMC_ATOM Kconfig option

Tue, 03 May 2022 14:02:07 +0000

platform/x86: Drop the PMC_ATOM Kconfig optionThe def_bool y PMC_ATOM Kconfig option provides a couple of symbols usedby the code enabled by the X86_INTEL_LPSS option and it registers someclocks. These clocks are only registered on Bay Trail, Cherry Trail andBrasswell Intel SoCs and kernels targeting these SoCs must always havethe X86_INTEL_LPSS option enabled otherwise many things will not work.Building the PMC_ATOM code on kernels which are not targeting thementioned SoCs and which do not have the X86_INTEL_LPSS enabled isnot useful.This means that we can simplify things by replacing the PMC_ATOM Kconfigoption in Makefiles with X86_INTEL_LPSS and then drop the option.Cc: Paul Gortmaker Signed-off-by: Hans de Goede Acked-by: Andy Shevchenko Acked-by: Stephen Boyd Link: https://lore.kernel.org/r/20220503140207.101218-2-hdegoede@redhat.com List of files: /linux-6.15/drivers/clk/x86/Makefile

cf0a9565 - clk: x86: Rename clk-lpt to more specific clk-lpss-atom

Thu, 22 Jul 2021 19:34:50 +0000

clk: x86: Rename clk-lpt to more specific clk-lpss-atomThe LPT stands for Lynxpoint PCH. However the driver is used on a fewIntel Atom SoCs. Rename it to reflect this in a way how another clockdriver, i.e. clk-pmc-atom, is called.Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20210722193450.35321-1-andriy.shevchenko@linux.intel.comAcked-by: Rafael J. Wysocki Signed-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/x86/Makefile

d9b77361 - clk: x86: Change name from ST to FCH

Fri, 31 Jul 2020 13:36:02 +0000

clk: x86: Change name from ST to FCHAMD SoC general pupose clk is present in new platforms withminor differences. We can reuse the same clk driver for otherplatforms. Hence, changing name from ST(SoC) to FCH(IP)Signed-off-by: Akshu Agrawal Reviewed-by: Stephen Boyd Signed-off-by: Rafael J. Wysocki List of files: /linux-6.15/drivers/clk/x86/Makefile

d058fd9e - clk: intel: Add CGU clock driver for a new SoC

Fri, 17 Apr 2020 05:54:47 +0000

clk: intel: Add CGU clock driver for a new SoCClock Generation Unit(CGU) is a new clock controller IP of a forthcomingIntel network processor SoC named Lightning Mountain(LGM). It providesprogramming interfaces to control & configure all CPU & peripheral clocks.Add common clock framework based clock controller driver for CGU.Signed-off-by: Rahul Tanwar Link: https://lkml.kernel.org/r/42a4f71847714df482bacffdcd84341a4052800b.1587102634.git.rahul.tanwar@linux.intel.com[sboyd@kernel.org: Kill init function to alloc and cleanup newline]Signed-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/x86/Makefile

ec8f24b7 - treewide: Add SPDX license identifier - Makefile/Kconfig

Sun, 19 May 2019 12:07:45 +0000

treewide: Add SPDX license identifier - Makefile/KconfigAdd SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any formThese files fall under the project license, GPL v2 only. The resulting SPDXlicense identifier is: GPL-2.0-onlySigned-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman List of files: /linux-6.15/drivers/clk/x86/Makefile

421bf6a1 - clk: x86: Add ST oscout platform clock

Wed, 09 May 2018 09:59:00 +0000

clk: x86: Add ST oscout platform clockStoney SoC provides oscout clock. This clock can support 25Mhz and48Mhz of frequency.The clock is available for general system use.Signed-off-by: Akshu Agrawal Reviewed-by: Daniel Kurtz Reviewed-by: Stephen Boyd Signed-off-by: Rafael J. Wysocki List of files: /linux-6.15/drivers/clk/x86/Makefile

1141d9d0 - clk: x86: Add Atom PMC platform clocks

Mon, 23 Jan 2017 18:07:42 +0000

clk: x86: Add Atom PMC platform clocksThe BayTrail and CherryTrail platforms provide platform clocksthrough their Power Management Controller (PMC).The SoC supports up to 6 clocks (PMC_PLT_CLK[0..5]) with afrequency of either 19.2 MHz (PLL) or 25 MHz (XTAL) for BayTrailand a frequency of 19.2 MHz (XTAL) for CherryTrail. These clocksare available for general system use, where appropriate, and eachhave Control & Frequency register fields associated with them.Port from legacy by Pierre Bossart, integration in clock frameworkby Irina TirdeaSigned-off-by: Irina Tirdea Signed-off-by: Pierre-Louis Bossart Acked-by: Andy Shevchenko Signed-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/x86/Makefile

f58b082a - ACPI / scan: Add special handler for Intel Lynxpoint LPSS devices

Wed, 06 Mar 2013 22:46:20 +0000

ACPI / scan: Add special handler for Intel Lynxpoint LPSS devicesDevices on the Intel Lynxpoint Low Power Subsystem (LPSS) have somecommon features that aren't shared with any other platform devices,including the clock and LTR (Latency Tolerance Reporting) registers.It is better to handle those features in common code than to botherdevice drivers with doing that (I/O functionality-wise the LPSSdevices are generally compatible with other devices that don'thave those special registers and may be handled by the same drivers).The clock registers of the LPSS devices are now taken care of bythe special clk-x86-lpss driver, but the MMIO mappings used foraccessing those registers can also be used for accessing the LTRregisters on those devices (LTR support for the Lynxpoint LPSS isgoing to be added by a subsequent patch). Thus it is convenientto add a special ACPI scan handler for the Lynxpoint LPSS devicesthat will create the MMIO mappings for accessing the clock (andLTR in the future) registers and will register the LPSS devices'clocks, so the clk-x86-lpss driver will only need to take care ofthe main Lynxpoint LPSS clock.Introduce a special ACPI scan handler for Intel Lynxpoint LPSSdevices as described above. This also reduces overhead related tobrowsing the ACPI namespace in search of the LPSS devices before theregistration of their clocks, removes some LPSS-specific (andsomewhat ugly) code from acpi_platform.c and shrinks the overall codesize slightly.Signed-off-by: Mika Westerberg Signed-off-by: Rafael J. Wysocki Acked-by: Mike Turquette List of files: /linux-6.15/drivers/clk/x86/Makefile

701190fd - clk: x86: add support for Lynxpoint LPSS clocks

Fri, 18 Jan 2013 13:46:00 +0000

clk: x86: add support for Lynxpoint LPSS clocksIntel Lynxpoint Low Power Subsystem hosts peripherals like UART, I2C andSPI controllers. For most of these there is a configuration register thatallows software to enable and disable the functional clock. Disabling theclock while the peripheral is not used saves power.In order to take advantage of this we add a new clock gate of typelpss_gate that just re-uses the ordinary clk_gate but in addition is ableto enumerate the base address register of the device using ACPI.We then create a clock tree that models the Lynxpoint LPSS clocks usingthese gates and fixed clocks so that we can pass clock rate to the driversas well.Signed-off-by: Heikki Krogerus Signed-off-by: Mika Westerberg Reviewed-by: Mark Brown Acked-by: Mike Turquette Signed-off-by: Rafael J. Wysocki List of files: /linux-6.15/drivers/clk/x86/Makefile