Changes in Makefile

f863d4cc - clk: rockchip: Add clock controller for the RK3562

Thu, 27 Feb 2025 10:59:15 +0000

clk: rockchip: Add clock controller for the RK3562Add the clock tree definition for the new RK3562 SoC.Signed-off-by: Finley Xiao Signed-off-by: Tao Huang Signed-off-by: Sugar Zhang Signed-off-by: Kever Yang Link: https://lore.kernel.org/r/20250227105916.2340856-3-kever.yang@rock-chips.com[dropped non-working module code, cleaned up init a bit to address build failure reported from kernel test robot Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202503021302.FjsycBI2-lkp@intel.com/ ]Signed-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

5738362a - clk: rockchip: rk3528: Add reset lookup table

Thu, 27 Feb 2025 17:52:57 +0000

clk: rockchip: rk3528: Add reset lookup tableIn the commit 5d0eb375e685 ("clk: rockchip: Add clock controller driverfor RK3528 SoC") only the dt-binding header was added for the resetcontroller for the RK3528 SoC.Add a reset lookup table generated from the SRST symbols used by vendorlinux-6.1-stan-rkr5 kernel to complete support for the reset controller.Signed-off-by: Jonas Karlman Link: https://lore.kernel.org/r/20250227175302.2950788-1-jonas@kwiboo.seSigned-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

5d0eb375 - clk: rockchip: Add clock controller driver for RK3528 SoC

Mon, 17 Feb 2025 06:11:44 +0000

clk: rockchip: Add clock controller driver for RK3528 SoCAdd clock tree definition for RK3528. Similar to previous RockchipSoCs, clock controller of RK3528 is combined with the reset controller.We omit the reset part for now since it's hard to test it withoutsupport for other basic peripherals.Signed-off-by: Yao Zi Link: https://lore.kernel.org/r/20250217061142.38480-8-ziyao@disroot.orgSigned-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

c62fa612 - clk: rockchip: implement linked gate clock support

Wed, 11 Dec 2024 16:58:53 +0000

clk: rockchip: implement linked gate clock supportRecent Rockchip SoCs have a new hardware block called Native InterfaceUnit (NIU), which gates clocks to devices behind them. These clockgates will only have a running output clock when all of the followingconditions are met:1. the parent clock is enabled2. the enable bit is set correctly3. the linked clock is enabledTo handle them this code registers them as a normal gate type clock,which takes care of condition 1 + 2. The linked clock is handled byusing runtime PM clocks. Handling it via runtime PM requires settingup a struct device for each of these clocks with a driver attachedto use the correct runtime PM operations. Thus the complete handlingof these clocks has been moved into its own driver.Signed-off-by: Sebastian Reichel Link: https://lore.kernel.org/r/20241211165957.94922-5-sebastian.reichel@collabora.comSigned-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

cc40f5ba - clk: rockchip: Add clock controller for the RK3576

Wed, 28 Aug 2024 15:42:55 +0000

clk: rockchip: Add clock controller for the RK3576Add the clock and reset tree definitions for the new RK3576SoC.As opposed to the other rockchip CRU drivers, the GRF node is looked upvia compatible instead of a phandle, which simplifies the device treebindings.Signed-off-by: Elaine Zhang Signed-off-by: Finley Xiao Signed-off-by: YouMin Chen Signed-off-by: Liang Chen Signed-off-by: Sugar Zhang Signed-off-by: Detlev Casanova Reviewed-by: Elaine Zhang Tested-by: Shawn Lin Acked-by: Dragan Simic Link: https://lore.kernel.org/r/0102019199a7781a-888440f0-a3f7-4a7d-a831-491260cbdfe7-000000@eu-west-1.amazonses.com[dropped additional blank line at EOF in rst-rk3576.c dropped the whole (non-)working as module part]Signed-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

f1c506d1 - clk: rockchip: add clock controller for the RK3588

Tue, 18 Oct 2022 15:14:07 +0000

clk: rockchip: add clock controller for the RK3588Add full clock controller support RK3588.[rebase, integrate fixes from Wyon and Finley, add missing frequencies to PLL lookup table, update commit message, add GATE_LINK clocks which downstream handles in its own driver with one DT node per clock]Signed-off-by: Wyon Bi Signed-off-by: Finley Xiao Signed-off-by: Elaine Zhang Signed-off-by: Sebastian Reichel Link: https://lore.kernel.org/r/20221018151407.63395-10-sebastian.reichel@collabora.com[dropped module stuff after talking to Sebastian]Signed-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

2408ab5a - clk: rockchip: Add clock controller support for RV1126 SoC

Thu, 15 Sep 2022 16:39:45 +0000

clk: rockchip: Add clock controller support for RV1126 SoCClock & Reset Unit (CRU) in RV1126 support clocks for CRUand CRU_PMU blocks.This patch is trying to add minimal Clock-Architecture Diagram'sinferred from [1] authored by Finley Xiao.[1] https://github.com/rockchip-linux/kernel/blob/develop-4.19/drivers/clk/rockchip/clk-rv1126.cCc: linux-clk@vger.kernel.orgCc: Michael Turquette Cc: Stephen Boyd Signed-off-by: Finley Xiao Signed-off-by: Jagan Teki Link: https://lore.kernel.org/r/20220915163947.1922183-5-jagan@edgeble.aiSigned-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

cf911d89 - clk: rockchip: add clock controller for rk3568

Mon, 15 Mar 2021 08:56:08 +0000

clk: rockchip: add clock controller for rk3568Add the clock tree definition for the new rk3568 SoC.Signed-off-by: Elaine Zhang Reviewed-by: Kever Yang Acked-by: Stephen Boyd Link: https://lore.kernel.org/r/20210315085608.16010-5-zhangqing@rock-chips.comSigned-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

4d98ed1e - clk: rockchip: fix the clk config to support module build

Mon, 14 Sep 2020 02:23:04 +0000

clk: rockchip: fix the clk config to support module builduse CONFIG_COMMON_CLK_ROCKCHIP for Rk common clk drivers.use CONFIG_CLK_RKXX for Rk soc clk driver.Mark CONFIG_CLK_RK3399 to "tristate",to support building Rk3399 SoC clock driver as module.Signed-off-by: Elaine Zhang Reviewed-by: Kever Yang Reviewed-by: Stephen Boyd Link: https://lore.kernel.org/r/20200914022304.23908-1-zhangqing@rock-chips.comSigned-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

ac68dfd3 - clk: rockchip: Add clock controller for the rk3308

Tue, 03 Sep 2019 11:59:47 +0000

clk: rockchip: Add clock controller for the rk3308Add the clock tree definition for the new RK3308 SoC.Signed-off-by: Finley Xiao Signed-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

243229b1 - clk: rockchip: add clock controller for px30

Fri, 15 Jun 2018 02:16:51 +0000

clk: rockchip: add clock controller for px30Add the clock tree definition for the new px30 SoC.Signed-off-by: Elaine Zhang Signed-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

956060a5 - clk: rockchip: add support for half divider

Fri, 15 Jun 2018 02:16:50 +0000

clk: rockchip: add support for half dividerThe new Rockchip socs have optional half divider:The formula is shown as: freq_out = 2*freq_in / (2*div + 3)Is this the same for all of new SoCs.So we use "branch_half_divider" + "COMPOSITE_NOMUX_HALFDIV \DIV_HALF \ COMPOSITE_HALFDIV \ CMPOSITE_NOGATE_HALFDIV"to hook that special divider clock-type into our clock-tree.Signed-off-by: Elaine Zhang Signed-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

1d646229 - clk: rockchip: remove deprecated gate-clk code and dt-binding

Sat, 12 May 2018 14:30:38 +0000

clk: rockchip: remove deprecated gate-clk code and dt-bindingInitially we tried modeling clocks via the devicetree before switchingto clocks declared in the clock drivers and only exporting specificids to the devicetree.As the old code was in the kernel for 1-2 releases when the new modeof operation was added we kept it for backwards compatibility.That deprecation notice is in the binding since july 2014, so nearly4 years now and I think it's time to drop the old cruft.Especially as at the time using the mainline kernel on Rockchip deviceswas not really possible, except for experiments on the really old socs ofthe rk3066 + rk3188 line, so there shouldn't be any devicetrees stillaround that rely on that code.Signed-off-by: Heiko Stuebner Acked-by: Stephen Boyd Reviewed-by: Rob Herring List of files: /linux-6.15/drivers/clk/rockchip/Makefile

b2441318 - License cleanup: add SPDX GPL-2.0 license identifier to files with no license

Wed, 01 Nov 2017 14:07:57 +0000

License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseMany source files in the tree are missing licensing information, whichmakes it harder for compliance tools to determine the correct license.By default all files without license information are under the defaultlicense of the kernel, which is GPL version 2.Update the files which contain no license information with the 'GPL-2.0'SPDX license identifier. The SPDX identifier is a legally bindingshorthand, which can be used instead of the full boiler plate text.This patch is based on work done by Thomas Gleixner and Kate Stewart andPhilippe Ombredanne.How this work was done:Patches were generated and checked against linux-4.14-rc6 for a subset ofthe use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information,Further patches will be generated in subsequent months to fix up caseswhere non-standard license headers were used, and references to licensehad to be inferred by heuristics based on keywords.The analysis to determine which SPDX License Identifier to be applied toa file was done in a spreadsheet of side by side results from of theoutput of two independent scanners (ScanCode & Windriver) producing SPDXtag:value files created by Philippe Ombredanne. Philippe prepared thebase worksheet, and did an initial spot review of a few 1000 files.The 4.13 kernel was the starting point of the analysis with 60,537 filesassessed. Kate Stewart did a file by file comparison of the scannerresults in the spreadsheet to determine which SPDX license identifier(s)to be applied to the file. She confirmed any determination that was notimmediately clear with lawyers working with the Linux Foundation.Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines).All documentation files were explicitly excluded.The following heuristics were used to determine which SPDX licenseidentifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time.In total, over 70 hours of logged manual review was done on thespreadsheet to determine the SPDX license identifiers to apply to thesource files by Kate, Philippe, Thomas and, in some cases, confirmationby lawyers working with the Linux Foundation.Kate also obtained a third independent scan of the 4.13 code base fromFOSSology, and compared selected files where the other two scannersdisagreed against that SPDX file, to see if there was new insights. TheWindriver scanner is based on an older version of FOSSology in part, sothey are related.Thomas did random spot checks in about 500 files from the spreadsheetsfor the uapi headers and agreed with SPDX license identifier in thefiles he inspected. For the non-uapi files Thomas did random spot checksin about 15000 files.In initial set of patches against 4.14-rc6, 3 files were found to havecopy/paste license identifier errors, and have been fixed to reflect thecorrect identifier.Additionally Philippe spent 10 hours this week doing a detailed manualinspection and review of the 12,461 patched files from the initial patchversion early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correctThis produced a worksheet with 20 files needing minor correction. Thisworksheet was then exported into 3 different .csv files for thedifferent types of files to be modified.These .csv files were then reviewed by Greg. Thomas wrote a script toparse the csv files and add the proper SPDX tag to the file, in theformat that the file expected. This script was further refined by Gregbased on the output to detect more types of files automatically and todistinguish between header and source .c files (which need differentcomment types.) Finally Greg ran the script using the .csv files togenerate the patches.Reviewed-by: Kate Stewart Reviewed-by: Philippe Ombredanne Reviewed-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman List of files: /linux-6.15/drivers/clk/rockchip/Makefile

f6022e88 - clk: rockchip: add clock controller for rk3128

Fri, 02 Jun 2017 01:47:25 +0000

clk: rockchip: add clock controller for rk3128Add the clock tree definition for the new rk3128 SoC.And it also applies to the RK3126 SoC.Signed-off-by: Elaine Zhang Signed-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

7e2a9035 - clk: rockchip: rename RK1108 to RV1108

Fri, 17 Mar 2017 17:18:38 +0000

clk: rockchip: rename RK1108 to RV1108Rockchip finally named the SOC as RV1108, so change it.Signed-off-by: Andy Yan [include rename in rk1108.dtsi to prevent compile errors]Signed-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

fe3511ad - clk: rockchip: add clock controller for rk3328

Thu, 29 Dec 2016 02:45:11 +0000

clk: rockchip: add clock controller for rk3328Add the clock tree definition for the new rk3328 SoC.Signed-off-by: Elaine Zhang Signed-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

cb1d9f6d - clk: rockchip: add a clock-type for muxes based in the grf

Mon, 26 Dec 2016 23:00:38 +0000

clk: rockchip: add a clock-type for muxes based in the grfRockchip socs often have some tiny number of muxes not controlled fromthe core clock controller but through bits set in the general registerfiles. Add a clock-type that can control these as well, so that wedon't need to work around them being absent.Signed-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

e44dde27 - clk: rockchip: add clock controller for rk1108

Wed, 16 Nov 2016 08:49:23 +0000

clk: rockchip: add clock controller for rk1108Add the clock tree definition and driver for rk1108 SoC.Signed-off-by: Shawn Lin Tested-by: Jacob Chen Signed-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile

a4f182bf - clk: rockchip: add new clock-type for the ddrclk

Mon, 22 Aug 2016 03:36:17 +0000

clk: rockchip: add new clock-type for the ddrclkChanging the rate of the DDR clock needs special care, as the DDRis of course in use and will react badly if the rate changes under it.Over time different approaches to handle that were used.Past SoCs like the rk3288 and before would store some code in SRAMwhile the rk3368 used a SCPI variant and let a coprocessor handle that.New rockchip platforms like the rk3399 have a dcf controller to do ddrfrequency scaling, and support for this controller will be implementedin the arm-trusted-firmware.This new clock-type should over time handle all these methods forhandling DDR rate changes, but right now it will concentrate on theSIP interface used to talk to ARM trusted firmware.The SIP interface counterpart was merged from pull-request #684 [0]into the upstream arm-trusted-firmware codebase.[0] https://github.com/ARM-software/arm-trusted-firmware/pull/684Signed-off-by: Lin Huang Signed-off-by: Heiko Stuebner List of files: /linux-6.15/drivers/clk/rockchip/Makefile