Changes in Kconfig

5ae1a434 - clk: amlogic: axg-audio: revert reset implementation

Thu, 28 Nov 2024 17:30:42 +0000

clk: amlogic: axg-audio: revert reset implementationThe audio subsystem of axg based platform is not probing anymore.This is due to the introduction of RESET_MESON_AUX and the confignot being enabled with the default arm64 defconfig.This brought another discussion around proper decoupling betweenthe clock and reset part. While this discussion gets sorted out,revert back to the initial implementation.This reverts * commit 681ed497d676 ("clk: amlogic: axg-audio: fix Kconfig dependency on RESET_MESON_AUX") * commit 664988eb47dd ("clk: amlogic: axg-audio: use the auxiliary reset driver")Both are reverted with single change to avoid creating more compilationproblems.Fixes: 681ed497d676 ("clk: amlogic: axg-audio: fix Kconfig dependency on RESET_MESON_AUX")Cc: Arnd Bergmann Reported-by: Mark Brown Signed-off-by: Jerome Brunet Link: https://lore.kernel.org/r/20241128-clk-audio-fix-rst-missing-v2-1-cf437d1a73da@baylibre.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/meson/Kconfig

681ed497 - clk: amlogic: axg-audio: fix Kconfig dependency on RESET_MESON_AUX

Mon, 11 Nov 2024 10:29:21 +0000

clk: amlogic: axg-audio: fix Kconfig dependency on RESET_MESON_AUXAs in most cases, using 'imply' is wrong here and does not preventbuild failures since that code may not be visible to a built-inclk driver:axg-audio.c:(.text+0x15c): undefined reference to `devm_meson_rst_aux_register'Replace the incorrt 'imply' with the necessary 'depends on'.Fixes: 664988eb47dd ("clk: amlogic: axg-audio: use the auxiliary reset driver")Signed-off-by: Arnd Bergmann Link: https://lore.kernel.org/r/20241111102932.3209861-1-arnd@kernel.orgReviewed-by: Jerome Brunet Signed-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/meson/Kconfig

664988eb - clk: amlogic: axg-audio: use the auxiliary reset driver

Tue, 08 Oct 2024 07:48:29 +0000

clk: amlogic: axg-audio: use the auxiliary reset driverRemove the implementation of the reset driver in axg audioclock driver and migrate to the one provided by the reset frameworkon the auxiliary busReviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20241008-meson-clk-rst-aux-v2-1-682ab9151f4f@baylibre.comSigned-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

f06ac3ed - clk: meson: c3: add c3 clock peripherals controller driver

Wed, 22 May 2024 08:27:27 +0000

clk: meson: c3: add c3 clock peripherals controller driverAdd the C3 peripherals clock controller driver in the C3 SoC family.[jbrunet: fix Kconfig select order and probe function name]Co-developed-by: Chuan Liu Signed-off-by: Chuan Liu Signed-off-by: Xianwei Zhao Link: https://lore.kernel.org/r/20240522082727.3029656-6-xianwei.zhao@amlogic.comSigned-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

8a9a129d - clk: meson: c3: add support for the C3 SoC PLL clock

Wed, 22 May 2024 08:27:26 +0000

clk: meson: c3: add support for the C3 SoC PLL clockAdd the C3 PLL clock controller driver for the Amlogic C3 SoC family.[jbrunet: fixed probe function name]Co-developed-by: Chuan Liu Signed-off-by: Chuan Liu Signed-off-by: Xianwei Zhao Link: https://lore.kernel.org/r/20240522082727.3029656-5-xianwei.zhao@amlogic.comSigned-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

b70cb1a2 - clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF

Wed, 03 Apr 2024 07:46:34 +0000

clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCFIn order to setup the DSI clock, let's make the unused VCLK2 clock pathconfiguration via CCF.The nocache option is removed from following clocks:- vclk2_sel- vclk2_input- vclk2_div- vclk2- vclk_div1- vclk2_div2_en- vclk2_div4_en- vclk2_div6_en- vclk2_div12_en- vclk2_div2- vclk2_div4- vclk2_div6- vclk2_div12- cts_encl_selvclk2 and vclk2_div uses the newly introduced vclk regmap driverto handle the enable and reset bits.In order to set a rate on cts_encl via the vclk2 clock path,the NO_REPARENT flag is set on cts_encl_sel & vclk2_sel in orderto keep CCF from selection a parent.The parents of cts_encl_sel & vclk2_sel are expected to be definedin DT or manually set by the display driver at some point.The following clock scheme is to be used for DSI:xtal\_ gp0_pll_dco \_ gp0_pll |- vclk2_sel | \_ vclk2_input | \_ vclk2_div | \_ vclk2 | \_ vclk2_div1 | \_ cts_encl_sel | \_ cts_encl -> to VPU LCD Encoder |- mipi_dsi_pxclk_sel \_ mipi_dsi_pxclk_div \_ mipi_dsi_pxclk -> to DSI controllerThe mipi_dsi_pxclk_div is set as bypass with a single /1 entry in div_tablein order to use the same GP0 for mipi_dsi_pxclk and vclk2_input.The SET_RATE_PARENT is only set on the mipi_dsi_pxclk_sel clock so theDSI bitclock is the reference base clock to calculate the vclk2_div valuewhen pixel clock is set on the cts_encl endpoint.Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20240403-amlogic-v6-4-upstream-dsi-ccf-vim3-v12-3-99ecdfdc87fc@linaro.orgSigned-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

bb5aa085 - clk: meson: add vclk driver

Wed, 03 Apr 2024 07:46:33 +0000

clk: meson: add vclk driverThe VCLK and VCLK_DIV clocks have supplementary bits.The VCLK gate has a "SOFT RESET" bit to toggle after the wholeVCLK sub-tree rate has been set, this is implemented inthe gate enable callback.The VCLK_DIV clocks as enable and reset bits used to disableand reset the divider, associated with CLK_SET_RATE_GATE it ensuresthe rate is set while the divider is disabled and in reset mode.The VCLK_DIV enable bit isn't implemented as a gate since it's partof the divider logic and vendor does this exact sequence to ensurethe divider is correctly set.Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20240403-amlogic-v6-4-upstream-dsi-ccf-vim3-v12-2-99ecdfdc87fc@linaro.orgSigned-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

98408df6 - clk: meson: S4: select CONFIG_COMMON_CLK_MESON_CLKC_UTILS

Mon, 23 Oct 2023 10:28:02 +0000

clk: meson: S4: select CONFIG_COMMON_CLK_MESON_CLKC_UTILSWithout this, the newly added drivers fail to link:aarch64-linux-ld: drivers/clk/meson/s4-pll.o: in function `meson_s4_pll_probe':s4-pll.c:(.text+0x13c): undefined reference to `meson_clk_hw_get'aarch64-linux-ld: drivers/clk/meson/s4-peripherals.o: in function `meson_s4_periphs_probe':s4-peripherals.c:(.text+0xb0): undefined reference to `meson_clk_hw_get'Fixes: e787c9c55eda ("clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver")Reviewed-by: Jerome Brunet Reviewed-by: Neil Armstrong Signed-off-by: Arnd Bergmann Link: https://lore.kernel.org/r/20231023102810.4001943-1-arnd@kernel.org[jbrunet: use 12 char for the Fixes as recommended ]Signed-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

57b55c76 - clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controller

Mon, 04 Sep 2023 07:55:04 +0000

clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controllerAdd the peripherals clock controller driver in the S4 SoC family.[jbrunet: remove extra new line at end of s4-peripherals.h]Signed-off-by: Yu Tu Link: https://lore.kernel.org/r/20230904075504.23263-5-yu.tu@amlogic.comSigned-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

e787c9c5 - clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver

Mon, 04 Sep 2023 07:55:03 +0000

clk: meson: S4: add support for Amlogic S4 SoC PLL clock driverAdd the S4 PLL clock controller driver in the S4 SoC family.Signed-off-by: Yu Tu Link: https://lore.kernel.org/r/20230904075504.23263-4-yu.tu@amlogic.comSigned-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

05d3b7c6 - clk: meson: migrate axg-audio out of hw_onecell_data to drop NR_CLKS

Mon, 12 Jun 2023 09:57:23 +0000

clk: meson: migrate axg-audio out of hw_onecell_data to drop NR_CLKSThe way hw_onecell_data is declared:struct clk_hw_onecell_data { unsigned int num; struct clk_hw *hws[];};makes it impossible to have the clk_hw table declared outside whileusing ARRAY_SIZE() to determine ".num" due to ".hws" being a flexiblearray member.Completely move out of hw_onecell_data and add a customdevm_of_clk_add_hw_provider() "get" callback to retrieve the clk_hwin order to finally get rid on the NR_CLKS define.Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-6-38172d17c27a@linaro.orgSigned-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

5e4e4804 - clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS

Mon, 12 Jun 2023 09:57:22 +0000

clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKSThe way hw_onecell_data is declared:struct clk_hw_onecell_data { unsigned int num; struct clk_hw *hws[];};makes it impossible to have the clk_hw table declared outside whileusing ARRAY_SIZE() to determine ".num" due to ".hws" being a flexiblearray member.Completely move out of hw_onecell_data and add a customdevm_of_clk_add_hw_provider() "get" callback to retrieve the clk_hwin order to finally get rid on the NR_CLKS define.Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-5-38172d17c27a@linaro.orgSigned-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

c3f2801b - clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS

Mon, 12 Jun 2023 09:57:21 +0000

clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKSThe way hw_onecell_data is declared:struct clk_hw_onecell_data { unsigned int num; struct clk_hw *hws[];};makes it impossible to have the clk_hw table declared outside whileusing ARRAY_SIZE() to determine ".num" due to ".hws" being a flexiblearray member.Completely move out of hw_onecell_data and add a customdevm_of_clk_add_hw_provider() "get" callback to retrieve the clk_hwin order to finally get rid on the NR_CLKS define.Signed-off-by: Neil Armstrong Reviewed-by: Dmitry Rokosov Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-4-38172d17c27a@linaro.orgSigned-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

7e1723fd - clk: meson: migrate meson-aoclk out of hw_onecell_data to drop NR_CLKS

Mon, 12 Jun 2023 09:57:20 +0000

clk: meson: migrate meson-aoclk out of hw_onecell_data to drop NR_CLKSThe way hw_onecell_data is declared: struct clk_hw_onecell_data { unsigned int num; struct clk_hw *hws[]; };makes it impossible to have the clk_hw table declared outside whileusing ARRAY_SIZE() to determine ".num" due to ".hws" being a flexiblearray member.Completely move out of hw_onecell_data and add a customdevm_of_clk_add_hw_provider() "get" callback to retrieve the clk_hwfrom the meson_aoclk_data struct to finally get rid on theNR_CLKS define.[jbrunet: Fixed whitespace checkpatch warning]Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-3-38172d17c27a@linaro.orgSigned-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

141fbc27 - clk: meson: migrate meson-eeclk out of hw_onecell_data to drop NR_CLKS

Mon, 12 Jun 2023 09:57:19 +0000

clk: meson: migrate meson-eeclk out of hw_onecell_data to drop NR_CLKSThe way hw_onecell_data is declared: struct clk_hw_onecell_data { unsigned int num; struct clk_hw *hws[]; };makes it impossible to have the clk_hw table declared outside whileusing ARRAY_SIZE() to determine ".num" due to ".hws" being a flexiblearray member.Completely move out of hw_onecell_data and add a customdevm_of_clk_add_hw_provider() "get" callback to retrieve the clk_hwfrom the meson_eeclkc_data struct to finally get rid on theNR_CLKS define.Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-2-38172d17c27a@linaro.orgSigned-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

230b6f3a - clk: meson: introduce meson-clkc-utils

Mon, 12 Jun 2023 09:57:18 +0000

clk: meson: introduce meson-clkc-utilsLet's introduce a new module called meson-clkc-utils thatwill contain shared utility functions for all Amlogic clockcontroller drivers.The first utility function is a replacement of of_clk_hw_onecell_getin order to get rid of the NR_CLKS define in all Amlogic clockdrivers.The goal is to move all duplicate probe and init code in this module.[jbrunet: Fixed MODULE_LICENCE checkpatch warning]Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-1-38172d17c27a@linaro.orgSigned-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

84af9144 - clk: meson: a1: add Amlogic A1 Peripherals clock controller driver

Tue, 23 May 2023 13:53:51 +0000

clk: meson: a1: add Amlogic A1 Peripherals clock controller driverIntroduce Peripherals clock controller for Amlogic A1 SoC family.A1 SoC has four clock controllers on the board: PLL, Peripherals, CPU,and Audio.This patchset adds support for Amlogic A1 Peripherals clock driver andallows to generate clocks for all A1 SoC peripheral IPs.Signed-off-by: Jian Hu Signed-off-by: Dmitry Rokosov Reviewed-by: Martin Blumenstingl Link: https://lore.kernel.org/r/20230523135351.19133-7-ddrokosov@sberdevices.ruSigned-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

28f3be51 - clk: meson: a1: add Amlogic A1 PLL clock controller driver

Tue, 23 May 2023 13:53:49 +0000

clk: meson: a1: add Amlogic A1 PLL clock controller driverIntroduce PLL clock controller for Amlogic A1 SoC family.The clock unit is an APB slave module that is designed for generating allof the internal and system clocks.The SoC uses an external 24MHz crystal; there are 4 internal PLLs:SYS_PLL/HIFI_PLL/USB_PLL/(FIXPLL), these PLLs generate 27 clock sources.Signed-off-by: Jian Hu Signed-off-by: Dmitry Rokosov Reviewed-by: Martin Blumenstingl Link: https://lore.kernel.org/r/20230523135351.19133-5-ddrokosov@sberdevices.ruSigned-off-by: Jerome Brunet List of files: /linux-6.15/drivers/clk/meson/Kconfig

20425f63 - clk: meson: enable building as modules

Wed, 18 Nov 2020 19:14:05 +0000

clk: meson: enable building as modulesMake it possible to build all clk drivers as modules, but defaultremains built-in.No functional changes.Signed-off-by: Kevin Hilman Signed-off-by: Jerome Brunet Acked-by: Stephen Boyd Link: https://lore.kernel.org/r/20201118191405.36798-1-khilman@baylibre.com List of files: /linux-6.15/drivers/clk/meson/Kconfig

bae69bfa - clk: meson: Kconfig: fix dependency for G12A

Wed, 18 Nov 2020 19:09:30 +0000

clk: meson: Kconfig: fix dependency for G12AWhen building only G12A, ensure that VID_PLL_DIV clock driver isselected, otherwise results in this build error:ERROR: modpost: "meson_vid_pll_div_ro_ops" [drivers/clk/meson/g12a.ko] undefined!Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")Signed-off-by: Kevin Hilman Signed-off-by: Jerome Brunet Link: https://lore.kernel.org/r/20201118190930.34352-1-khilman@baylibre.com List of files: /linux-6.15/drivers/clk/meson/Kconfig