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    <title>Changes in Makefile</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>0bd9b121 - clk: mediatek: Add drivers for MT6735 syscon clock and reset controllers</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#0bd9b121</link>
        <description>clk: mediatek: Add drivers for MT6735 syscon clock and reset controllersAdd drivers for IMGSYS, MFGCFG, VDECSYS and VENCSYS clocks and resetson MT6735.Signed-off-by: Yassine Oudjana &lt;y.oudjana@protonmail.com&gt;Link: https://lore.kernel.org/r/20241106111402.200940-3-y.oudjana@protonmail.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Wed, 06 Nov 2024 11:14:37 +0000</pubDate>
        <dc:creator>Yassine Oudjana &lt;y.oudjana@protonmail.com&gt;</dc:creator>
    </item>
<item>
        <title>43c04ed7 - clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#43c04ed7</link>
        <description>clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset driversAdd drivers for MT6735 apmixedsys, topckgen, infracfg and pericfgclock and reset controllers. These provide the base clocks and resetson the platform, enough to bring up all essential blocks includingPWRAP, MSDC and peripherals (UART, I2C, SPI).Signed-off-by: Yassine Oudjana &lt;y.oudjana@protonmail.com&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20241017071708.38663-3-y.oudjana@protonmail.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Thu, 17 Oct 2024 07:17:06 +0000</pubDate>
        <dc:creator>Yassine Oudjana &lt;y.oudjana@protonmail.com&gt;</dc:creator>
    </item>
<item>
        <title>4b471943 - clk: mediatek: add drivers for MT7988 SoC</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#4b471943</link>
        <description>clk: mediatek: add drivers for MT7988 SoCAdd APMIXED, ETH, INFRACFG and TOPCKGEN clock drivers which aretypical MediaTek designs.Also add driver for XFIPLL clock generating the 156.25MHz clock forthe XFI SerDes. It needs an undocumented software workaround and hasan unknown internal design.Signed-off-by: Sam Shih &lt;sam.shih@mediatek.com&gt;Signed-off-by: Daniel Golle &lt;daniel@makrotopia.org&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/c7574d808e2da1a530182f0fd790c1337c336e1b.1702849494.git.daniel@makrotopia.org[sboyd@kernel.org: Add module license to infracfg file]Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Sun, 17 Dec 2023 21:50:15 +0000</pubDate>
        <dc:creator>Sam Shih &lt;sam.shih@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>0d2f2cef - clk: mediatek: Add MT8188 adsp clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#0d2f2cef</link>
        <description>clk: mediatek: Add MT8188 adsp clock supportAdd MT8188 adsp clock controller which provides clock gatecontrol for Audio DSP.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-20-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:21 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>1b5e5299 - clk: mediatek: Add MT8188 imp i2c wrapper clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#1b5e5299</link>
        <description>clk: mediatek: Add MT8188 imp i2c wrapper clock supportAdd MT8188 imp i2c wrapper clock controllers which provide clock gatecontrol in I2C IP blocks.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-19-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:20 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>f42b9e9a - clk: mediatek: Add MT8188 wpesys clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#f42b9e9a</link>
        <description>clk: mediatek: Add MT8188 wpesys clock supportAdd MT8188 wpesys clock controllers which provide clock gatecontrol in Wrapping Engine.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-18-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:19 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>4898e77f - clk: mediatek: Add MT8188 vppsys1 clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#4898e77f</link>
        <description>clk: mediatek: Add MT8188 vppsys1 clock supportAdd MT8188 vppsys1 clock controller which provides clock gatecontroller for Video Processor Pipe.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;Reviewed-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-17-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:18 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>eb48cccd - clk: mediatek: Add MT8188 vppsys0 clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#eb48cccd</link>
        <description>clk: mediatek: Add MT8188 vppsys0 clock supportAdd MT8188 vppsys0 clock controller which provides clock gatecontroller for Video Processor Pipe.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;Reviewed-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-16-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:17 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>bb87c110 - clk: mediatek: Add MT8188 vencsys clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#bb87c110</link>
        <description>clk: mediatek: Add MT8188 vencsys clock supportAdd MT8188 vencsys clock controllers which provide clock gatecontrol for video encoder.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-15-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:16 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>cfa4609f - clk: mediatek: Add MT8188 vdosys1 clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#cfa4609f</link>
        <description>clk: mediatek: Add MT8188 vdosys1 clock supportAdd MT8188 vdosys1 clock controller which provides clock gatecontrol in video system. This is integrated with mtk-mmsysdriver which will populate device by platform_device_register_datato start vdosys clock driver.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-14-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:15 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>e4aaa60e - clk: mediatek: Add MT8188 vdosys0 clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#e4aaa60e</link>
        <description>clk: mediatek: Add MT8188 vdosys0 clock supportAdd MT8188 vdosys0 clock controller which provides clock gatecontrol in video system. This is integrated with mtk-mmsysdriver which will populate device by platform_device_register_datato start vdosys clock driver.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-13-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:14 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>72753163 - clk: mediatek: Add MT8188 vdecsys clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#72753163</link>
        <description>clk: mediatek: Add MT8188 vdecsys clock supportAdd MT8188 vdec clock controllers which provide clock gatecontrol for video decoder.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-12-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:13 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>3e26f30f - clk: mediatek: Add MT8188 mfgcfg clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#3e26f30f</link>
        <description>clk: mediatek: Add MT8188 mfgcfg clock supportAdd MT8188 mfg clock controller which provides clock gatecontrol for GPU.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-11-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:12 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>49c9abe1 - clk: mediatek: Add MT8188 ipesys clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#49c9abe1</link>
        <description>clk: mediatek: Add MT8188 ipesys clock supportAdd MT8188 ipesys clock controller which provides clock gatecontrol for Image Process Engine.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-10-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:11 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>b281039a - clk: mediatek: Add MT8188 imgsys clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#b281039a</link>
        <description>clk: mediatek: Add MT8188 imgsys clock supportAdd MT8188 imgsys clock controllers which provide clock gatecontrol for image IP blocks.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-9-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:10 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>87d06fa9 - clk: mediatek: Add MT8188 ccusys clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#87d06fa9</link>
        <description>clk: mediatek: Add MT8188 ccusys clock supportAdd MT8188 ccusys clock controller which provides clock gatecontrol in Camera Computing Unit.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-8-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:09 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>9b428356 - clk: mediatek: Add MT8188 camsys clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#9b428356</link>
        <description>clk: mediatek: Add MT8188 camsys clock supportAdd MT8188 camsys clock controllers which provide clock gatecontrol for camera IP blocks.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-7-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:08 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>fce4c7a2 - clk: mediatek: Add MT8188 infrastructure clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#fce4c7a2</link>
        <description>clk: mediatek: Add MT8188 infrastructure clock supportAdd MT8188 infrastructure clock controller which providesclock gate control for basic IP like pwm, uart, spi and so on.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-6-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:07 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>643c06dc - clk: mediatek: Add MT8188 peripheral clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#643c06dc</link>
        <description>clk: mediatek: Add MT8188 peripheral clock supportAdd MT8188 peripheral clock controller which provides clockgate control for ethernet/flashif/pcie/ssusb.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-5-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:06 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>6c0d1dc2 - clk: mediatek: Add MT8188 topckgen clock support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/mediatek/Makefile#6c0d1dc2</link>
        <description>clk: mediatek: Add MT8188 topckgen clock supportAdd MT8188 topckgen clock controller which provides muxes, dividersto handle variety clock selection in other IP blocks.Signed-off-by: Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;Link: https://lore.kernel.org/r/20230331123621.16167-4-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/mediatek/Makefile</description>
        <pubDate>Fri, 31 Mar 2023 12:36:05 +0000</pubDate>
        <dc:creator>Garmin.Chang &lt;Garmin.Chang@mediatek.com&gt;</dc:creator>
    </item>
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