Changes in Kconfig

0bd9b121 - clk: mediatek: Add drivers for MT6735 syscon clock and reset controllers

Wed, 06 Nov 2024 11:14:37 +0000

clk: mediatek: Add drivers for MT6735 syscon clock and reset controllersAdd drivers for IMGSYS, MFGCFG, VDECSYS and VENCSYS clocks and resetson MT6735.Signed-off-by: Yassine Oudjana Link: https://lore.kernel.org/r/20241106111402.200940-3-y.oudjana@protonmail.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

43c04ed7 - clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers

Thu, 17 Oct 2024 07:17:06 +0000

clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset driversAdd drivers for MT6735 apmixedsys, topckgen, infracfg and pericfgclock and reset controllers. These provide the base clocks and resetson the platform, enough to bring up all essential blocks includingPWRAP, MSDC and peripherals (UART, I2C, SPI).Signed-off-by: Yassine Oudjana Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20241017071708.38663-3-y.oudjana@protonmail.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

98619dc3 - clk: mediatek: drop two dead config options

Fri, 27 Sep 2024 09:22:32 +0000

clk: mediatek: drop two dead config optionsCommit 0f471d31e5e8 ("clk: mediatek: Split MT8195 clock drivers and allowmodule build") adds a number of new COMMON_CLK_MT8195_* config options.Among those, the config options COMMON_CLK_MT8195_AUDSYS andCOMMON_CLK_MT8195_MSDC have no reference in the source tree and are notused in the Makefile to include a specific file.Drop the dead config options COMMON_CLK_MT8195_AUDSYS andCOMMON_CLK_MT8195_MSDC.Fixes: 0f471d31e5e8 ("clk: mediatek: Split MT8195 clock drivers and allow module build")Signed-off-by: Lukas Bulwahn Link: https://lore.kernel.org/r/20240927092232.386511-1-lukas.bulwahn@redhat.comReviewed-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

4b471943 - clk: mediatek: add drivers for MT7988 SoC

Sun, 17 Dec 2023 21:50:15 +0000

clk: mediatek: add drivers for MT7988 SoCAdd APMIXED, ETH, INFRACFG and TOPCKGEN clock drivers which aretypical MediaTek designs.Also add driver for XFIPLL clock generating the 156.25MHz clock forthe XFI SerDes. It needs an undocumented software workaround and hasan unknown internal design.Signed-off-by: Sam Shih Signed-off-by: Daniel Golle Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/c7574d808e2da1a530182f0fd790c1337c336e1b.1702849494.git.daniel@makrotopia.org[sboyd@kernel.org: Add module license to infracfg file]Signed-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

5f17cdb0 - clk: mediatek: Enable all MT8192 clocks by default

Fri, 21 Apr 2023 11:11:25 +0000

clk: mediatek: Enable all MT8192 clocks by defaultCurrently the base MT8192 clock drivers are enabled by default, but allthe other clock drivers need to be enabled by hand. This is extremelyconfusing and inconvenient for end users. For the MT8192 platform to beuseful, most if not all the clock drivers driving the hardware blocksneed to be enabled.Enable them by default whenever MT8192 base clock driver is enabled.Signed-off-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20230421111125.2397368-1-wenst@chromium.orgReviewed-by: Nícolas F. R. A. Prado Reviewed-by: Alexandre Mergnat Signed-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

0d2f2cef - clk: mediatek: Add MT8188 adsp clock support

Fri, 31 Mar 2023 12:36:21 +0000

clk: mediatek: Add MT8188 adsp clock supportAdd MT8188 adsp clock controller which provides clock gatecontrol for Audio DSP.Signed-off-by: Garmin.Chang Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230331123621.16167-20-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

1b5e5299 - clk: mediatek: Add MT8188 imp i2c wrapper clock support

Fri, 31 Mar 2023 12:36:20 +0000

clk: mediatek: Add MT8188 imp i2c wrapper clock supportAdd MT8188 imp i2c wrapper clock controllers which provide clock gatecontrol in I2C IP blocks.Signed-off-by: Garmin.Chang Reviewed-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230331123621.16167-19-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

f42b9e9a - clk: mediatek: Add MT8188 wpesys clock support

Fri, 31 Mar 2023 12:36:19 +0000

clk: mediatek: Add MT8188 wpesys clock supportAdd MT8188 wpesys clock controllers which provide clock gatecontrol in Wrapping Engine.Signed-off-by: Garmin.Chang Reviewed-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230331123621.16167-18-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

eb48cccd - clk: mediatek: Add MT8188 vppsys0 clock support

Fri, 31 Mar 2023 12:36:17 +0000

clk: mediatek: Add MT8188 vppsys0 clock supportAdd MT8188 vppsys0 clock controller which provides clock gatecontroller for Video Processor Pipe.Signed-off-by: Garmin.Chang Reviewed-by: Matthias Brugger Reviewed-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230331123621.16167-16-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

bb87c110 - clk: mediatek: Add MT8188 vencsys clock support

Fri, 31 Mar 2023 12:36:16 +0000

clk: mediatek: Add MT8188 vencsys clock supportAdd MT8188 vencsys clock controllers which provide clock gatecontrol for video encoder.Signed-off-by: Garmin.Chang Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230331123621.16167-15-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

e4aaa60e - clk: mediatek: Add MT8188 vdosys0 clock support

Fri, 31 Mar 2023 12:36:14 +0000

clk: mediatek: Add MT8188 vdosys0 clock supportAdd MT8188 vdosys0 clock controller which provides clock gatecontrol in video system. This is integrated with mtk-mmsysdriver which will populate device by platform_device_register_datato start vdosys clock driver.Signed-off-by: Garmin.Chang Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230331123621.16167-13-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

72753163 - clk: mediatek: Add MT8188 vdecsys clock support

Fri, 31 Mar 2023 12:36:13 +0000

clk: mediatek: Add MT8188 vdecsys clock supportAdd MT8188 vdec clock controllers which provide clock gatecontrol for video decoder.Signed-off-by: Garmin.Chang Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230331123621.16167-12-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

3e26f30f - clk: mediatek: Add MT8188 mfgcfg clock support

Fri, 31 Mar 2023 12:36:12 +0000

clk: mediatek: Add MT8188 mfgcfg clock supportAdd MT8188 mfg clock controller which provides clock gatecontrol for GPU.Signed-off-by: Garmin.Chang Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230331123621.16167-11-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

49c9abe1 - clk: mediatek: Add MT8188 ipesys clock support

Fri, 31 Mar 2023 12:36:11 +0000

clk: mediatek: Add MT8188 ipesys clock supportAdd MT8188 ipesys clock controller which provides clock gatecontrol for Image Process Engine.Signed-off-by: Garmin.Chang Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230331123621.16167-10-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

b281039a - clk: mediatek: Add MT8188 imgsys clock support

Fri, 31 Mar 2023 12:36:10 +0000

clk: mediatek: Add MT8188 imgsys clock supportAdd MT8188 imgsys clock controllers which provide clock gatecontrol for image IP blocks.Signed-off-by: Garmin.Chang Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230331123621.16167-9-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

9b428356 - clk: mediatek: Add MT8188 camsys clock support

Fri, 31 Mar 2023 12:36:08 +0000

clk: mediatek: Add MT8188 camsys clock supportAdd MT8188 camsys clock controllers which provide clock gatecontrol for camera IP blocks.Signed-off-by: Garmin.Chang Reviewed-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230331123621.16167-7-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

28b2bc99 - clk: mediatek: Add MT8188 apmixedsys clock support

Fri, 31 Mar 2023 12:36:04 +0000

clk: mediatek: Add MT8188 apmixedsys clock supportAdd MT8188 apmixedsys clock controller which provides Pllsgenerated from SoC 26m and ssusb clock gate control.Signed-off-by: Garmin.Chang Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230331123621.16167-3-Garmin.Chang@mediatek.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

92717003 - clk: mediatek: mt81xx: Ensure fhctl code is available

Mon, 20 Mar 2023 09:13:42 +0000

clk: mediatek: mt81xx: Ensure fhctl code is availableJust like in commit eddc63094855 ("clk: mediatek: Ensure fhctl code isavailable for COMMON_CLK_MT6795"), these three need the shared drivercode, otherwise they run into link errors such as:aarch64-linux/bin/aarch64-linux-ld: drivers/clk/mediatek/clk-mt8192-apmixedsys.o: in function `clk_mt8192_apmixed_probe':clk-mt8192-apmixedsys.c:(.text+0x134): undefined reference to `fhctl_parse_dt'Fixes: 45a5cbe05d1f ("clk: mediatek: mt8173: Add support for frequency hopping through FHCTL")Fixes: 4d586e10c428 ("clk: mediatek: mt8192: Add support for frequency hopping through FHCTL")Fixes: da4a82dc67b0 ("clk: mediatek: mt8195: Add support for frequency hopping through FHCTL")Signed-off-by: Arnd Bergmann Link: https://lore.kernel.org/r/20230320091353.1918439-1-arnd@kernel.orgReviewed-by: AngeloGioacchino Del Regno Reported-by: kernel test robot Signed-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

eddc6309 - clk: mediatek: Ensure fhctl code is available for COMMON_CLK_MT6795

Thu, 16 Mar 2023 23:11:18 +0000

clk: mediatek: Ensure fhctl code is available for COMMON_CLK_MT6795Without this select we get linker errors when linkingclk-mt6795-apmixedsysarm-linux-gnueabi-ld: drivers/clk/mediatek/clk-mt6795-apmixedsys.o: in function `clk_mt6795_apmixed_remove':clk-mt6795-apmixedsys.c:(.text+0x34): undefined reference to `mtk_clk_unregister_pllfhs'arm-linux-gnueabi-ld: drivers/clk/mediatek/clk-mt6795-apmixedsys.o: in function `clk_mt6795_apmixed_probe':clk-mt6795-apmixedsys.c:(.text+0x98): undefined reference to `fhctl_parse_dt'arm-linux-gnueabi-ld: clk-mt6795-apmixedsys.c:(.text+0xb8): undefined reference to `mtk_clk_register_pllfhs'arm-linux-gnueabi-ld: clk-mt6795-apmixedsys.c:(.text+0x1c4): undefined reference to `mtk_clk_unregister_pllfhs'Fixes: f222a1baec5f ("clk: mediatek: mt6795: Add support for frequency hopping through FHCTL")Cc: AngeloGioacchino Del Regno Cc: Chen-Yu Tsai Signed-off-by: Stephen Boyd Link: https://lore.kernel.org/r/20230316231118.2579242-1-sboyd@kernel.org List of files: /linux-6.15/drivers/clk/mediatek/Kconfig

10966457 - clk: mediatek: mt8135: Convert to simple probe and enable module build

Mon, 06 Mar 2023 14:05:43 +0000

clk: mediatek: mt8135: Convert to simple probe and enable module buildConvert the MT8135 clock drivers to platform_driver using the commonsimple probe mechanism; special note goes to the introduction ofdummy clocks with ID 0 (where 0 is the first entry of a clock array)for each clock controller: this was necessary because of a mistakein the bindings for all MT8135 clock controllers, where the firstclock has ID 1 (hence, array would start from element 1) instead ofzero.Now that all of the MT8135 clock drivers (including apmixedsys) canbe compiled as modules, change the COMMON_CLK_MT8135 configurationoption to tristate to enable module build.While at it, also remove the __initconst annotation from all of theclock arrays as they are not only used during init anymore, but alsoduring runtime.Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20230306140543.1813621-55-angelogioacchino.delregno@collabora.comSigned-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/mediatek/Kconfig