Changes in Makefile

ec8f24b7 - treewide: Add SPDX license identifier - Makefile/Kconfig

Sun, 19 May 2019 12:07:45 +0000

treewide: Add SPDX license identifier - Makefile/KconfigAdd SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any formThese files fall under the project license, GPL v2 only. The resulting SPDXlicense identifier is: GPL-2.0-onlySigned-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman List of files: /linux-6.15/drivers/clk/axs10x/Makefile

6d7489c7 - clk: axs10x: introduce AXS10X pll driver

Wed, 21 Jun 2017 19:16:26 +0000

clk: axs10x: introduce AXS10X pll driverAXS10X boards manages it's clocks using various PLLs. These PLL has samedividers and corresponding control registers mapped to different addresses.So we add one common driver for such PLLs.Each PLL on AXS10X board consist of three dividers: IDIV, FBDIV andODIV. Output clock value is managed using these dividers.We add pre-defined tables with supported rate values and appropriateconfigurations of IDIV, FBDIV and ODIV for each value.As of today we add support for PLLs that generate clock for thefollowing devices: * ARC core on AXC CPU tiles. * ARC PGU on ARC SDP Mainboard.and more to come later.By this patch we add support for two plls (arc core pll and pgu pll),so we had to use two different init types: CLK_OF_DECLARE for arc core pll andregular probing for pgu pll.Acked-by: Rob Herring Acked-by: Jose Abreu Signed-off-by: Eugeniy Paltsev Signed-off-by: Vlad Zakharov Signed-off-by: Jose Abreu [sboyd@codeaurora.org: Silence dubious !x & y sparse warning,make of_axs10x_pll_clk_setup() unregister clk on failure]Signed-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/axs10x/Makefile

923587aa - clk/axs10x: Add I2S PLL clock driver

Mon, 02 May 2016 09:39:05 +0000

clk/axs10x: Add I2S PLL clock driverThe ARC SDP I2S clock can be programmed using aspecific PLL.This patch has the goal of adding a clock driverthat programs this PLL.At this moment the rate values are hardcoded ina table but in the future it would be ideal touse a function which determines the PLL valuesgiven the desired rate.Signed-off-by: Jose Abreu Acked-by: Rob Herring Signed-off-by: Stephen Boyd List of files: /linux-6.15/drivers/clk/axs10x/Makefile