<?xml version="1.0"?>
<?xml-stylesheet type="text/xsl" href="/rss.xsl.xml"?>
<rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/">
<channel>
    <title>Changes in Makefile</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>25d90494 - clk: eyeq: add driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#25d90494</link>
        <description>clk: eyeq: add driverAdd Mobileye EyeQ5, EyeQ6L and EyeQ6H clock controller driver. It isboth a platform driver and a hook onto of_clk_init() used for clocksrequired early (GIC timer, UARTs).For some compatible, it is both at the same time. eqc_early_init()initialises early PLLs and exposes its own clock provider. It marksother clocks as deferred. eqc_probe() adds all remaining clocks usinganother clock provider.It exposes read-only PLLs derived from the main crystal on board.It also exposes another type of clocks: divider clocks.They always have even divisors and have one PLL as parent.This driver also bears the responsability for optional reset and pinctrlauxiliary devices. The match data attached to the devicetree nodecompatible indicate if such devices should be created. They all getpassed a pointer to the start of the OLB region.Signed-off-by: Th&#233;o Lebrun &lt;theo.lebrun@bootlin.com&gt;Link: https://lore.kernel.org/r/20241023-mbly-clk-v6-1-ca83e43daf93@bootlin.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Wed, 23 Oct 2024 10:58:40 +0000</pubDate>
        <dc:creator>Th&#233;o Lebrun &lt;theo.lebrun@bootlin.com&gt;</dc:creator>
    </item>
<item>
        <title>e0b255df - clk: npcm8xx: add clock controller</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#e0b255df</link>
        <description>clk: npcm8xx: add clock controllerAdd auxiliary driver to support Nuvoton Arbel BMC NPCM8XX contains anintegrated clock controller which generates and supplies clocks to allmodules within the BMC.The NPCM8xx clock controller is created using the auxiliary deviceframework and set up in the npcm reset driver since the NPCM8xx clock isusing the same register region.Signed-off-by: Tomer Maimon &lt;tmaimon77@gmail.com&gt;Tested-by: Benjamin Fair &lt;benjaminfair@google.com&gt;Reviewed-by: Stephen Boyd &lt;sboyd@kernel.org&gt;Link: https://lore.kernel.org/r/20240912191038.981105-4-tmaimon77@gmail.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Thu, 12 Sep 2024 19:10:38 +0000</pubDate>
        <dc:creator>Tomer Maimon &lt;tmaimon77@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>e978201b - clk: test: Add KUnit tests for clock-assigned-rates{-u64} DT properties</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#e978201b</link>
        <description>clk: test: Add KUnit tests for clock-assigned-rates{-u64} DT propertiesAdd unit tests for the two types of assigned rate properties. Testdifferent combinations of assigned clocks and make sure that ratesaren&apos;t assigned when the DT properties are malformed or are zero.Cc: Peng Fan &lt;peng.fan@nxp.com&gt;Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;Link: https://lore.kernel.org/r/20240822002433.1163814-4-sboyd@kernel.org

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Thu, 22 Aug 2024 00:24:30 +0000</pubDate>
        <dc:creator>Stephen Boyd &lt;sboyd@kernel.org&gt;</dc:creator>
    </item>
<item>
        <title>8a6b7e2b - clk: ep93xx: add DT support for Cirrus EP93xx</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#8a6b7e2b</link>
        <description>clk: ep93xx: add DT support for Cirrus EP93xxRewrite EP93xx clock driver located in arch/arm/mach-ep93xx/clock.ctrying to do everything the device tree way:- provide clock acces via of- drop clk_hw_register_clkdev- drop init code and use module_auxiliary_driverCo-developed-by: Alexander Sverdlin &lt;alexander.sverdlin@gmail.com&gt;Signed-off-by: Alexander Sverdlin &lt;alexander.sverdlin@gmail.com&gt;Signed-off-by: Nikita Shubin &lt;nikita.shubin@maquefel.me&gt;Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Mon, 09 Sep 2024 08:10:28 +0000</pubDate>
        <dc:creator>Nikita Shubin &lt;nikita.shubin@maquefel.me&gt;</dc:creator>
    </item>
<item>
        <title>274aff87 - clk: Add KUnit tests for clks registered with struct clk_parent_data</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#274aff87</link>
        <description>clk: Add KUnit tests for clks registered with struct clk_parent_dataTest that clks registered with &apos;struct clk_parent_data&apos; work asintended and can find their parents.Cc: Christian Marangi &lt;ansuelsmth@gmail.com&gt;Cc: Brendan Higgins &lt;brendan.higgins@linux.dev&gt;Reviewed-by: David Gow &lt;davidgow@google.com&gt;Cc: Rae Moar &lt;rmoar@google.com&gt;Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;Link: https://lore.kernel.org/r/20240718210513.3801024-9-sboyd@kernel.org

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Thu, 18 Jul 2024 21:05:07 +0000</pubDate>
        <dc:creator>Stephen Boyd &lt;sboyd@kernel.org&gt;</dc:creator>
    </item>
<item>
        <title>5776526b - clk: Add KUnit tests for clk fixed rate basic type</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#5776526b</link>
        <description>clk: Add KUnit tests for clk fixed rate basic typeTest that the fixed rate basic type clk works as intended.Cc: Brendan Higgins &lt;brendan.higgins@linux.dev&gt;Cc: David Gow &lt;davidgow@google.com&gt;Cc: Rae Moar &lt;rmoar@google.com&gt;Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;Link: https://lore.kernel.org/r/20240718210513.3801024-8-sboyd@kernel.org

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Thu, 18 Jul 2024 21:05:06 +0000</pubDate>
        <dc:creator>Stephen Boyd &lt;sboyd@kernel.org&gt;</dc:creator>
    </item>
<item>
        <title>d690bd11 - clk: Add test managed clk provider/consumer APIs</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#d690bd11</link>
        <description>clk: Add test managed clk provider/consumer APIsUnit tests are more ergonomic and simpler to understand if they don&apos;thave to hoist a bunch of code into the test harness init and exitfunctions. Add some test managed wrappers for the clk APIs so that clkunit tests can write more code in the actual test and less code in theharness.Only add APIs that are used for now. More wrappers can be added in thefuture as necessary.Cc: Brendan Higgins &lt;brendan.higgins@linux.dev&gt;Cc: David Gow &lt;davidgow@google.com&gt;Cc: Rae Moar &lt;rmoar@google.com&gt;Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;Link: https://lore.kernel.org/r/20240718210513.3801024-7-sboyd@kernel.org

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Thu, 18 Jul 2024 21:05:05 +0000</pubDate>
        <dc:creator>Stephen Boyd &lt;sboyd@kernel.org&gt;</dc:creator>
    </item>
<item>
        <title>ae81b69f - clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#ae81b69f</link>
        <description>clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocksAdd support for the AP sub-system clock controller in the T-Head TH1520.This include CPU, DPU, GMAC and TEE PLLs.Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdfCo-developed-by: Yangtao Li &lt;frank.li@vivo.com&gt;Signed-off-by: Yangtao Li &lt;frank.li@vivo.com&gt;Co-developed-by: Jisheng Zhang &lt;jszhang@kernel.org&gt;Signed-off-by: Jisheng Zhang &lt;jszhang@kernel.org&gt;Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docsSigned-off-by: Drew Fustini &lt;dfustini@tenstorrent.com&gt;Link: https://lore.kernel.org/r/20240711-th1520-clk-v3-2-6ff17bb318fb@tenstorrent.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Thu, 11 Jul 2024 16:56:20 +0000</pubDate>
        <dc:creator>Drew Fustini &lt;dfustini@tenstorrent.com&gt;</dc:creator>
    </item>
<item>
        <title>80fd61ec - clk: sophgo: Add clock support for CV1800 SoC</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#80fd61ec</link>
        <description>clk: sophgo: Add clock support for CV1800 SoCAdd clock definition and driver code for CV1800 SoC.Signed-off-by: Inochi Amaoto &lt;inochiama@outlook.com&gt;Link: https://github.com/milkv-duo/duo-files/blob/6f4e9b8ecb459e017cca1a8df248a19ca70837a3/duo/datasheet/CV180X-Clock-v1.xlsxLink: https://github.com/milkv-duo/duo-files/blob/6f4e9b8ecb459e017cca1a8df248a19ca70837a3/duo/datasheet/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdfLink: https://lore.kernel.org/r/IA1PR20MB49534F37F802CAF117364D66BB262@IA1PR20MB4953.namprd20.prod.outlook.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Sat, 09 Mar 2024 09:02:52 +0000</pubDate>
        <dc:creator>Inochi Amaoto &lt;inochiama@outlook.com&gt;</dc:creator>
    </item>
<item>
        <title>3ac7ca59 - clk: stm32mp1: move stm32mp1 clock driver into stm32 directory</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#3ac7ca59</link>
        <description>clk: stm32mp1: move stm32mp1 clock driver into stm32 directoryMove all STM32MP clock drivers into same directory (stm32).Signed-off-by: Gabriel Fernandez &lt;gabriel.fernandez@foss.st.com&gt;Link: https://lore.kernel.org/r/20231208143700.354785-2-gabriel.fernandez@foss.st.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Fri, 08 Dec 2023 14:36:56 +0000</pubDate>
        <dc:creator>Gabriel Fernandez &lt;gabriel.fernandez@foss.st.com&gt;</dc:creator>
    </item>
<item>
        <title>4eb15b03 - clk: twl: add clock driver for TWL6032</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#4eb15b03</link>
        <description>clk: twl: add clock driver for TWL6032The TWL6032 has some clock outputs which are controlled likefixed-voltage regulators, in some drivers for these chipsfound in the wild, just the regulator api is abused for controllingthem, so simply use something similar to the regulator functions.Due to a lack of hardware available for testing, leave out theTWL6030-specific part of those functions.Signed-off-by: Andreas Kemnade &lt;andreas@kemnade.info&gt;Link: https://lore.kernel.org/r/20230916100515.1650336-5-andreas@kemnade.infoSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Sat, 16 Sep 2023 10:05:14 +0000</pubDate>
        <dc:creator>Andreas Kemnade &lt;andreas@kemnade.info&gt;</dc:creator>
    </item>
<item>
        <title>2790e2a3 - clk: fractional-divider: tests: Add test suite for edge cases</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#2790e2a3</link>
        <description>clk: fractional-divider: tests: Add test suite for edge casesIn light of the recent discovery that the fractional divisorapproximation does not utilize the full available range for clocks thatare flagged CLK_FRAC_DIVIDER_ZERO_BASED [1], implement tests for theedge cases of this clock type.Signed-off-by: Frank Oltmanns &lt;frank@oltmanns.dev&gt;Link: https://lore.kernel.org/lkml/20230529133433.56215-1-frank@oltmanns.dev [1]Link: https://lore.kernel.org/r/20230617131041.18313-3-frank@oltmanns.dev[sboyd@kernel.org: Rename suite and tests slightly, drop unusedincludes, store parent rate to compare instead of repeating equation]Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Sat, 17 Jun 2023 13:10:41 +0000</pubDate>
        <dc:creator>Frank Oltmanns &lt;frank@oltmanns.dev&gt;</dc:creator>
    </item>
<item>
        <title>6e9aff55 - clk: Add support for versa3 clock driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#6e9aff55</link>
        <description>clk: Add support for versa3 clock driverAdd support for Renesas versa3 clock driver(5p35023).The clock generator provides 6 output clocks.Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;Link: https://lore.kernel.org/r/20230705171000.85786-3-biju.das.jz@bp.renesas.com[sboyd@kernel.org: Add newline to printk]Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Wed, 05 Jul 2023 17:10:00 +0000</pubDate>
        <dc:creator>Biju Das &lt;biju.das.jz@bp.renesas.com&gt;</dc:creator>
    </item>
<item>
        <title>22250dca - clk: oxnas: remove obsolete clock driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#22250dca</link>
        <description>clk: oxnas: remove obsolete clock driverDue to lack of maintenance and stall of development for a few years now,and since no new features will ever be added upstream, remove supportfor OX810 and OX820 clock driver.Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;Acked-by: Daniel Golle &lt;daniel@makrotopia.org&gt;Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;Link: https://lore.kernel.org/r/20230630-topic-oxnas-upstream-remove-v2-1-fb6ab3dea87c@linaro.orgSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Fri, 30 Jun 2023 16:58:26 +0000</pubDate>
        <dc:creator>Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</dc:creator>
    </item>
<item>
        <title>691521a3 - clk: nuvoton: Add clock driver for ma35d1 clock controller</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#691521a3</link>
        <description>clk: nuvoton: Add clock driver for ma35d1 clock controllerThe clock controller generates clocks for the whole chip, includingsystem clocks and all peripheral clocks. This driver support ma35d1clock gating, divider, and individual PLL configuration.There are 6 PLLs in ma35d1 SoC:  - CA-PLL for the two Cortex-A35 CPU clock  - SYS-PLL for system bus, which comes from the companion MCU    and cannot be programmed by clock controller.  - DDR-PLL for DDR  - EPLL for GMAC and GFX, Display, and VDEC IPs.  - VPLL for video output pixel clock  - APLL for SDHC, I2S audio, and other IPs.CA-PLL has only one operation mode.DDR-PLL, EPLL, VPLL, and APLL are advanced PLLs which have 3operation modes: integer mode, fraction mode, and spread specturm mode.Signed-off-by: Jacky Huang &lt;ychuang3@nuvoton.com&gt;Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Mon, 05 Jun 2023 04:07:47 +0000</pubDate>
        <dc:creator>Jacky Huang &lt;ychuang3@nuvoton.com&gt;</dc:creator>
    </item>
<item>
        <title>c61f19ec - clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#c61f19ec</link>
        <description>clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVEUsing ARCH_FOO symbol is preferred than SOC_FOO.Set obj-y for starfive/ in Makefile, so the StarFive driverscan be compiled with COMPILE_TEST=y but ARCH_STARFIVE=n.Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;Reviewed-by: Heiko Stuebner &lt;heiko.stuebner@vrull.eu&gt;Reviewed-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;Signed-off-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Sat, 01 Apr 2023 11:19:15 +0000</pubDate>
        <dc:creator>Hal Feng &lt;hal.feng@starfivetech.com&gt;</dc:creator>
    </item>
<item>
        <title>acc0ccff - clk: clk-loongson2: add clock controller driver support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#acc0ccff</link>
        <description>clk: clk-loongson2: add clock controller driver supportThis driver provides support for clock controller on Loongson-2 SoC,the Loongson-2 SoC uses a 100MHz clock as the PLL reference clock,there are five independent PLLs inside, each of which PLL canprovide up to three sets of frequency dependent clock outputs.Signed-off-by: Yinbo Zhu &lt;zhuyinbo@loongson.cn&gt;Link: https://lore.kernel.org/r/20230323025229.2971-2-zhuyinbo@loongson.cnSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Thu, 23 Mar 2023 02:52:29 +0000</pubDate>
        <dc:creator>Yinbo Zhu &lt;zhuyinbo@loongson.cn&gt;</dc:creator>
    </item>
<item>
        <title>edc12763 - clk: si521xx: Clock driver for Skyworks Si521xx I2C PCIe clock generators</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#edc12763</link>
        <description>clk: si521xx: Clock driver for Skyworks Si521xx I2C PCIe clock generatorsAdd driver for the Skyworks Si521xx PCIe clock generators. Supported modelsare Si52144/Si52146/Si52147, tested model is Si52144. It should be possibleto add Si5213x series as well.Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;Link: https://lore.kernel.org/r/20230118191521.15544-2-marex@denx.de[sboyd@kernel.org: Make clk_ops const]Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Wed, 18 Jan 2023 19:15:21 +0000</pubDate>
        <dc:creator>Marek Vasut &lt;marex@denx.de&gt;</dc:creator>
    </item>
<item>
        <title>fbdb1873 - clk: loongson1: Re-implement the clock driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#fbdb1873</link>
        <description>clk: loongson1: Re-implement the clock driverRe-implement the clock driver for Loongson-1 toadd devicetree support and fit into the clock framework.Signed-off-by: Keguang Zhang &lt;keguang.zhang@gmail.com&gt;Link: https://lore.kernel.org/r/20230321111817.71756-4-keguang.zhang@gmail.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Tue, 21 Mar 2023 11:18:16 +0000</pubDate>
        <dc:creator>Keguang Zhang &lt;keguang.zhang@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>c4649611 - clk: loongson1: Remove the outdated driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/clk/Makefile#c4649611</link>
        <description>clk: loongson1: Remove the outdated driverRemove the outdated driver due to the following aspects.- no DT support- duplicate code across LS1B and LS1C- does not fit into the current clock frameworkSigned-off-by: Keguang Zhang &lt;keguang.zhang@gmail.com&gt;Link: https://lore.kernel.org/r/20230321111817.71756-3-keguang.zhang@gmail.comSigned-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/clk/Makefile</description>
        <pubDate>Tue, 21 Mar 2023 11:18:15 +0000</pubDate>
        <dc:creator>Keguang Zhang &lt;keguang.zhang@gmail.com&gt;</dc:creator>
    </item>
</channel>
</rss>
