Changes in Makefile

4462fbfe - perf/x86: Move branch classifier

Thu, 11 Aug 2022 12:29:56 +0000

perf/x86: Move branch classifierCommit 3e702ff6d1ea ("perf/x86: Add LBR software filter support for IntelCPUs") introduces a software branch filter which complements the hardwarebranch filter and adds an x86 branch classifier.Move the branch classifier to arch/x86/events/ so that it can be utilizedby other vendors for branch record filtering.Signed-off-by: Sandipan Das Signed-off-by: Peter Zijlstra (Intel) Link: https://lore.kernel.org/r/bae5b95470d6bd49f40954bd379f414f5afcb965.1660211399.git.sandipan.das@amd.com List of files: /linux-6.15/arch/x86/events/Makefile

16accae3 - perf/x86/rapl: Fix RAPL config variable bug

Thu, 28 May 2020 20:16:14 +0000

perf/x86/rapl: Fix RAPL config variable bugThis patch fixes a bug introduced by: fd3ae1e1587d6 ("perf/x86/rapl: Move RAPL support to common x86 code")The Kconfig variable name was wrong. It was missing the CONFIG_ prefix.Signed-off-by: Stephane Eranian Signed-off-by: Ingo Molnar Tested-by: Kim Phillips Acked-by: Peter Zijlstra Link: https://lore.kernel.org/r/20200528201614.250182-1-eranian@google.com List of files: /linux-6.15/arch/x86/events/Makefile

fd3ae1e1 - perf/x86/rapl: Move RAPL support to common x86 code

Wed, 27 May 2020 22:46:55 +0000

perf/x86/rapl: Move RAPL support to common x86 codeTo prepare for support of both Intel and AMD RAPL.As per the AMD PPR, Fam17h support Package RAPL counters to monitor power usage.The RAPL counter operates as with Intel RAPL, and as such it is beneficialto share the code.No change in functionality.Signed-off-by: Stephane Eranian Signed-off-by: Ingo Molnar Link: https://lore.kernel.org/r/20200527224659.206129-2-eranian@google.com List of files: /linux-6.15/arch/x86/events/Makefile

3a4ac121 - x86/perf: Add hardware performance events support for Zhaoxin CPU.

Mon, 13 Apr 2020 03:14:29 +0000

x86/perf: Add hardware performance events support for Zhaoxin CPU.Zhaoxin CPU has provided facilities for monitoring performancevia PMU (Performance Monitor Unit), but the functionality is unused so far.Therefore, add support for zhaoxin pmu to make performance relatedhardware events available.The PMU is mostly an Intel Architectural PerfMon-v2 with a novelerrata for the ZXC line. It supports the following events: ----------------------------------------------------------------------------------------------------------------------------------- Event | Event | Umask | Description | Select | | ----------------------------------------------------------------------------------------------------------------------------------- cpu-cycles | 82h | 00h | unhalt core clock instructions | 00h | 00h | number of instructions at retirement. cache-references | 15h | 05h | number of fillq pushs at the current cycle. cache-misses | 1ah | 05h | number of l2 miss pushed by fillq. branch-instructions | 28h | 00h | counts the number of branch instructions retired. branch-misses | 29h | 00h | mispredicted branch instructions at retirement. bus-cycles | 83h | 00h | unhalt bus clock stalled-cycles-frontend | 01h | 01h | Increments each cycle the # of Uops issued by the RAT to RS. stalled-cycles-backend | 0fh | 04h | RS0/1/2/3/45 empty L1-dcache-loads | 68h | 05h | number of retire/commit load. L1-dcache-load-misses | 4bh | 05h | retired load uops whose data source followed an L1 miss. L1-dcache-stores | 69h | 06h | number of retire/commit Store,no LEA L1-dcache-store-misses | 62h | 05h | cache lines in M state evicted out of L1D due to Snoop HitM or dirty line replacement. L1-icache-loads | 00h | 03h | number of l1i cache access for valid normal fetch,including un-cacheable access. L1-icache-load-misses | 01h | 03h | number of l1i cache miss for valid normal fetch,including un-cacheable miss. L1-icache-prefetches | 0ah | 03h | number of prefetch. L1-icache-prefetch-misses | 0bh | 03h | number of prefetch miss. dTLB-loads | 68h | 05h | number of retire/commit load dTLB-load-misses | 2ch | 05h | number of load operations miss all level tlbs and cause a tablewalk. dTLB-stores | 69h | 06h | number of retire/commit Store,no LEA dTLB-store-misses | 30h | 05h | number of store operations miss all level tlbs and cause a tablewalk. dTLB-prefetches | 64h | 05h | number of hardware pte prefetch requests dispatched out of the prefetch FIFO. dTLB-prefetch-misses | 65h | 05h | number of hardware pte prefetch requests miss the l1d data cache. iTLB-load | 00h | 00h | actually counter instructions. iTLB-load-misses | 34h | 05h | number of code operations miss all level tlbs and cause a tablewalk. -----------------------------------------------------------------------------------------------------------------------------------Reported-by: kbuild test robot Signed-off-by: CodyYao-oc Signed-off-by: Peter Zijlstra (Intel) Link: https://lkml.kernel.org/r/1586747669-4827-1-git-send-email-CodyYao-oc@zhaoxin.com List of files: /linux-6.15/arch/x86/events/Makefile

98253a54 - perf/x86: Add MSR probe interface

Sun, 16 Jun 2019 14:03:51 +0000

perf/x86: Add MSR probe interfaceAdding perf_msr_probe function to provide interface forchecking up on MSR register and set the related attributegroup visibility.User defines following struct for each MSR register: struct perf_msr { u64 msr; struct attribute_group *grp; bool (*test)(int idx, void *data); bool no_check; };Where: msr - is the MSR address attrs - is attribute groups array to add if the check passed test - is test function pointer no_check - is bool that bypass the check and adds the attribute without any testThe array of struct perf_msr is passed into: perf_msr_probe(struct perf_msr *msr, int cnt, bool zero, void *data)Together with: cnt - which is the number of struct msr array elements data - which is user pointer passed to the test function zero - allow counters that returns zero on rdmsrThe perf_msr_probe will executed test code, read the MSR andcheck the value is != 0. If all these tests pass, relatedattribute group is kept visible.Also adding PMU_EVENT_GROUP macro helper to define attributegroup for single attribute. It will be used in following patches.Signed-off-by: Jiri Olsa Signed-off-by: Peter Zijlstra (Intel) Cc: Alexander Shishkin Cc: Andy Lutomirski Cc: Arnaldo Carvalho de Melo Cc: Arnaldo Carvalho de Melo Cc: Borislav Petkov Cc: Greg Kroah-Hartman Cc: Jiri Olsa Cc: Kan Cc: LiangCc: Linus Torvalds Cc: Namhyung Kim Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: https://lkml.kernel.org/r/20190616140358.27799-2-jolsa@kernel.orgSigned-off-by: Ingo Molnar List of files: /linux-6.15/arch/x86/events/Makefile

ec8f24b7 - treewide: Add SPDX license identifier - Makefile/Kconfig

Sun, 19 May 2019 12:07:45 +0000

treewide: Add SPDX license identifier - Makefile/KconfigAdd SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any formThese files fall under the project license, GPL v2 only. The resulting SPDXlicense identifier is: GPL-2.0-onlySigned-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman List of files: /linux-6.15/arch/x86/events/Makefile

612f0c0b - perf/x86/events: Add an AMD-specific Makefile

Thu, 26 Jan 2017 08:08:19 +0000

perf/x86/events: Add an AMD-specific MakefileMove the AMD pieces from the generic Makefile so that $ make arch/x86/events/amd/.scan work too. Otherwise you get: $ make arch/x86/events/amd/ibs.s scripts/Makefile.build:44: arch/x86/events/amd/Makefile: No such file or directory make[1]: *** No rule to make target 'arch/x86/events/amd/Makefile'. Stop. Makefile:1636: recipe for target 'arch/x86/events/amd/ibs.s' failed make: *** [arch/x86/events/amd/ibs.s] Error 2Signed-off-by: Borislav Petkov Signed-off-by: Peter Zijlstra (Intel) Cc: Alexander Shishkin Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/20170126080819.417-1-bp@alien8.deSigned-off-by: Ingo Molnar List of files: /linux-6.15/arch/x86/events/Makefile

e633c65a - x86/perf/intel/uncore: Make the Intel uncore PMU driver modular

Sun, 20 Mar 2016 08:33:36 +0000

x86/perf/intel/uncore: Make the Intel uncore PMU driver modularBy default, the uncore driver will be built into the kernel. If it isconfigured as a module, the supported CPU model can be auto loaded.This patch also cleans up the code of uncore_cpu_init() anduncore_pci_init().Based-on-a-patch-by: Thomas Gleixner Signed-off-by: Kan Liang Signed-off-by: Peter Zijlstra (Intel) Reviewed-by: Thomas Gleixner Cc: Alexander Shishkin Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Vince Weaver Link: http://lkml.kernel.org/r/1458462817-2475-1-git-send-email-kan.liang@intel.comSigned-off-by: Ingo Molnar List of files: /linux-6.15/arch/x86/events/Makefile

c7ab62bf - perf/x86/amd/power: Add AMD accumulated power reporting mechanism

Wed, 09 Mar 2016 05:45:06 +0000

perf/x86/amd/power: Add AMD accumulated power reporting mechanismIntroduce an AMD accumlated power reporting mechanism for the Family15h, Model 60h processor that can be used to calculate the averagepower consumed by a processor during a measurement interval. Thefeature support is indicated by CPUID Fn8000_0007_EDX[12].This feature will be implemented both in hwmon and perf. The currentdesign provides one event to report per package/processor powerconsumption by counting each compute unit power value.Here the gory details of how the computation is done:* Tsample: compute unit power accumulator sample period* Tref: the PTSC counter period (PTSC: performance timestamp counter)* N: the ratio of compute unit power accumulator sample period to the PTSC period* Jmax: max compute unit accumulated power which is indicated by MSR_C001007b[MaxCpuSwPwrAcc]* Jx/Jy: compute unit accumulated power which is indicated by MSR_C001007a[CpuSwPwrAcc]* Tx/Ty: the value of performance timestamp counter which is indicated by CU_PTSC MSR_C0010280[PTSC]* PwrCPUave: CPU average poweri. Determine the ratio of Tsample to Tref by executing CPUID Fn8000_0007. N = value of CPUID Fn8000_0007_ECX[CpuPwrSampleTimeRatio[15:0]].ii. Read the full range of the cumulative energy value from the new MSR MaxCpuSwPwrAcc. Jmax = value returned.iii. At time x, software reads CpuSwPwrAcc and samples the PTSC. Jx = value read from CpuSwPwrAcc and Tx = value read from PTSC.iv. At time y, software reads CpuSwPwrAcc and samples the PTSC. Jy = value read from CpuSwPwrAcc and Ty = value read from PTSC.v. Calculate the average power consumption for a compute unit overtime period (y-x). Unit of result is uWatt: if (Jy < Jx) // Rollover has occurred Jdelta = (Jy + Jmax) - Jx else Jdelta = Jy - Jx PwrCPUave = N * Jdelta * 1000 / (Ty - Tx)Simple example: root@hr-zp:/home/ray/tip# ./tools/perf/perf stat -a -e 'power/power-pkg/' make -j4 CHK include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK include/generated/utsrelease.h CHK include/generated/timeconst.h CHK include/generated/bounds.h CHK include/generated/asm-offsets.h CALL scripts/checksyscalls.sh CHK include/generated/compile.h SKIPPED include/generated/compile.h Building modules, stage 2. Kernel: arch/x86/boot/bzImage is ready (#40) MODPOST 4225 modules Performance counter stats for 'system wide': 183.44 mWatts power/power-pkg/ 341.837270111 seconds time elapsed root@hr-zp:/home/ray/tip# ./tools/perf/perf stat -a -e 'power/power-pkg/' sleep 10 Performance counter stats for 'system wide': 0.18 mWatts power/power-pkg/ 10.012551815 seconds time elapsedSuggested-by: Peter Zijlstra Suggested-by: Ingo Molnar Suggested-by: Borislav Petkov Signed-off-by: Huang Rui Signed-off-by: Peter Zijlstra (Intel) Reviewed-by: Thomas Gleixner Cc: Alexander Shishkin Cc: Andy Lutomirski Cc: Arnaldo Carvalho de Melo Cc: Arnaldo Carvalho de Melo Cc: Borislav Petkov Cc: Brian Gerst Cc: David Ahern Cc: Denys Vlasenko Cc: H. Peter Anvin Cc: Jiri Olsa Cc: Kan Liang Cc: Linus Torvalds Cc: Namhyung Kim Cc: Robert Richter Cc: Stephane Eranian Cc: Vince Weaver Cc: jacob.w.shin@gmail.comLink: http://lkml.kernel.org/r/1457502306-2559-1-git-send-email-ray.huang@amd.com[ Fixed the modular build. ]Signed-off-by: Ingo Molnar List of files: /linux-6.15/arch/x86/events/Makefile

65a27a35 - perf/x86: Move perf_event_msr.c .............. => x86/events/msr.c

Wed, 10 Feb 2016 09:55:22 +0000

perf/x86: Move perf_event_msr.c .............. => x86/events/msr.cSigned-off-by: Borislav Petkov Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/1455098123-11740-17-git-send-email-bp@alien8.deSigned-off-by: Ingo Molnar List of files: /linux-6.15/arch/x86/events/Makefile

5e865ed4 - perf/x86: Move perf_event_p6.c ............... => x86/events/intel/p6.c

Wed, 10 Feb 2016 09:55:21 +0000

perf/x86: Move perf_event_p6.c ............... => x86/events/intel/p6.cSigned-off-by: Borislav Petkov Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/1455098123-11740-16-git-send-email-bp@alien8.deSigned-off-by: Ingo Molnar List of files: /linux-6.15/arch/x86/events/Makefile

f03e97db - perf/x86: Move perf_event_p4.c ............... => x86/events/intel/p4.c

Wed, 10 Feb 2016 09:55:20 +0000

perf/x86: Move perf_event_p4.c ............... => x86/events/intel/p4.cSigned-off-by: Borislav Petkov Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/1455098123-11740-15-git-send-email-bp@alien8.deSigned-off-by: Ingo Molnar List of files: /linux-6.15/arch/x86/events/Makefile

edbb5918 - perf/x86: Move perf_event_knc.c .............. => x86/events/intel/knc.c

Wed, 10 Feb 2016 09:55:19 +0000

perf/x86: Move perf_event_knc.c .............. => x86/events/intel/knc.cSigned-off-by: Borislav Petkov Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/1455098123-11740-14-git-send-email-bp@alien8.deSigned-off-by: Ingo Molnar List of files: /linux-6.15/arch/x86/events/Makefile

ed367e6c - perf/x86: Move perf_event_intel_uncore_snbep.c => x86/events/intel/uncore_snbep.c

Wed, 10 Feb 2016 09:55:18 +0000

perf/x86: Move perf_event_intel_uncore_snbep.c => x86/events/intel/uncore_snbep.cSigned-off-by: Borislav Petkov Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/1455098123-11740-13-git-send-email-bp@alien8.deSigned-off-by: Ingo Molnar List of files: /linux-6.15/arch/x86/events/Makefile

92553e40 - perf/x86: Move perf_event_intel_uncore_snb.c => x86/events/intel/uncore_snb.c

Wed, 10 Feb 2016 09:55:17 +0000

perf/x86: Move perf_event_intel_uncore_snb.c => x86/events/intel/uncore_snb.cSigned-off-by: Borislav Petkov Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/1455098123-11740-12-git-send-email-bp@alien8.deSigned-off-by: Ingo Molnar List of files: /linux-6.15/arch/x86/events/Makefile

35bf705c - perf/x86: Move perf_event_intel_uncore_nhmex.c => x86/events/intel/uncore_nmhex.c

Wed, 10 Feb 2016 09:55:16 +0000

perf/x86: Move perf_event_intel_uncore_nhmex.c => x86/events/intel/uncore_nmhex.cSigned-off-by: Borislav Petkov Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/1455098123-11740-11-git-send-email-bp@alien8.deSigned-off-by: Ingo Molnar List of files: /linux-6.15/arch/x86/events/Makefile

6bcb2db5 - perf/x86: Move perf_event_intel_uncore.[ch] .. => x86/events/intel/uncore.[ch]

Wed, 10 Feb 2016 09:55:15 +0000

perf/x86: Move perf_event_intel_uncore.[ch] .. => x86/events/intel/uncore.[ch]Signed-off-by: Borislav Petkov Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/1455098123-11740-10-git-send-email-bp@alien8.deSigned-off-by: Ingo Molnar List of files: /linux-6.15/arch/x86/events/Makefile

609d809f - perf/x86: Move perf_event_intel_rapl.c ....... => x86/events/intel/rapl.c

Wed, 10 Feb 2016 09:55:14 +0000

perf/x86: Move perf_event_intel_rapl.c ....... => x86/events/intel/rapl.cSigned-off-by: Borislav Petkov Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/1455098123-11740-9-git-send-email-bp@alien8.deSigned-off-by: Ingo Molnar List of files: /linux-6.15/arch/x86/events/Makefile

fd1c601c - perf/x86: Move perf_event_intel_pt.[ch] ...... => x86/events/intel/pt.[ch]

Wed, 10 Feb 2016 09:55:13 +0000

perf/x86: Move perf_event_intel_pt.[ch] ...... => x86/events/intel/pt.[ch]Signed-off-by: Borislav Petkov Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/1455098123-11740-8-git-send-email-bp@alien8.deSigned-off-by: Ingo Molnar List of files: /linux-6.15/arch/x86/events/Makefile

c85cc449 - perf/x86: Move perf_event_intel_lbr.c ........ => x86/events/intel/lbr.c

Wed, 10 Feb 2016 09:55:12 +0000

perf/x86: Move perf_event_intel_lbr.c ........ => x86/events/intel/lbr.cSigned-off-by: Borislav Petkov Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Link: http://lkml.kernel.org/r/1455098123-11740-7-git-send-email-bp@alien8.deSigned-off-by: Ingo Molnar List of files: /linux-6.15/arch/x86/events/Makefile