Changes in Kconfig

872df34d - x86/its: Use dynamic thunks for indirect branches

Mon, 14 Oct 2024 17:05:48 +0000

x86/its: Use dynamic thunks for indirect branchesITS mitigation moves the unsafe indirect branches to a safe thunk. Thiscould degrade the prediction accuracy as the source address of indirectbranches becomes same for different execution paths.To improve the predictions, and hence the performance, assign a separatethunk for each indirect callsite. This is also a defense-in-depth measureto avoid indirect branches aliasing with each other.As an example, 5000 dynamic thunks would utilize around 16 bits of theaddress space, thereby gaining entropy. For a BTB that uses32 bits for indexing, dynamic thunks could provide better predictionaccuracy over fixed thunks.Have ITS thunks be variable sized and use EXECMEM_MODULE_TEXT such thatthey are both more flexible (got to extend them later) and live in 2M TLBs,just like kernel code, avoiding undue TLB pressure.Signed-off-by: Peter Zijlstra (Intel) Signed-off-by: Pawan Gupta Signed-off-by: Dave Hansen Reviewed-by: Alexandre Chartre List of files: /linux-6.15/arch/x86/Kconfig

8754e67a - x86/its: Add support for ITS-safe indirect thunk

Sat, 22 Jun 2024 04:17:21 +0000

x86/its: Add support for ITS-safe indirect thunkDue to ITS, indirect branches in the lower half of a cacheline may bevulnerable to branch target injection attack.Introduce ITS-safe thunks to patch indirect branches in the lower half ofcacheline with the thunk. Also thunk any eBPF generated indirect branchesin emit_indirect_jump().Below category of indirect branches are not mitigated:- Indirect branches in the .init section are not mitigated because they are discarded after boot.- Indirect branches that are explicitly marked retpoline-safe.Note that retpoline also mitigates the indirect branches against ITS. Thisis because the retpoline sequence fills an RSB entry before RET, and itdoes not suffer from RSB-underflow part of the ITS.Signed-off-by: Pawan Gupta Signed-off-by: Dave Hansen Reviewed-by: Josh Poimboeuf Reviewed-by: Alexandre Chartre List of files: /linux-6.15/arch/x86/Kconfig

5595c31c - x86/Kconfig: make CFI_AUTO_DEFAULT depend on !RUST or Rust >= 1.88

Thu, 10 Apr 2025 11:54:20 +0000

x86/Kconfig: make CFI_AUTO_DEFAULT depend on !RUST or Rust >= 1.88Calling core::fmt::write() from rust code while FineIBT is enabledresults in a kernel panic:[ 4614.199779] kernel BUG at arch/x86/kernel/cet.c:132![ 4614.205343] Oops: invalid opcode: 0000 [#1] PREEMPT SMP NOPTI[ 4614.211781] CPU: 2 UID: 0 PID: 6057 Comm: dmabuf_dump Tainted: G U O 6.12.17-android16-0-g6ab38c534a43 #1 9da040f27673ec3945e23b998a0f8bd64c846599[ 4614.227832] Tainted: [U]=USER, [O]=OOT_MODULE[ 4614.241247] RIP: 0010:do_kernel_cp_fault+0xea/0xf0...[ 4614.398144] RIP: 0010:_RNvXs5_NtNtNtCs3o2tGsuHyou_4core3fmt3num3impyNtB9_7Display3fmt+0x0/0x20[ 4614.407792] Code: 48 f7 df 48 0f 48 f9 48 89 f2 89 c6 5d e9 18 fd ff ff 0f 1f 84 00 00 00 00 00 f3 0f 1e fa 41 81 ea 14 61 af 2c 74 03 0f 0b 90 <66> 0f 1f 00 55 48 89 e5 48 89 f2 48 8b 3f be 01 00 00 00 5d e9 e7[ 4614.428775] RSP: 0018:ffffb95acfa4ba68 EFLAGS: 00010246[ 4614.434609] RAX: 0000000000000000 RBX: 0000000000000010 RCX: 0000000000000000[ 4614.442587] RDX: 0000000000000007 RSI: ffffb95acfa4ba70 RDI: ffffb95acfa4bc88[ 4614.450557] RBP: ffffb95acfa4bae0 R08: ffff0a00ffffff05 R09: 0000000000000070[ 4614.458527] R10: 0000000000000000 R11: ffffffffab67eaf0 R12: ffffb95acfa4bcc8[ 4614.466493] R13: ffffffffac5d50f0 R14: 0000000000000000 R15: 0000000000000000[ 4614.474473] ? __cfi__RNvXs5_NtNtNtCs3o2tGsuHyou_4core3fmt3num3impyNtB9_7Display3fmt+0x10/0x10[ 4614.484118] ? _RNvNtCs3o2tGsuHyou_4core3fmt5write+0x1d2/0x250This happens because core::fmt::write() callscore::fmt::rt::Argument::fmt(), which currently has CFI disabled:library/core/src/fmt/rt.rs:171 // FIXME: Transmuting formatter in new and indirectly branching to/calling172 // it here is an explicit CFI violation.173 #[allow(inline_no_sanitize)]174 #[no_sanitize(cfi, kcfi)]175 #[inline]176 pub(super) unsafe fn fmt(&self, f: &mut Formatter<'_>) -> Result {This causes a Control Protection exception, because FineIBT has sealedoff the original function's endbr64.This makes rust currently incompatible with FineIBT. Add a Kconfigdependency that prevents FineIBT from getting turned on by defaultif rust is enabled.[ Rust 1.88.0 (scheduled for 2025-06-26) should have this fixed [1], and thus we relaxed the condition with Rust >= 1.88. When `objtool` lands checking for this with e.g. [2], the plan is to ideally run that in upstream Rust's CI to prevent regressions early [3], since we do not control `core`'s source code. Alice tested the Rust PR backported to an older compiler. Peter would like that Rust provides a stable `core` which can be pulled into the kernel: "Relying on that much out of tree code is 'unfortunate'". - Miguel ]Signed-off-by: Paweł Anikiel Reviewed-by: Alice Ryhl Acked-by: Peter Zijlstra Link: https://github.com/rust-lang/rust/pull/139632 [1]Link: https://lore.kernel.org/rust-for-linux/20250410154556.GB9003@noisy.programming.kicks-ass.net/ [2]Link: https://github.com/rust-lang/rust/pull/139632#issuecomment-2801950873 [3]Link: https://lore.kernel.org/r/20250410115420.366349-1-panikiel@google.comLink: https://lore.kernel.org/r/att0-CANiq72kjDM0cKALVy4POEzhfdT4nO7tqz0Pm7xM+3=_0+L1t=A@mail.gmail.com[ Reduced splat. - Miguel ]Signed-off-by: Miguel Ojeda List of files: /linux-6.15/arch/x86/Kconfig

3049def1 - mseal sysmap: enable x86-64

Wed, 05 Mar 2025 02:17:07 +0000

mseal sysmap: enable x86-64Provide support for CONFIG_MSEAL_SYSTEM_MAPPINGS on x86-64, covering thevdso, vvar, vvar_vclock.Production release testing passes on Android and Chrome OS.Link: https://lkml.kernel.org/r/20250305021711.3867874-4-jeffxu@google.comSigned-off-by: Jeff Xu Reviewed-by: Lorenzo Stoakes Reviewed-by: Liam R. Howlett Reviewed-by: Kees Cook Cc: Adhemerval Zanella Cc: Alexander Mikhalitsyn Cc: Alexey Dobriyan Cc: Andrei Vagin Cc: Anna-Maria Behnsen Cc: Ard Biesheuvel Cc: Benjamin Berg Cc: Christoph Hellwig Cc: Dave Hansen Cc: David Rientjes Cc: David S. Miller Cc: Elliot Hughes Cc: Florian Faineli Cc: Greg Ungerer Cc: Guenter Roeck Cc: Heiko Carstens Cc: Helge Deller Cc: Hyeonggon Yoo <42.hyeyoo@gmail.com>Cc: Ingo Molnar Cc: Jann Horn Cc: Jason A. Donenfeld Cc: Johannes Berg Cc: Jorge Lucangeli Obes Cc: Linus Waleij Cc: Mark Rutland Cc: Matthew Wilcow (Oracle) Cc: Michael Ellerman Cc: Michal Hocko Cc: Miguel Ojeda Cc: Mike Rapoport Cc: Oleg Nesterov Cc: Pedro Falcato Cc: Peter Xu Cc: Randy Dunlap Cc: Stephen Röttger Cc: Thomas Weißschuh Cc: Vlastimil Babka Signed-off-by: Andrew Morton List of files: /linux-6.15/arch/x86/Kconfig

9f98a4f4 - x86/tdx: Fix arch_safe_halt() execution for TDX VMs

Fri, 28 Feb 2025 01:44:15 +0000

x86/tdx: Fix arch_safe_halt() execution for TDX VMsDirect HLT instruction execution causes #VEs for TDX VMs which is routedto hypervisor via TDCALL. If HLT is executed in STI-shadow, resulting #VEhandler will enable interrupts before TDCALL is routed to hypervisorleading to missed wakeup events, as current TDX spec doesn't exposeinterruptibility state information to allow #VE handler to selectivelyenable interrupts.Commit bfe6ed0c6727 ("x86/tdx: Add HLT support for TDX guests")prevented the idle routines from executing HLT instruction in STI-shadow.But it missed the paravirt routine which can be reached via this pathas an example: kvm_wait() => safe_halt() => raw_safe_halt() => arch_safe_halt() => irq.safe_halt() => pv_native_safe_halt()To reliably handle arch_safe_halt() for TDX VMs, introduce explicitdependency on CONFIG_PARAVIRT and override paravirt halt()/safe_halt()routines with TDX-safe versions that execute direct TDCALL and neededinterrupt flag updates. Executing direct TDCALL brings in additionalbenefit of avoiding HLT related #VEs altogether.As tested by Ryan Afranji: "Tested with the specjbb2015 benchmark. It has heavy lock contention which leads to many halt calls. TDX VMs suffered a poor score before this patchset. Verified the major performance improvement with this patchset applied."Fixes: bfe6ed0c6727 ("x86/tdx: Add HLT support for TDX guests")Signed-off-by: Vishal Annapurve Signed-off-by: Ingo Molnar Reviewed-by: Kirill A. Shutemov Tested-by: Ryan Afranji Cc: Andy Lutomirski Cc: Brian Gerst Cc: Juergen Gross Cc: H. Peter Anvin Cc: Linus Torvalds Cc: Josh Poimboeuf Cc: stable@vger.kernel.orgLink: https://lore.kernel.org/r/20250228014416.3925664-3-vannapurve@google.com List of files: /linux-6.15/arch/x86/Kconfig

2704ad55 - x86/Kconfig: Fix lists in X86_EXTENDED_PLATFORM help text

Sat, 22 Mar 2025 17:50:52 +0000

x86/Kconfig: Fix lists in X86_EXTENDED_PLATFORM help textSupport for STA2X11-based systems was removed in February in: dcbb01fbb7ae ("x86/pci: Remove old STA2x11 support")Intel MID for 32-bit platforms was removed from this list also inFebruary in: ca5955dd5f08 ("x86/cpu: Document CONFIG_X86_INTEL_MID as 64-bit-only")Intel MID for 64-bit platforms is a duplicate for "Merrifield/MoorefieldMID devices".Fixes: 4047e8773fb6 ("x86/Kconfig: Update lists in X86_EXTENDED_PLATFORM")Signed-off-by: Mateusz Jończyk Signed-off-by: Ingo Molnar Cc: Andy Shevchenko Link: https://lore.kernel.org/r/20250322175052.43611-1-mat.jonczyk@o2.pl List of files: /linux-6.15/arch/x86/Kconfig

99bb1bd8 - x86/Kconfig: Correct X86_X2APIC help text

Sat, 22 Mar 2025 15:45:41 +0000

x86/Kconfig: Correct X86_X2APIC help textCurrently, it is not true that the kernel will panic with CONFIG_X86_X2APIC=non systems that require it; it will try to disable the APIC and run withoutit to at least give the user a clear warning message. See the secondvariant of check_x2apic() in arch/x86/kernel/apic/apic.c .Also massage some other parts of the help text.Fixes: 9232c49ff31c ("x86/Kconfig: Enable X86_X2APIC by default and improve help text")Signed-off-by: Mateusz Jończyk Signed-off-by: Ingo Molnar Link: https://lore.kernel.org/r/20250322154541.40325-1-mat.jonczyk@o2.pl List of files: /linux-6.15/arch/x86/Kconfig

de711563 - x86/Kconfig: Document release year of glibc 2.3.3

Fri, 21 Mar 2025 20:48:49 +0000

x86/Kconfig: Document release year of glibc 2.3.3I wonder how many people were checking their glibc version whenconsidering whether to enable this option.Signed-off-by: Mateusz Jończyk Signed-off-by: David Heidelberg Signed-off-by: Ingo Molnar Cc: "H. Peter Anvin" Cc: Linus Torvalds Link: https://lore.kernel.org/r/20250321-x86_x2apic-v3-7-b0cbaa6fa338@ixit.cz List of files: /linux-6.15/arch/x86/Kconfig

d9f87802 - x86/Kconfig: Make CONFIG_PCI_CNB20LE_QUIRK depend on X86_32

Fri, 21 Mar 2025 20:48:48 +0000

x86/Kconfig: Make CONFIG_PCI_CNB20LE_QUIRK depend on X86_32I was unable to find a good description of the ServerWorks CNB20LEchipset. However, it was probably exclusively used with the Pentium IIIprocessor (this CPU model was used in all references to it that Ifound where the CPU model was provided: dmesgs in [1] and [2];[3] page 2; [4]-[7]).As is widely known, the Pentium III processor did not support the 64-bitmode, support for which was introduced by Intel a couple of years later.So it is safe to assume that no systems with the CNB20LE chipset haveamd64 and the CONFIG_PCI_CNB20LE_QUIRK may now depend on X86_32.Additionally, I have determined that most computers with the CNB20LEchipset did have ACPI support and this driver was inactive on them.I have submitted a patch to remove this driver, but it was met withresistance [8].[1] Jim Studt, Re: Problem with ServerWorks CNB20LE and lost interrupts Linux Kernel Mailing List, https://lkml.org/lkml/2002/1/11/111[2] RedHat Bug 665109 - e100 problems on old Compaq Proliant DL320 https://bugzilla.redhat.com/show_bug.cgi?id=665109[3] R. Hughes-Jones, S. Dallison, G. Fairey, Performance Measurements on Gigabit Ethernet NICs and Server Quality Motherboards, http://datatag.web.cern.ch/papers/pfldnet2003-rhj.doc[4] "Hardware for Linux", Probe #d6b5151873 of Intel STL2-bd A28808-302 Desktop Computer (STL2) https://linux-hardware.org/?probe=d6b5151873[5] "Hardware for Linux", Probe #0b5d843f10 of Compaq ProLiant DL380 https://linux-hardware.org/?probe=0b5d843f10[6] Ubuntu Forums, Dell Poweredge 2400 - Adaptec SCSI Bus AIC-7880 https://ubuntuforums.org/showthread.php?t=1689552[7] Ira W. Snyder, "BISECTED: 2.6.35 (and -git) fail to boot: APIC problems" https://lkml.org/lkml/2010/8/13/220[8] Bjorn Helgaas, "Re: [PATCH] x86/pci: drop ServerWorks / Broadcom CNB20LE PCI host bridge driver" https://lore.kernel.org/lkml/20220318165535.GA840063@bhelgaas/T/Signed-off-by: Mateusz Jończyk Signed-off-by: David Heideberg Signed-off-by: Ingo Molnar Cc: "H. Peter Anvin" Cc: Linus Torvalds Link: https://lore.kernel.org/r/20250321-x86_x2apic-v3-6-b0cbaa6fa338@ixit.cz List of files: /linux-6.15/arch/x86/Kconfig

21d8fb8d - x86/Kconfig: Document CONFIG_PCI_MMCONFIG

Fri, 21 Mar 2025 20:48:47 +0000

x86/Kconfig: Document CONFIG_PCI_MMCONFIGThis configuration option had no help text, so add it.CONFIG_EXPERT is enabled on some distribution kernels, so people using adistribution kernel's configuration as a starting point will see thisoption.[ mingo: Standardized the new Kconfig text a bit. ]Signed-off-by: Mateusz Jończyk Signed-off-by: David Heideberg Signed-off-by: Ingo Molnar Cc: "H. Peter Anvin" Cc: Linus Torvalds Link: https://lore.kernel.org/r/20250321-x86_x2apic-v3-5-b0cbaa6fa338@ixit.cz List of files: /linux-6.15/arch/x86/Kconfig

4047e877 - x86/Kconfig: Update lists in X86_EXTENDED_PLATFORM

Fri, 21 Mar 2025 20:48:46 +0000

x86/Kconfig: Update lists in X86_EXTENDED_PLATFORMThe order of the entries matches the order they appear in Kconfig.In 2011, AMD Elan was moved to Kconfig.cpu and the dependency onX86_EXTENDED_PLATFORM was dropped in: ce9c99af8d4b ("x86, cpu: Move AMD Elan Kconfig under "Processor family"")Support for Moorestown MID devices was removed in 2012 in: 1a8359e411eb ("x86/mid: Remove Intel Moorestown")SGI 320/540 (Visual Workstation) was removed in 2014 in: c5f9ee3d665a ("x86, platforms: Remove SGI Visual Workstation")Signed-off-by: Mateusz Jończyk Signed-off-by: David Heideberg Signed-off-by: Ingo Molnar Cc: "H. Peter Anvin" Cc: Linus Torvalds Link: https://lore.kernel.org/r/20250321-x86_x2apic-v3-4-b0cbaa6fa338@ixit.cz List of files: /linux-6.15/arch/x86/Kconfig

e35e328d - x86/Kconfig: Move all X86_EXTENDED_PLATFORM options together

Fri, 21 Mar 2025 20:48:45 +0000

x86/Kconfig: Move all X86_EXTENDED_PLATFORM options togetherSo that these options will be displayed together in menuconfig etc.Signed-off-by: Mateusz Jończyk Signed-off-by: David Heidelberg Signed-off-by: Ingo Molnar Cc: "H. Peter Anvin" Cc: Linus Torvalds Link: https://lore.kernel.org/r/20250321-x86_x2apic-v3-3-b0cbaa6fa338@ixit.cz List of files: /linux-6.15/arch/x86/Kconfig

31be5041 - x86/Kconfig: Always enable ARCH_SPARSEMEM_ENABLE

Fri, 21 Mar 2025 20:48:44 +0000

x86/Kconfig: Always enable ARCH_SPARSEMEM_ENABLEIt appears that (X86_64 || X86_32) is always true on x86.This logical OR directive was introduced in: 6ea3038648da ("arch/x86: remove depends on CONFIG_EXPERIMENTAL")By (EXPERIMENTAL && X86_32) turning into (X86_32). Sincethis change was an identity transformation, nobody noticedthat the condition turned into 'true'.[ mingo: Updated changelog ]Fixes: 6ea3038648da ("arch/x86: remove depends on CONFIG_EXPERIMENTAL")Signed-off-by: Mateusz Jończyk Signed-off-by: David Heideberg Signed-off-by: Ingo Molnar Cc: "H. Peter Anvin" Cc: Linus Torvalds Link: https://lore.kernel.org/r/20250321-x86_x2apic-v3-2-b0cbaa6fa338@ixit.cz List of files: /linux-6.15/arch/x86/Kconfig

9232c49f - x86/Kconfig: Enable X86_X2APIC by default and improve help text

Fri, 21 Mar 2025 20:48:43 +0000

x86/Kconfig: Enable X86_X2APIC by default and improve help textAs many current platforms (most modern Intel CPUs and QEMU) have x2APICpresent, enable CONFIG_X86_X2APIC by default as it gives performanceand functionality benefits. Additionally, if the BIOS has alreadyswitched APIC to x2APIC mode, but CONFIG_X86_X2APIC is disabled, thekernel will panic in arch/x86/kernel/apic/apic.c .Also improve the help text, which was confusing and really did notdescribe what the feature is about.Help text references and discussion:Both Intel [1] and AMD [3] spell the name as "x2APIC", not "x2apic"."It allows faster access to the local APIC" [2], chapter 2.1, page 15: "More efficient MSR interface to access APIC registers.""x2APIC was introduced in Intel CPUs around 2008": I was unable to find specific information which Intel CPUs support x2APIC. Wikipedia claims it was "introduced with the Nehalem microarchitecture in November 2008", but I was not able to confirm this independently. At least some Nehalem CPUs do not support x2APIC [1]. The documentation [2] is dated June 2008. Linux kernel also introduced x2APIC support in 2008, so the year seems to be right."and in AMD EPYC CPUs in 2019": [3], page 15: "AMD introduced an x2APIC in our EPYC 7002 Series processors for the first time.""It is also frequently emulated in virtual machines, even when the hostCPU does not support it." [1]"If this configuration option is disabled, the kernel will not boot onsome platforms that have x2APIC enabled." According to some BIOS documentation [4], the x2APIC may be "disabled", "enabled", or "force enabled" on this system. I think that "enabled" means "made available to the operating system, but not already turned on" and "force enabled" means "already switched to x2APIC mode when the OS boots". Only in the latter mode a kernel without CONFIG_X86_X2APIC will panic in validate_x2apic() in arch/x86/kernel/apic/apic.c . QEMU 4.2.1 and my Intel HP laptop (bought in 2019) use the "enabled" mode and the kernel does not panic.[1] "Re: [Qemu-devel] [Question] why x2apic's set by default without host sup" https://lists.gnu.org/archive/html/qemu-devel/2013-07/msg03527.html[2] Intel® 64 Architecture x2APIC Specification, ( https://www.naic.edu/~phil/software/intel/318148.pdf )[3] Workload Tuning Guide for AMD EPYC ™ 7002 Series Processor Based Servers Application Note, https://developer.amd.com/wp-content/resources/56745_0.80.pdf[4] UEFI System Utilities and Shell Command Mobile Help for HPE ProLiant Gen10, ProLiant Gen10 Plus Servers and HPE Synergy: Enabling or disabling Processor x2APIC Support https://techlibrary.hpe.com/docs/iss/proliant-gen10-uefi/s_enable_disable_x2APIC_support.htmlSigned-off-by: Mateusz Jończyk Signed-off-by: Ingo Molnar Cc: "H. Peter Anvin" Cc: Linus Torvalds Link: https://lore.kernel.org/r/20250321-x86_x2apic-v3-1-b0cbaa6fa338@ixit.cz List of files: /linux-6.15/arch/x86/Kconfig

3d37d939 - x86/cpufeatures: Add {REQUIRED,DISABLED} feature configs

Fri, 28 Feb 2025 08:23:35 +0000

x86/cpufeatures: Add {REQUIRED,DISABLED} feature configsRequired and disabled feature masks completely rely on build configs,i.e., once a build config is fixed, so are the feature masks.To prepare for auto-generating the headerwith required and disabled feature masks based on a build config,add feature Kconfig items: - X86_REQUIRED_FEATURE_x - X86_DISABLED_FEATURE_xeach of which may be set to "y" if and only if its preconditions fromcurrent build config are met.Signed-off-by: H. Peter Anvin (Intel) Signed-off-by: Xin Li (Intel) Signed-off-by: Borislav Petkov (AMD) Signed-off-by: Ingo Molnar Cc: Linus Torvalds Link: https://lore.kernel.org/r/20250228082338.73859-3-xin@zytor.com List of files: /linux-6.15/arch/x86/Kconfig

f9aad622 - mm: rename GENERIC_PTDUMP and PTDUMP_CORE

Wed, 26 Feb 2025 12:24:04 +0000

mm: rename GENERIC_PTDUMP and PTDUMP_COREPlatforms subscribe into generic ptdump implementation via GENERIC_PTDUMP.But generic ptdump gets enabled via PTDUMP_CORE. These configscombination is confusing as they sound very similar and does notdifferentiate between platform's feature subscription and featureenablement for ptdump. Rename the configs as ARCH_HAS_PTDUMP and PTDUMPmaking it more clear and improve readability.Link: https://lkml.kernel.org/r/20250226122404.1927473-6-anshuman.khandual@arm.comSigned-off-by: Anshuman Khandual Reviewed-by: Christophe Leroy (powerpc)Acked-by: Catalin Marinas [arm64]Cc: Will Deacon Cc: Jonathan Corbet Cc: Marc Zyngier Cc: Michael Ellerman Cc: Nicholas Piggin Cc: Paul Walmsley Cc: Palmer Dabbelt Cc: Heiko Carstens Cc: Vasily Gorbik Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Christophe Leroy Cc: Madhavan Srinivasan Cc: Mark Rutland Cc: Steven Price Signed-off-by: Andrew Morton List of files: /linux-6.15/arch/x86/Kconfig

08efe293 - x86/mm: set ARCH_WANT_HUGETLB_VMEMMAP_PREINIT

Fri, 28 Feb 2025 18:29:22 +0000

x86/mm: set ARCH_WANT_HUGETLB_VMEMMAP_PREINITNow that hugetlb bootmem pages are allocated earlier, and available forsection preinit (HVO-style), set ARCH_WANT_HUGETLB_VMEMMAP_PREINIT forx86_64, so that is can be done.This enables pre-HVO on x86_64.Link: https://lkml.kernel.org/r/20250228182928.2645936-22-fvdl@google.comSigned-off-by: Frank van der Linden Cc: Johannes Weiner Cc: Alexander Gordeev Cc: Andy Lutomirski Cc: Arnd Bergmann Cc: Dan Carpenter Cc: Dave Hansen Cc: David Hildenbrand Cc: Heiko Carstens Cc: Joao Martins Cc: Madhavan Srinivasan Cc: Michael Ellerman Cc: Muchun Song Cc: Oscar Salvador Cc: Peter Zijlstra Cc: Roman Gushchin (Cruise) Cc: Usama Arif Cc: Vasily Gorbik Cc: Yu Zhao Cc: Zi Yan Signed-off-by: Andrew Morton List of files: /linux-6.15/arch/x86/Kconfig

9b400d17 - kbuild: Introduce Kconfig symbol for linking vmlinux with relocations

Tue, 11 Mar 2025 11:06:19 +0000

kbuild: Introduce Kconfig symbol for linking vmlinux with relocationsSome architectures build vmlinux with static relocations preserved, butstrip them again from the final vmlinux image. Arch specific toolsconsume these static relocations in order to construct relocation tablesfor KASLR.The fact that vmlinux is created, consumed and subsequently updated goesagainst the typical, declarative paradigm used by Make, which is basedon rules and dependencies. So as a first step towards cleaning this up,introduce a Kconfig symbol to declare that the arch wants to consume thestatic relocations emitted into vmlinux. This will be wired up furtherin subsequent patches.Signed-off-by: Ard Biesheuvel Signed-off-by: Masahiro Yamada List of files: /linux-6.15/arch/x86/Kconfig

70288405 - x86/resctrl: Allow an architecture to disable pseudo lock

Tue, 11 Mar 2025 18:37:09 +0000

x86/resctrl: Allow an architecture to disable pseudo lockPseudo-lock relies on knowledge of the micro-architecture to disableprefetchers etc.On arm64 these controls are typically secure only, meaning Linux can't accessthem. Arm's cache-lockdown feature works in a very different way. Resctrl'spseudo-lock isn't going to be used on arm64 platforms.Add a Kconfig symbol that can be selected by the architecture. This enables ordisables building of the pseudo_lock.c file, and replaces the functions withstubs. An additional IS_ENABLED() check is needed in rdtgroup_mode_write() sothat attempting to enable pseudo-lock reports an "Unknown or unsupported mode"to user-space via the last_cmd_status file.Signed-off-by: James Morse Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Shaopeng Tan Reviewed-by: Tony Luck Reviewed-by: Reinette Chatre Reviewed-by: Fenghua Yu Reviewed-by: Babu Moger Tested-by: Carl Worth # arm64Tested-by: Shaopeng Tan Tested-by: Peter Newman Tested-by: Amit Singh Tomar # arm64Tested-by: Shanker Donthineni # arm64Tested-by: Babu Moger Link: https://lore.kernel.org/r/20250311183715.16445-25-james.morse@arm.com List of files: /linux-6.15/arch/x86/Kconfig

909639aa - x86/cpufeatures: Rename X86_CMPXCHG64 to X86_CX8

Fri, 28 Feb 2025 08:23:34 +0000

x86/cpufeatures: Rename X86_CMPXCHG64 to X86_CX8Replace X86_CMPXCHG64 with X86_CX8, as CX8 is the name of the CPUIDflag, thus to make it consistent with X86_FEATURE_CX8 defined in.No functional change intended.Signed-off-by: H. Peter Anvin (Intel) Signed-off-by: Xin Li (Intel) Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Ingo Molnar Link: https://lore.kernel.org/r/20250228082338.73859-2-xin@zytor.com List of files: /linux-6.15/arch/x86/Kconfig