Changes in Makefile

5f316b65 - riscv, bpf: Add RV32G eBPF JIT

Thu, 05 Mar 2020 05:02:05 +0000

riscv, bpf: Add RV32G eBPF JITThis is an eBPF JIT for RV32G, adapted from the JIT for RV64G andthe 32-bit ARM JIT.There are two main changes required for this to work compared tothe RV64 JIT.First, eBPF registers are 64-bit, while RV32G registers are 32-bit.BPF registers either map directly to 2 RISC-V registers, or residein stack scratch space and are saved and restored when used.Second, many 64-bit ALU operations do not trivially map to 32-bitoperations. Operations that move bits between high and low words,such as ADD, LSH, MUL, and others must emulate the 64-bit behaviorin terms of 32-bit instructions.This patch also makes related changes to bpf_jit.h, suchas adding RISC-V instructions required by the RV32 JIT.Supported features:The RV32 JIT supports the same features and instructions as theRV64 JIT, with the following exceptions:- ALU64 DIV/MOD: Requires loops to implement on 32-bit hardware.- BPF_XADD | BPF_DW: There's no 8-byte atomic instruction in RV32.These features are also unsupported on other BPF JITs for 32-bitarchitectures.Testing:- lib/test_bpf.ctest_bpf: Summary: 378 PASSED, 0 FAILED, [349/366 JIT'ed]test_bpf: test_skb_segment: Summary: 2 PASSED, 0 FAILEDThe tests that are not JITed are all due to use of 64-bit div/modor 64-bit xadd.- tools/testing/selftests/bpf/test_verifier.cSummary: 1415 PASSED, 122 SKIPPED, 43 FAILEDTested both with and without BPF JIT hardening.This is the same set of tests that pass using the BPF interpreterwith the JIT disabled.Verification and synthesis:We developed the RV32 JIT using our automated verification tool,Serval. We have used Serval in the past to verify patches to theRV64 JIT. We also used Serval to superoptimize the resulting codethrough program synthesis.You can find the tool and a guide to the approach and results here:https://github.com/uw-unsat/serval-bpf/tree/rv32-jit-v5Co-developed-by: Xi Wang Signed-off-by: Xi Wang Signed-off-by: Luke Nelson Signed-off-by: Daniel Borkmann Reviewed-by: Björn Töpel Acked-by: Björn Töpel Link: https://lore.kernel.org/bpf/20200305050207.4159-3-luke.r.nels@gmail.com List of files: /linux-6.15/arch/riscv/net/Makefile

ca6cb544 - riscv, bpf: Factor common RISC-V JIT code

Thu, 05 Mar 2020 05:02:04 +0000

riscv, bpf: Factor common RISC-V JIT codeThis patch factors out code that can be used by both the RV64 and RV32BPF JITs to a common bpf_jit.h and bpf_jit_core.c.Move struct definitions and macro-like functions to header. Renamerv_sb_insn/rv_uj_insn to rv_b_insn/rv_j_insn to match the RISC-Vspecification.Move reusable functions emit_body() and bpf_int_jit_compile() tobpf_jit_core.c with minor simplifications. Rename emit_insn() andbuild_{prologue,epilogue}() to be prefixed with "bpf_jit_" as they areno longer static.Rename bpf_jit_comp.c to bpf_jit_comp64.c to be more explicit.Co-developed-by: Xi Wang Signed-off-by: Xi Wang Signed-off-by: Luke Nelson Signed-off-by: Daniel Borkmann Reviewed-by: Björn Töpel Acked-by: Björn Töpel Link: https://lore.kernel.org/bpf/20200305050207.4159-2-luke.r.nels@gmail.com List of files: /linux-6.15/arch/riscv/net/Makefile

ec8f24b7 - treewide: Add SPDX license identifier - Makefile/Kconfig

Sun, 19 May 2019 12:07:45 +0000

treewide: Add SPDX license identifier - Makefile/KconfigAdd SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any formThese files fall under the project license, GPL v2 only. The resulting SPDXlicense identifier is: GPL-2.0-onlySigned-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman List of files: /linux-6.15/arch/riscv/net/Makefile

2353ecc6 - bpf, riscv: add BPF JIT for RV64G

Tue, 05 Feb 2019 12:41:22 +0000

bpf, riscv: add BPF JIT for RV64GThis commit adds a BPF JIT for RV64G.The JIT is a two-pass JIT, and has a dynamic prolog/epilogue (similarto the MIPS64 BPF JIT) instead of static ones (e.g. x86_64).At the moment the RISC-V Linux port does not supportCONFIG_HAVE_KPROBES, which means that CONFIG_BPF_EVENTS is notsupported. Thus, no tests involving BPF_PROG_TYPE_TRACEPOINT,BPF_PROG_TYPE_PERF_EVENT, BPF_PROG_TYPE_KPROBE andBPF_PROG_TYPE_RAW_TRACEPOINT passes.The implementation does not support "far branching" (>4KiB).Test results: # modprobe test_bpf test_bpf: Summary: 378 PASSED, 0 FAILED, [366/366 JIT'ed] # echo 1 > /proc/sys/kernel/unprivileged_bpf_disabled # ./test_verifier ... Summary: 761 PASSED, 507 SKIPPED, 2 FAILEDNote that "test_verifier" was run with one build withCONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y and one without, otherwisemany of the the tests that require unaligned access were skipped.CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y: # echo 1 > /proc/sys/kernel/unprivileged_bpf_disabled # ./test_verifier | grep -c 'NOTE.*unknown align' 0No CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS: # echo 1 > /proc/sys/kernel/unprivileged_bpf_disabled # ./test_verifier | grep -c 'NOTE.*unknown align' 59The two failing test_verifier tests are: "ld_abs: vlan + abs, test 1" "ld_abs: jump around ld_abs"This is due to that "far branching" involved in those tests.All tests where done on QEMU (QEMU emulator version 3.1.50(v3.1.0-688-g8ae951fbc106)).Signed-off-by: Björn Töpel Signed-off-by: Daniel Borkmann List of files: /linux-6.15/arch/riscv/net/Makefile