Changes in Platform

26bff9eb - MIPS: Only include the platform file needed

Wed, 06 May 2020 16:24:02 +0000

MIPS: Only include the platform file neededInstead of including all Platform files, we simply include theneeded one and avoid clashes with makefile variables.Signed-off-by: Thomas Bogendoerfer List of files: /linux-6.15/arch/mips/loongson32/Platform

b2afb64c - MIPS: Loongson: Rename LOONGSON1 to LOONGSON32

Mon, 04 Nov 2019 06:11:20 +0000

MIPS: Loongson: Rename LOONGSON1 to LOONGSON32Now old Loongson-2E/2F use LOONGSON2EF and will be removed in future,newer Loongson-2/3 use LOONGSON64. So rename LOONGSON1 to LOONGSON32will make the naming style more unified.Signed-off-by: Huacai Chen [paulburton@kernel.org: Fix checkpatch whitespace warning in irqflags.h]Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: linux-mips@linux-mips.orgCc: linux-mips@vger.kernel.orgCc: Fuxin Zhang Cc: Zhangjin Wu Cc: Huacai Chen List of files: /linux-6.15/arch/mips/loongson32/Platform

7e280f6b - MIPS: Loongson32: Revert ISA level to MIPS32R2

Tue, 22 Jan 2019 13:04:12 +0000

MIPS: Loongson32: Revert ISA level to MIPS32R2GS232 core have implemented all necessary mips32r2 instructions.Serval missing FP instructions can be emulated by kernel.The issue of di instruction have been solved.Thus we revert the ISA level back to MIPS32R2.Signed-off-by: Jiaxun Yang Signed-off-by: Paul Burton Cc: linux-mips@vger.kernel.orgCc: keguang.zhang@gmail.com List of files: /linux-6.15/arch/mips/loongson32/Platform

d1b83f0f - MIPS: Loongson32: Set load address to 0x80200000

Tue, 22 Jan 2019 13:04:14 +0000

MIPS: Loongson32: Set load address to 0x80200000PMON bootloader on Loongson-1C will use memory between0x80100000 and 0x80200000 as stack.Use 0x80100000 as load address may hang the bootloaderduring loading.Signed-off-by: Jiaxun Yang Signed-off-by: Paul Burton Cc: linux-mips@vger.kernel.orgCc: keguang.zhang@gmail.com List of files: /linux-6.15/arch/mips/loongson32/Platform

60bc84e2 - MIPS: Loongson: Merge load addresses

Wed, 04 Jan 2017 13:30:58 +0000

MIPS: Loongson: Merge load addressesSystems based upon the Loongson 1B & 1C CPUs share the same loadaddress, as do those based upon Loongson 1A. Unify the definition ofthis load address to reduce duplication & avoid the need for an extraLoongson 1A case in future.[paul.burton@mips.com: Rewrite commit message.]Signed-off-by: 谢致邦 (XIE Zhibang) Signed-off-by: Paul Burton Patchwork: https://patchwork.linux-mips.org/patch/14927/Cc: linux-mips@linux-mips.org List of files: /linux-6.15/arch/mips/loongson32/Platform

968dc5a0 - MIPS: Loongson: Set Loongson32 to MIPS32R1

Thu, 01 Jun 2017 10:41:34 +0000

MIPS: Loongson: Set Loongson32 to MIPS32R1LS232 (Loonson 2-issue 32-bit, also called GS232 (Godson 2-issue 32-bit))is the CPU core (microarchitecture) of Loongson 1A/1B/1C.According to "LS232 用户手册 (LS232 User Manual)", LS232 implements theMIPS32 Release 1 instruction set, and part of the MIPS32 Release 2instruction set.In the manual, LS232 implements all of the MIPS32R2 instruction setexcept the FPU instructions, and LS232 also implements 5 FPUinstructions of the MIPS32R2 instruction set: CEIL.L.fmt, CVT.L.fmt,FLOOR.L.fmt, TRUNC.L.fmt, and ROUND.L.fmt.But a bug of the DI instruction has been found during tests, the DIinstruction can not disable interrupts in arch_local_irq_disable() withCONFIG_PREEMPT_NONE=y and CFLAGS='-mno-branch-likely' in some cases.[paul.burton@mips.com: - Remove the _MIPS_ISA redefinition to match the change made for the generic MIPSr1 CPUs by commit 344ebf09949c ("MIPS: Always use -march=, not - shortcuts").]Signed-off-by: 谢致邦 (XIE Zhibang) Signed-off-by: Paul Burton Patchwork: https://patchwork.linux-mips.org/patch/16155/Cc: linux-mips@linux-mips.orgCc: ralf@linux-mips.org List of files: /linux-6.15/arch/mips/loongson32/Platform

12e3280b - MIPS: Loongson1C: Add board support

Thu, 19 May 2016 04:29:30 +0000

MIPS: Loongson1C: Add board supportAdds basic platform devices for Loongson1C, including serial portand ethernet.Signed-off-by: Yang Ling Cc: keguang.zhang@gmail.comCc: chenhc@lemote.comCc: linux-mips@linux-mips.orgCc: linux-kernel@vger.kernel.orgPatchwork: https://patchwork.linux-mips.org/patch/13304/Signed-off-by: Ralf Baechle List of files: /linux-6.15/arch/mips/loongson32/Platform

30ad29bb - MIPS: Loongson: Naming style cleanup and rework

Tue, 21 Apr 2015 02:00:35 +0000

MIPS: Loongson: Naming style cleanup and reworkCurrently, code of Loongson-2/3 is under loongson directory and code ofLoongson-1 is under loongson1 directory. Besides, there are Kconfigoptions such as MACH_LOONGSON and MACH_LOONGSON1. This naming style isvery ugly and confusing. Since Loongson-2/3 are both 64-bit general-purpose CPU while Loongson-1 is 32-bit SoC, we rename both file namesand Kconfig symbols from loongson/loongson1 to loongson64/loongson32.[ralf@linux-mips.org: Resolve a number of simple conflicts.]Signed-off-by: Huacai Chen Cc: Steven J. Hill Cc: linux-mips@linux-mips.orgCc: Fuxin Zhang Cc: Zhangjin Wu Cc: Kelvin Cheung Patchwork: https://patchwork.linux-mips.org/patch/9790/Signed-off-by: Ralf Baechle List of files: /linux-6.15/arch/mips/loongson32/Platform