Changes in Makefile

393999fa - ARM: 9389/2: mm: Define prototypes for all per-processor calls

Tue, 23 Apr 2024 07:48:42 +0000

ARM: 9389/2: mm: Define prototypes for all per-processor callsEach CPU type ("proc") has assembly calls for initializing andsetting up the MM context, idle and so forth.These calls have the C form of e.g.:void cpu_arm920_init(void);However this prototype is not really specified, instead it isgenerated by the glue code in and the prototypeis implicit from the generic prototype defined in such as cpu_proc_init() in this case. (This is a bit similar tothe "interface" or inheritance concept in other languages.)To be able to annotate these assembly calls for CFI, they all needto have a proper C prototype per CPU call.Define these in a new C file that is only compiled when we useCFI, and add __ADDRESSABLE() to each so the compiler knows thatthese will be addressed (they are not explicitly called in C, theyare called by way of cpu_proc_init() etc).It is a bit of definitions, but we do not expect new ARM32 CPUsto appear very much so it should be pretty static.Tested-by: Kees Cook Reviewed-by: Sami Tolvanen Signed-off-by: Linus Walleij Signed-off-by: Russell King (Oracle) List of files: /linux-6.15/arch/arm/mm/Makefile

b4d20eff - ARM: 9387/2: mm: Rewrite cacheflush vtables in CFI safe C

Tue, 23 Apr 2024 07:43:14 +0000

ARM: 9387/2: mm: Rewrite cacheflush vtables in CFI safe CInstead of defining all cache flush operations with an assemblymacro in proc-macros.S, provide an explicit struct cpu_cache_fnsfor each CPU cache type in mm/cache.c.As a side effect from rewriting the vtables in C, we canavoid the aliasing for the "louis" cache callback, instead wecan just assign the NN_flush_kern_cache_all() function to thelouis callback in the C vtable.As the louis cache callback is called explicitly (not through thevtable) if we only have one type of cache support compiled in, weneed an ifdef quirk for this in the !MULTI_CACHE case.Feroceon and XScale have some dma mapping quirk, in this case wecan just define two structs and assign all but one callback to themain implementation; since each of them invoked define_cache_functionstwice they require MULTI_CACHE by definition so the compiled-inshortcut is not used on these variants.Tested-by: Kees Cook Reviewed-by: Sami Tolvanen Signed-off-by: Linus Walleij Signed-off-by: Russell King (Oracle) List of files: /linux-6.15/arch/arm/mm/Makefile

6b0ef279 - ARM: 9384/2: mm: Make tlbflush routines CFI safe

Tue, 23 Apr 2024 07:25:41 +0000

ARM: 9384/2: mm: Make tlbflush routines CFI safeInstead of avoiding CFI entirely on the TLB flush helpers, reorganizethe code so that the CFI machinery can deal with it. The importantthings to take into account are:- functions in asm called indirectly from C need to be defined using SYM_TYPED_FUNC_START()- a reference to the asm function needs to be visible to the compiler, in order to get it to emit the typeid symbol.The latter means that defining the cpu_tlb_fns structs is best done fromC code, so that the references in the static initializers will bevisible to the compiler.Signed-off-by: Ard Biesheuvel Tested-by: Kees Cook Reviewed-by: Sami Tolvanen Signed-off-by: Linus Walleij Signed-off-by: Russell King (Oracle) List of files: /linux-6.15/arch/arm/mm/Makefile

9636f055 - mm/treewide: remove pXd_huge()

Mon, 18 Mar 2024 20:04:02 +0000

mm/treewide: remove pXd_huge()This API is not used anymore, drop it for the whole tree.Link: https://lkml.kernel.org/r/20240318200404.448346-13-peterx@redhat.comSigned-off-by: Peter Xu Cc: Alistair Popple Cc: Andreas Larsson Cc: "Aneesh Kumar K.V" Cc: Arnd Bergmann Cc: Bjorn Andersson Cc: Borislav Petkov Cc: Catalin Marinas Cc: Christophe Leroy Cc: Dave Hansen Cc: David S. Miller Cc: Fabio Estevam Cc: Ingo Molnar Cc: Jason Gunthorpe Cc: Konrad Dybcio Cc: Krzysztof Kozlowski Cc: Lucas Stach Cc: Mark Salter Cc: "Matthew Wilcox (Oracle)" Cc: Michael Ellerman Cc: Mike Rapoport (IBM) Cc: Muchun Song Cc: Naoya Horiguchi Cc: "Naveen N. Rao" Cc: Nicholas Piggin Cc: Russell King Cc: Shawn Guo Cc: Thomas Gleixner Cc: Will Deacon Signed-off-by: Andrew Morton List of files: /linux-6.15/arch/arm/mm/Makefile

a2faac39 - ARM: 9263/1: use .arch directives instead of assembler command line flags

Mon, 24 Oct 2022 19:44:41 +0000

ARM: 9263/1: use .arch directives instead of assembler command line flagsSimilar to commit a6c30873ee4a ("ARM: 8989/1: use .fpu assemblerdirectives instead of assembler arguments").GCC and GNU binutils support setting the "sub arch" via -march=,-Wa,-march, target function attribute, and .arch assembler directive.Clang was missing support for -Wa,-march=, but this was implemented inclang-13.The behavior of both GCC and Clang is toprefer -Wa,-march= over -march= for assembler and assembler-with-cppsources, but Clang will warn about the -march= being unused.clang: warning: argument unused during compilation: '-march=armv6k'[-Wunused-command-line-argument]Since most assembler is non-conditionally assembled with one sub arch(modulo arch/arm/delay-loop.S which conditionally is assembled as armv4based on CONFIG_ARCH_RPC, and arch/arm/mach-at91/pm-suspend.S which isconditionally assembled as armv7-a based on CONFIG_CPU_V7), prefer the.arch assembler directive.Add a few more instances found in compile testing as found by Arnd andNathan.Link: https://github.com/llvm/llvm-project/commit/1d51c699b9e2ebc5bcfdbe85c74cc871426333d4Link: https://bugs.llvm.org/show_bug.cgi?id=48894Link: https://github.com/ClangBuiltLinux/linux/issues/1195Link: https://github.com/ClangBuiltLinux/linux/issues/1315Suggested-by: Arnd Bergmann Suggested-by: Nathan Chancellor Signed-off-by: Arnd Bergmann Tested-by: Nathan Chancellor Signed-off-by: Nick Desaulniers Signed-off-by: Russell King (Oracle) List of files: /linux-6.15/arch/arm/mm/Makefile

2a15ba82 - ARM: highmem: Switch to generic kmap atomic

Tue, 03 Nov 2020 09:27:22 +0000

ARM: highmem: Switch to generic kmap atomicNo reason having the same code in every architecture.Signed-off-by: Thomas Gleixner Cc: Russell King Cc: Arnd Bergmann Link: https://lore.kernel.org/r/20201103095857.582196476@linutronix.de List of files: /linux-6.15/arch/arm/mm/Makefile

5615f69b - ARM: 9016/2: Initialize the mapping of KASan shadow memory

Sun, 25 Oct 2020 22:55:16 +0000

ARM: 9016/2: Initialize the mapping of KASan shadow memoryThis patch initializes KASan shadow region's page table and memory.There are two stage for KASan initializing:1. At early boot stage the whole shadow region is mapped to just one physical page (kasan_zero_page). It is finished by the function kasan_early_init which is called by __mmap_switched(arch/arm/kernel/ head-common.S)2. After the calling of paging_init, we use kasan_zero_page as zero shadow for some memory that KASan does not need to track, and we allocate a new shadow space for the other memory that KASan need to track. These issues are finished by the function kasan_init which is call by setup_arch.When using KASan we also need to increase the THREAD_SIZE_ORDERfrom 1 to 2 as the extra calls for shadow memory uses quite a bitof stack.As we need to make a temporary copy of the PGD when setting upshadow memory we create a helpful PGD_SIZE definition for bothLPAE and non-LPAE setups.The KASan core code unconditionally calls pud_populate() so thisneeds to be changed from BUG() to do {} while (0) when buildingwith KASan enabled.After the initial development by Andre Ryabinin several modificationshave been made to this code:Abbott Liu - Add support ARM LPAE: If LPAE is enabled, KASan shadow region's mapping table need be copied in the pgd_alloc() function.- Change kasan_pte_populate,kasan_pmd_populate,kasan_pud_populate, kasan_pgd_populate from .meminit.text section to .init.text section. Reported by Florian Fainelli Linus Walleij :- Drop the custom mainpulation of TTBR0 and just use cpu_switch_mm() to switch the pgd table.- Adopt to handle 4th level page tabel folding.- Rewrite the entire page directory and page entry initialization sequence to be recursive based on ARM64:s kasan_init.c.Ard Biesheuvel :- Necessary underlying fixes.- Crucial bug fixes to the memory set-up code.Co-developed-by: Andrey Ryabinin Co-developed-by: Abbott Liu Co-developed-by: Ard Biesheuvel Cc: Alexander Potapenko Cc: Dmitry Vyukov Cc: kasan-dev@googlegroups.comCc: Mike Rapoport Acked-by: Mike Rapoport Reviewed-by: Ard Biesheuvel Tested-by: Ard Biesheuvel # QEMU/KVM/mach-virt/LPAE/8GTested-by: Florian Fainelli # Brahma SoCsTested-by: Ahmad Fatoum # i.MX6QReported-by: Russell King - ARM Linux Reported-by: Florian Fainelli Signed-off-by: Andrey Ryabinin Signed-off-by: Abbott Liu Signed-off-by: Florian Fainelli Signed-off-by: Ard Biesheuvel Signed-off-by: Linus Walleij Signed-off-by: Russell King List of files: /linux-6.15/arch/arm/mm/Makefile

d5d44e7e - ARM: 9013/2: Disable KASan instrumentation for some code

Sun, 25 Oct 2020 22:50:09 +0000

ARM: 9013/2: Disable KASan instrumentation for some codeDisable instrumentation for arch/arm/boot/compressed/*since that code is executed before the kernel has evenset up its mappings and definately out of scope forKASan.Disable instrumentation of arch/arm/vdso/* because that codeis not linked with the kernel image, so the KASan managementcode would fail to link.Disable instrumentation of arch/arm/mm/physaddr.c. See commitec6d06efb0ba ("arm64: Add support for CONFIG_DEBUG_VIRTUAL")for more details.Disable kasan check in the function unwind_pop_register becauseit does not matter that kasan checks failed when unwind_pop_register()reads the stack memory of a task.Cc: Andrey Ryabinin Cc: Alexander Potapenko Cc: Dmitry Vyukov Cc: kasan-dev@googlegroups.comReviewed-by: Ard Biesheuvel Tested-by: Ard Biesheuvel # QEMU/KVM/mach-virt/LPAE/8GTested-by: Florian Fainelli # Brahma SoCsTested-by: Ahmad Fatoum # i.MX6QReported-by: Florian Fainelli Reported-by: Marc Zyngier Signed-off-by: Abbott Liu Signed-off-by: Florian Fainelli Signed-off-by: Linus Walleij Signed-off-by: Russell King List of files: /linux-6.15/arch/arm/mm/Makefile

e388b802 - ARM: spectre-v2: add Cortex A8 and A15 validation of the IBE bit

Thu, 10 May 2018 12:09:54 +0000

ARM: spectre-v2: add Cortex A8 and A15 validation of the IBE bitWhen the branch predictor hardening is enabled, firmware must have setthe IBE bit in the auxiliary control register. If this bit has notbeen set, the Spectre workarounds will not be functional.Add validation that this bit is set, and print a warning at alert levelif this is not the case.Signed-off-by: Russell King Reviewed-by: Florian Fainelli Boot-tested-by: Tony Lindgren Reviewed-by: Tony Lindgren List of files: /linux-6.15/arch/arm/mm/Makefile

046835b4 - ARM: 8757/1: NOMMU: Support PMSAv8 MPU

Tue, 03 Apr 2018 09:39:23 +0000

ARM: 8757/1: NOMMU: Support PMSAv8 MPUARMv8R/M architecture defines new memory protection scheme - PMSAv8which is not compatible with PMSAv7.Key differences to PMSAv7 are: - Region geometry is defined by base and limit addresses - Addresses need to be either 32 or 64 byte aligned - No region priority due to overlapping regions are not allowed - It is unified, i.e. no distinction between data/instruction regions - Memory attributes are controlled via MAIRThis patch implements support for PMSAv8 MPU defined by ARMv8R/Marchitecture.Signed-off-by: Vladimir Murzin Signed-off-by: Russell King List of files: /linux-6.15/arch/arm/mm/Makefile

4fb69cc4 - ARM: 8735/1: mm: dump: make page table dumping reusable

Tue, 12 Dec 2017 00:41:09 +0000

ARM: 8735/1: mm: dump: make page table dumping reusableThis patch refactors the arm page table dumping code,so multiple tables may be registered with the framework.This patch refers below commits of arm64.(4674fdb9f149 ("arm64: mm: dump: make page table dumping reusable"))(4ddb9bf83349 ("arm64: dump: Make ptdump debugfs a separate option"))Reviewed-by: Kees Cook Tested-by: Laura Abbott Reviewed-by: Laura Abbott Signed-off-by: Jinbum Park Signed-off-by: Russell King List of files: /linux-6.15/arch/arm/mm/Makefile

f6f9be1c - ARM: 8725/1: Add Broadcom Brahma-B15 readahead cache support

Fri, 01 Dec 2017 00:10:09 +0000

ARM: 8725/1: Add Broadcom Brahma-B15 readahead cache supportThis patch adds support for the Broadcom Brahma-B15 CPU readahead cachecontroller. This cache controller sits between the L2 and the memory busand its purpose is to provide a friendler burst size towards the DDRinterface than the native cache line size.The readahead cache is mostly transparent, except forflush_kern_cache_all, which is precisely what we are overriding here.The readahead cache only intercepts reads, and does invalidate onwrites (IOW), as such, some data can remain stale in any of its buffers, suchthat we need to flush it, which is an operation that needs to happen ina particular order:- disable the readahead cache- flush it- call the appropriate cache-v7.S function- re-enableThis patch tries to minimize the impact to the cache-v7.S file by onlyproviding a stub in case CONFIG_CACHE_B15_RAC is enabled (default forARCH_BRCMSTB since it is the current user).Signed-off-by: Alamy Liu Signed-off-by: Florian Fainelli Signed-off-by: Russell King List of files: /linux-6.15/arch/arm/mm/Makefile

b2441318 - License cleanup: add SPDX GPL-2.0 license identifier to files with no license

Wed, 01 Nov 2017 14:07:57 +0000

License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseMany source files in the tree are missing licensing information, whichmakes it harder for compliance tools to determine the correct license.By default all files without license information are under the defaultlicense of the kernel, which is GPL version 2.Update the files which contain no license information with the 'GPL-2.0'SPDX license identifier. The SPDX identifier is a legally bindingshorthand, which can be used instead of the full boiler plate text.This patch is based on work done by Thomas Gleixner and Kate Stewart andPhilippe Ombredanne.How this work was done:Patches were generated and checked against linux-4.14-rc6 for a subset ofthe use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information,Further patches will be generated in subsequent months to fix up caseswhere non-standard license headers were used, and references to licensehad to be inferred by heuristics based on keywords.The analysis to determine which SPDX License Identifier to be applied toa file was done in a spreadsheet of side by side results from of theoutput of two independent scanners (ScanCode & Windriver) producing SPDXtag:value files created by Philippe Ombredanne. Philippe prepared thebase worksheet, and did an initial spot review of a few 1000 files.The 4.13 kernel was the starting point of the analysis with 60,537 filesassessed. Kate Stewart did a file by file comparison of the scannerresults in the spreadsheet to determine which SPDX license identifier(s)to be applied to the file. She confirmed any determination that was notimmediately clear with lawyers working with the Linux Foundation.Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines).All documentation files were explicitly excluded.The following heuristics were used to determine which SPDX licenseidentifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time.In total, over 70 hours of logged manual review was done on thespreadsheet to determine the SPDX license identifiers to apply to thesource files by Kate, Philippe, Thomas and, in some cases, confirmationby lawyers working with the Linux Foundation.Kate also obtained a third independent scan of the 4.13 code base fromFOSSology, and compared selected files where the other two scannersdisagreed against that SPDX file, to see if there was new insights. TheWindriver scanner is based on an older version of FOSSology in part, sothey are related.Thomas did random spot checks in about 500 files from the spreadsheetsfor the uapi headers and agreed with SPDX license identifier in thefiles he inspected. For the non-uapi files Thomas did random spot checksin about 15000 files.In initial set of patches against 4.14-rc6, 3 files were found to havecopy/paste license identifier errors, and have been fixed to reflect thecorrect identifier.Additionally Philippe spent 10 hours this week doing a detailed manualinspection and review of the 12,461 patched files from the initial patchversion early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correctThis produced a worksheet with 20 files needing minor correction. Thisworksheet was then exported into 3 different .csv files for thedifferent types of files to be modified.These .csv files were then reviewed by Greg. Thomas wrote a script toparse the csv files and add the proper SPDX tag to the file, in theformat that the file expected. This script was further refined by Gregbased on the output to detect more types of files automatically and todistinguish between header and source .c files (which need differentcomment types.) Finally Greg ran the script using the .csv files togenerate the patches.Reviewed-by: Kate Stewart Reviewed-by: Philippe Ombredanne Reviewed-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman List of files: /linux-6.15/arch/arm/mm/Makefile

877ec119 - ARM: 8706/1: NOMMU: Move out MPU setup in separate module

Mon, 16 Oct 2017 11:52:35 +0000

ARM: 8706/1: NOMMU: Move out MPU setup in separate moduleHaving MPU handling code in dedicated module makes it easier toenhance/maintain it.Tested-by: Szemző András Tested-by: Alexandre TORGUE Tested-by: Benjamin Gaignard Signed-off-by: Vladimir Murzin Signed-off-by: Russell King List of files: /linux-6.15/arch/arm/mm/Makefile

1c51c429 - ARM: NOMMU: Introduce dma operations for noMMU

Wed, 24 May 2017 10:24:30 +0000

ARM: NOMMU: Introduce dma operations for noMMUR/M classes of cpus can have memory covered by MPU which in turn mightconfigure RAM as Normal i.e. bufferable and cacheable. It breaksdma_alloc_coherent() and friends, since data can stuck in caches nowor be buffered.This patch factors out DMA support for NOMMU configuration intoseparate entity which provides dedicated dma_ops. We have to handlethere several cases:- configurations with MMU/MPU setup- configurations without MMU/MPU setup- special case for M-class, since caches and MPU there are optionalIn general we rely on default DMA area for coherent allocations or/andper-device memory reserves suitable for coherent DMA, so if suchregions are set coherent allocations go from there.In case MMU/MPU was not setup we fallback to normal page allocator forDMA memory allocation.In case we run M-class cpus, for configuration without cache support(like Cortex-M3/M4) dma operations are forced to be coherent and wiredwith dma-noop (such decision is made based on cacheid globalvariable); however, if caches are detected there and no DMA coherentregion is given (either default or per-device), dma is disallowed evenMPU is not set - it is because M-class implement system memory mapwhich defines part of address space as Normal memory.Reported-by: Alexandre Torgue Reported-by: Andras Szemzo Tested-by: Benjamin Gaignard Tested-by: Andras Szemzo Tested-by: Alexandre TORGUE Reviewed-by: Robin Murphy Signed-off-by: Vladimir Murzin Acked-by: Arnd Bergmann Acked-by: Russell King [hch: removed the dma_supported() implementation that isn't required anymore]Signed-off-by: Christoph Hellwig List of files: /linux-6.15/arch/arm/mm/Makefile

e377cd82 - ARM: 8640/1: Add support for CONFIG_DEBUG_VIRTUAL

Sun, 15 Jan 2017 02:59:00 +0000

ARM: 8640/1: Add support for CONFIG_DEBUG_VIRTUALx86 has an option: CONFIG_DEBUG_VIRTUAL to do additional checks onvirt_to_phys calls. The goal is to catch users who are callingvirt_to_phys on non-linear addresses immediately. This includes callerusing __virt_to_phys() on image addresses instead of __pa_symbol(). Thisis a generally useful debug feature to spot bad code (particulary indrivers).Acked-by: Russell King Acked-by: Laura Abbott Signed-off-by: Florian Fainelli Signed-off-by: Russell King List of files: /linux-6.15/arch/arm/mm/Makefile

b828f960 - ARM: 8611/1: l2x0: add PMU support

Fri, 02 Sep 2016 09:35:18 +0000

ARM: 8611/1: l2x0: add PMU supportThe L2C-220 (AKA L220) and L2C-310 (AKA PL310) cache controllers featurea Performance Monitoring Unit (PMU), which can be useful for tuningand/or debugging. This hardware is always present and the relevantregisters are accessible to non-secure accesses. Thus, no specialfirmware interface is necessary.This patch adds support for the PMU, plugging into the usual perfinfrastructure. The overflow interrupt is not always available (e.g. onRealView PBX A9 it is not wired up at all), and the hardware counterssaturate, so the driver does not make use of this. Instead, the driverperiodically polls and reset counters as required to avoid losingevents due to saturation.Signed-off-by: Mark Rutland Acked-by: Pawel Moll Tested-by: Kim Phillips Cc: Russell King Cc: Will Deacon Signed-off-by: Russell King List of files: /linux-6.15/arch/arm/mm/Makefile

bc0ee9d2 - ARM: 8607/1: V7M: Wire up caches for V7M processors with cache support.

Tue, 30 Aug 2016 16:31:22 +0000

ARM: 8607/1: V7M: Wire up caches for V7M processors with cache support.This patch does the plumbing required to invoke the V7M cache code addedin earlier patches in this series, although there is no users for thatyet.In order to honour the I/D cache disable config options, this patch changesthe mechanism by which the CCR is set on boot, to be more like V7A/R.Signed-off-by: Jonathan Austin Signed-off-by: Vladimir Murzin Tested-by: Andras Szemzo Tested-by: Joachim Eastwood Tested-by: Alexandre TORGUE Signed-off-by: Russell King List of files: /linux-6.15/arch/arm/mm/Makefile

e7ecbc05 - ARM: uniphier: add outer cache support

Fri, 02 Oct 2015 04:42:19 +0000

ARM: uniphier: add outer cache supportThis commit adds support for UniPhier outer cache controller.All the UniPhier SoCs are equipped with the L2 cache, while the L3cache is currently only integrated on PH1-Pro5 SoC.Signed-off-by: Masahiro Yamada Acked-by: Rob Herring Signed-off-by: Olof Johansson List of files: /linux-6.15/arch/arm/mm/Makefile

d8dc7fbd - ARM: re-implement physical address space switching

Sat, 04 Apr 2015 15:58:38 +0000

ARM: re-implement physical address space switchingRe-implement the physical address space switching to be architecturallycompliant. This involves flushing the caches, disabling the MMU, andonly then updating the page tables. Once that is complete, the systemcan be brought back up again.Since we disable the MMU, we need to do the update in assembly code.Luckily, the entries which need updating are fairly trivial, and areall setup by the early assembly code. We can merely adjust each entryby the delta required.Not only does this fix the code to be architecturally compliant, but itfixes a couple of bugs too:1. The original code would only ever update the first L2 entry covering a fraction of the kernel; the remainder were left untouched.2. The L2 entries covering the DTB blob were likewise untouched.This solution fixes up all entries.Tested-by: Murali Karicheri Signed-off-by: Russell King List of files: /linux-6.15/arch/arm/mm/Makefile