Changes in sysfs-platform-intel-pmc

10317dda - ABI: sysfs-platform-intel-pmc: add blank lines to make it valid for ReST

Mon, 27 Sep 2021 11:10:56 +0000

ABI: sysfs-platform-intel-pmc: add blank lines to make it valid for ReSTThe ReST format requires blank lines before/after identation changes,for it to properly detect lists.Fixes: ee7abc105e2b ("platform/x86: intel_pmc_core: export platform global reset bits via etr3 sysfs file")Signed-off-by: Mauro Carvalho Chehab Link: https://lore.kernel.org/r/3673e1a255ad4100c933af215b60d68ba126f820.1632740376.git.mchehab+huawei@kernel.orgSigned-off-by: Hans de Goede List of files: /linux-6.15/Documentation/ABI/testing/sysfs-platform-intel-pmc

3cb1fead - ABI: sysfs-platform-intel-pmc: add blank lines to make it valid for ReST

Mon, 27 Sep 2021 11:10:56 +0000

ABI: sysfs-platform-intel-pmc: add blank lines to make it valid for ReSTThe ReST format requires blank lines before/after identation changes,for it to properly detect lists.Fixes: ee7abc105e2b ("platform/x86: intel_pmc_core: export platform global reset bits via etr3 sysfs file")Signed-off-by: Mauro Carvalho Chehab Link: https://lore.kernel.org/r/3673e1a255ad4100c933af215b60d68ba126f820.1632740376.git.mchehab+huawei@kernel.orgSigned-off-by: Greg Kroah-Hartman List of files: /linux-6.15/Documentation/ABI/testing/sysfs-platform-intel-pmc

ee7abc10 - platform/x86: intel_pmc_core: export platform global reset bits via etr3 sysfs file

Sun, 11 Apr 2021 14:15:32 +0000

platform/x86: intel_pmc_core: export platform global reset bits via etr3 sysfs fileDuring PCH (platform/board) manufacturing process a global platformreset has to be induced in order for the configuration changes takethe effect upon following platform reset. This is an internal platformstate and is not intended to be used in the regular platform resets.The setting is exposed via ETR3 (Extended Test Mode Register 3).After the manufacturing process is completed the register cannot bewritten anymore and is hardware locked.This setting was commonly done by accessing PMC registers via /dev/membut due to security concerns /dev/mem access is much more restricted,hence the reason for exposing this setting via the dedicated sysfsinterface.To prevent post manufacturing abuse the register is protectedby hardware locking and the file is set to read-only mode via is_visiblehandler.The register in MMIO space is defined for Cannon Lake and newer PCHs.Cc: Hans de Goede Cc: David E Box Reviewed-by: Andy Shevchenko Signed-off-by: Tamar Mashiah Signed-off-by: Tomas Winkler Link: https://lore.kernel.org/r/20210411141532.3004893-1-tomas.winkler@intel.comReviewed-by: Hans de Goede Signed-off-by: Hans de Goede List of files: /linux-6.15/Documentation/ABI/testing/sysfs-platform-intel-pmc