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    <title>Changes in mlx5_devx_cmds.h</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>7dac7abe - common/mlx5: check send on time capability</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#7dac7abe</link>
        <description>common/mlx5: check send on time capabilityThe patch provides check for send scheduling on time hardware capability.With this capability enabled hardware is able to handle Wait WQEswith directly specified timestamp values. No Clock Queue is neededanymore to handle send scheduling.Signed-off-by: Viacheslav Ovsiienko &lt;viacheslavo@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Thu, 24 Feb 2022 10:54:59 +0000</pubDate>
        <dc:creator>Viacheslav Ovsiienko &lt;viacheslavo@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>38eb5c9f - net/mlx5: fix E-Switch manager vport ID</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#38eb5c9f</link>
        <description>net/mlx5: fix E-Switch manager vport IDOne of the E-Switch vports plays the special role - it is assigned as&quot;E-Switch manager&quot; and has some special exclusive rights and duties - itmaintains all the representors, manages FDB domain flows, etc. Bydefault, the E-Switch vport index was supposed to be zero on standaloneNICs (regular ConnectX) and 0xFFFE SmartNIC (BlueField), but that wasnot always correct - this index can be assigned with any value bykernel/hypervisor.Currently the E-Switch manager vport id is supposed to be default - 0for standalone NICs, and 0xFFFE for the SmartNICs, and is deduced fromthe device PCI id.To handle this and do not suggest any default values, can use DevX APIto query E-Switch manager vport ID directly from the firmware duringinitialization, and use that value by default. If the new method is notprovided (legacy firmware), fallback to use the PCI id approach.Fixes: a564038699f9 (&quot;net/mlx5: support E-Switch manager egress traffic match&quot;)Cc: stable@dpdk.orgSigned-off-by: Shun Hao &lt;shunh@nvidia.com&gt;Acked-by: Viacheslav Ovsiienko &lt;viacheslavo@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Tue, 22 Feb 2022 15:07:16 +0000</pubDate>
        <dc:creator>Shun Hao &lt;shunh@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>10599cf8 - common/mlx5: add minimum WQE size for striding RQ</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#10599cf8</link>
        <description>common/mlx5: add minimum WQE size for striding RQSome devices have a WQE size limit for striding RQ. On some newerdevices, this limitation is smaller and information on its size isprovided by the firmware.This patch adds the attribute query from firmware: the minimum requiredsize of WQE buffer for striding RQ in granularity of Bytes.Cc: stable@dpdk.orgSigned-off-by: Michael Baum &lt;michaelba@nvidia.com&gt;Acked-by: Matan Azrad &lt;matan@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Tue, 23 Nov 2021 18:38:03 +0000</pubDate>
        <dc:creator>Michael Baum &lt;michaelba@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>ba707cdb - crypto/mlx5: fix queue size configuration</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#ba707cdb</link>
        <description>crypto/mlx5: fix queue size configurationThe DevX interface for QP creation expects the number of WQEBBs.Wrongly, the number of descriptors was provided to the QP creation.In addition, the QP size must be a power of 2 what was not guaranteed.Provide the number of WQEBBs to the QP creation API.Round up the SQ size to a power of 2.Rename (sq/rq)_size to num_of_(send/receive)_wqes.Fixes: 6152534e211e (&quot;crypto/mlx5: support queue pairs operations&quot;)Cc: stable@dpdk.orgSigned-off-by: Raja Zidane &lt;rzidane@nvidia.com&gt;Acked-by: Matan Azrad &lt;matan@nvidia.com&gt;Acked-by: Tal Shnaiderman &lt;talshn@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Mon, 08 Nov 2021 13:09:20 +0000</pubDate>
        <dc:creator>Raja Zidane &lt;rzidane@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>febcac7b - net/mlx5: support Rx queue delay drop</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#febcac7b</link>
        <description>net/mlx5: support Rx queue delay dropFor the Ethernet RQs, if there all receiving descriptors areexhausted, the packets being received will be dropped. This behaviorprevents slow or malicious software entities at the host fromaffecting the network. While for hairpin cases, even if there is nosoftware involved during the packet forwarding from Rx to Tx side,some hiccup in the hardware or back pressure from Tx side may stillcause the descriptors to be exhausted. In certain scenarios it may bepreferred to configure the device to avoid such packet drops,assuming the posting of descriptors will resume shortly.To support this, a new devarg &quot;delay_drop&quot; is introduced. By default,the delay drop is enabled for hairpin Rx queues and disabled forstandard Rx queues. This value is used as a bit mask:  - bit 0: enablement of standard Rx queue  - bit 1: enablement of hairpin Rx queueAnd this attribute will be applied to all Rx queues of a device.The &quot;rq_delay_drop&quot; capability in the HCA_CAP is checked beforecreating any queue. If the hardware capabilities do not supportthis delay drop, all the Rx queues will still be created withoutthis attribute, and the devarg setting will be ignored even if itis specified explicitly. A warning log is used to notify theapplication when this occurs.Signed-off-by: Bing Zhao &lt;bingz@nvidia.com&gt;Acked-by: Viacheslav Ovsiienko &lt;viacheslavo@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Fri, 05 Nov 2021 15:30:38 +0000</pubDate>
        <dc:creator>Bing Zhao &lt;bingz@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>ee160711 - common/mlx5: support basic receive memory pool</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#ee160711</link>
        <description>common/mlx5: support basic receive memory poolThe hardware Receive Memory Pool (RMP) object holds the destination forincoming packets/messages that are routed to the RMP through RQs. RMPenables sharing of memory across multiple Receive Queues. MultipleReceive Queues can be attached to the same RMP and consume memoryfrom that shared poll. When using RMPs, completions are reported to theCQ pointed to by the RQ, and this Completion Queue can be shared aswell.This patch adds DevX supports of PRM RMP object.Signed-off-by: Xueming Li &lt;xuemingl@nvidia.com&gt;Acked-by: Viacheslav Ovsiienko &lt;viacheslavo@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Thu, 04 Nov 2021 12:33:09 +0000</pubDate>
        <dc:creator>Xueming Li &lt;xuemingl@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>65be2ca6 - common/mlx5: extend flex parser capabilities</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#65be2ca6</link>
        <description>common/mlx5: extend flex parser capabilitiesMLX5 PARSE_GRAPH_NODE is the main data structure used by the FlexParser when a new parsing protocol is defined. While softwarecreates PARSE_GRAPH_NODE object for a new protocol, it mustverify that configuration parameters it uses comply withhardware limits.The patch queries hardware PARSE_GRAPH_NODE capabilities andstores ones in PMD internal configuration structure: - query capabilities from parse_graph_node attribute page - query max_num_prog_sample_field capability from HCA page 2Signed-off-by: Gregory Etelson &lt;getelson@nvidia.com&gt;Reviewed-by: Viacheslav Ovsiienko &lt;viacheslavo@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Tue, 02 Nov 2021 08:53:39 +0000</pubDate>
        <dc:creator>Gregory Etelson &lt;getelson@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>2044860e - common/mlx5: update PRM definitions for regex</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#2044860e</link>
        <description>common/mlx5: update PRM definitions for regexUpdate PRM hca capabilities definitions as follows:regexp_version field added - specifies whether BF2 or BF3regexp field removedregexp_params field movedregexp_log_crspace_size field removedregexp_mmo added - specifies if using regex mmo wqe is supportedAllow regex only if both regexp_params and regexp_mmo are set,instead of checking regexp_mmo only.Check version through the new capability field regexp_version insteadof reading crspace register.Signed-off-by: Ady Agbarih &lt;adypodoman@gmail.com&gt;Acked-by: Ori Kam &lt;orika@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Fri, 22 Oct 2021 15:45:51 +0000</pubDate>
        <dc:creator>Ady Agbarih &lt;adypodoman@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>cf5ac38d - common/mlx5: add LAG context query</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#cf5ac38d</link>
        <description>common/mlx5: add LAG context queryAdded a new function mlx5_devx_cmd_query_lag() to query LAGproperty from firmware including state/affinity/mode etc.Signed-off-by: Jiawei Wang &lt;jiaweiw@nvidia.com&gt;Signed-off-by: Rongwei Liu &lt;rongweil@nvidia.com&gt;Acked-by: Matan Azrad &lt;matan@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Thu, 21 Oct 2021 08:56:35 +0000</pubDate>
        <dc:creator>Rongwei Liu &lt;rongweil@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>a77bedf2 - common/mlx5: share common definitions</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#a77bedf2</link>
        <description>common/mlx5: share common definitionsCreate MACRO definitions file in the common driver as preparation for MRand basic probe sharing.Move relevant definitions from the net driver to the above file.Signed-off-by: Michael Baum &lt;michaelba@nvidia.com&gt;Acked-by: Matan Azrad &lt;matan@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Tue, 19 Oct 2021 20:55:47 +0000</pubDate>
        <dc:creator>Michael Baum &lt;michaelba@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>58a95bad - common/mlx5: read FCS scattering capability from DevX</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#58a95bad</link>
        <description>common/mlx5: read FCS scattering capability from DevXmlx5 in Windows needs the hca capability scatter_fcsto query the NIC support for the CRC keeping offload.Added the capability as part of the capabilitiesqueried by the PMD using DevX.Signed-off-by: Tal Shnaiderman &lt;talshn@nvidia.com&gt;Acked-by: Matan Azrad &lt;matan@nvidia.com&gt;Tested-by: Idan Hackmon &lt;idanhac@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Tue, 12 Oct 2021 12:45:52 +0000</pubDate>
        <dc:creator>Tal Shnaiderman &lt;talshn@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>3440836d - common/mlx5: read VLAN capability from DevX</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#3440836d</link>
        <description>common/mlx5: read VLAN capability from DevXmlx5 in Windows needs the hca capability vlan_capto query the NIC for VLAN stripping supportAdded the capability as part of the capabilitiesqueried by the PMD using DevX.Signed-off-by: Tal Shnaiderman &lt;talshn@nvidia.com&gt;Acked-by: Matan Azrad &lt;matan@nvidia.com&gt;Tested-by: Idan Hackmon &lt;idanhac@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Tue, 12 Oct 2021 12:45:50 +0000</pubDate>
        <dc:creator>Tal Shnaiderman &lt;talshn@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>d338df99 - common/mlx5: read TSO capability from DevX</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#d338df99</link>
        <description>common/mlx5: read TSO capability from DevXmlx5 in Windows needs the hca capability max_lso_capto query the NIC for TSO offloading support.Added the capability as part of the capabilitiesqueried by the PMD using DevX.Signed-off-by: Tal Shnaiderman &lt;talshn@nvidia.com&gt;Acked-by: Matan Azrad &lt;matan@nvidia.com&gt;Tested-by: Idan Hackmon &lt;idanhac@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Tue, 12 Oct 2021 12:45:48 +0000</pubDate>
        <dc:creator>Tal Shnaiderman &lt;talshn@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>cf9b3c1b - common/mlx5: read tunneling capabilities from DevX</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#cf9b3c1b</link>
        <description>common/mlx5: read tunneling capabilities from DevXmlx5 in Windows needs the tunneling hca capabilitiesto query the NIC for Inner TSO offloading support.Added the capability as part of the capabilitiesqueried by the PMD using DevX.Signed-off-by: Tal Shnaiderman &lt;talshn@nvidia.com&gt;Acked-by: Matan Azrad &lt;matan@nvidia.com&gt;Tested-by: Idan Hackmon &lt;idanhac@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Tue, 12 Oct 2021 12:45:46 +0000</pubDate>
        <dc:creator>Tal Shnaiderman &lt;talshn@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>643e4db0 - common/mlx5: read software parsing capabilities from DevX</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#643e4db0</link>
        <description>common/mlx5: read software parsing capabilities from DevXmlx5 in Windows needs the software parsing hca capabilitiesto query the NIC for TSO and Checksum offloading support.Added the capability as part of the capabilitiesqueried by the PMD using DevX.Signed-off-by: Tal Shnaiderman &lt;talshn@nvidia.com&gt;Acked-by: Matan Azrad &lt;matan@nvidia.com&gt;Tested-by: Idan Hackmon &lt;idanhac@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Tue, 12 Oct 2021 12:45:43 +0000</pubDate>
        <dc:creator>Tal Shnaiderman &lt;talshn@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>ddda0006 - common/mlx5: add MMO configuration for DevX queue pair</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#ddda0006</link>
        <description>common/mlx5: add MMO configuration for DevX queue pairA new configuration MMO was added to QP Context.If set, MMO WQEs are supported on this QP.For DMA MMO, supported only when dma_mmo_qp==1.For REGEXP MMO, supported only when regexp_mmo_qp==1.For COMPRESS MMO, supported only when compress_mmo_qp==1.For DECOMPRESS MMO, supported only when decompress_mmo_qp==1.Add support to DevX interface to set MMO bit.Signed-off-by: Raja Zidane &lt;rzidane@nvidia.com&gt;Acked-by: Matan Azrad &lt;matan@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Tue, 05 Oct 2021 12:27:31 +0000</pubDate>
        <dc:creator>Raja Zidane &lt;rzidane@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>cbc4c13a - common/mlx5: update MMO HCA capabilities</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#cbc4c13a</link>
        <description>common/mlx5: update MMO HCA capabilitiesNew MMO HCA capabilities were added and others were renamed.Align hca capabilities with new prm.Add support in DevX interface for changes in HCA capabilities.Signed-off-by: Raja Zidane &lt;rzidane@nvidia.com&gt;Acked-by: Matan Azrad &lt;matan@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Tue, 05 Oct 2021 12:27:30 +0000</pubDate>
        <dc:creator>Raja Zidane &lt;rzidane@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>f9213ab1 - common/mlx5: share DevX queue pair operations</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#f9213ab1</link>
        <description>common/mlx5: share DevX queue pair operationsCurrently drivers using QP (vDPA, crypto and compress, regex soon)manage their memory, creation, modification and destruction of the QP,in almost identical code.Move QP memory management, creation and destruction to common.Add common function to change QP state to RTS.Add user_index attribute to QP creation.It&apos;s for better code maintenance and reuse.Signed-off-by: Raja Zidane &lt;rzidane@nvidia.com&gt;Acked-by: Matan Azrad &lt;matan@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Tue, 05 Oct 2021 12:27:29 +0000</pubDate>
        <dc:creator>Raja Zidane &lt;rzidane@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>96f85ec4 - net/mlx5: check VLAN push/pop support</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#96f85ec4</link>
        <description>net/mlx5: check VLAN push/pop supportFor ConnectX-6 in FDB domain, pop and push VLANon both ingress and egress directions are supported.For ConnectX-6 in NIC domain, and ConnectX-5 in both FWD and NIC domain,pop VLAN is only supported on ingress direction,push VLAN is only supported on egress direction.Signed-off-by: Dong Zhou &lt;dongzhou@nvidia.com&gt;Acked-by: Matan Azrad &lt;matan@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Thu, 22 Jul 2021 07:48:39 +0000</pubDate>
        <dc:creator>Dong Zhou &lt;dongzhou@nvidia.com&gt;</dc:creator>
    </item>
<item>
        <title>c410e1d5 - net/mlx5: support flow matchng on IPv4 IHL</title>
        <link>http://172.16.0.5:8080/history/dpdk/drivers/common/mlx5/mlx5_devx_cmds.h#c410e1d5</link>
        <description>net/mlx5: support flow matchng on IPv4 IHLQuery MLX5 port hardware if it is capable to offload IPv4IHL field.Provide flow rules capability to match on IPv4 IHL field.Minimal HCA firmware version required to offload IPv4 IHL isxx_30_2000.Signed-off-by: Gregory Etelson &lt;getelson@nvidia.com&gt;Acked-by: Viacheslav Ovsiienko &lt;viacheslavo@nvidia.com&gt;

            List of files:
            /dpdk/drivers/common/mlx5/mlx5_devx_cmds.h</description>
        <pubDate>Mon, 05 Jul 2021 11:40:35 +0000</pubDate>
        <dc:creator>Gregory Etelson &lt;getelson@nvidia.com&gt;</dc:creator>
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