Lines Matching refs:src2
892 fn cmp(&mut self, src1: Reg, src2: RegImm, size: OperandSize) -> Result<()> { in cmp()
893 match src2 { in cmp()
905 RegImm::Reg(src2) => { in cmp()
906 self.asm.cmp_rr(src1, src2, size); in cmp()
929 src2: Reg, in float_cmp_with_set()
939 let (src1, src2, set_kind) = match kind { in float_cmp_with_set()
940 FloatCmpKind::Eq => (src1, src2, IntCmpKind::Eq), in float_cmp_with_set()
941 FloatCmpKind::Ne => (src1, src2, IntCmpKind::Ne), in float_cmp_with_set()
942 FloatCmpKind::Gt => (src1, src2, IntCmpKind::GtU), in float_cmp_with_set()
943 FloatCmpKind::Ge => (src1, src2, IntCmpKind::GeU), in float_cmp_with_set()
950 FloatCmpKind::Lt => (src2, src1, IntCmpKind::GtU), in float_cmp_with_set()
951 FloatCmpKind::Le => (src2, src1, IntCmpKind::GeU), in float_cmp_with_set()
953 self.asm.ucomis(src1, src2, size); in float_cmp_with_set()
1975 fn v128_and(&mut self, src1: Reg, src2: Reg, dst: WritableReg) -> Result<()> { in v128_and()
1977 self.asm.xmm_vpand_rrr(src1, src2, dst); in v128_and()
1981 fn v128_and_not(&mut self, src1: Reg, src2: Reg, dst: WritableReg) -> Result<()> { in v128_and_not()
1983 self.asm.xmm_vpandn_rrr(src1, src2, dst); in v128_and_not()
1987 fn v128_or(&mut self, src1: Reg, src2: Reg, dst: WritableReg) -> Result<()> { in v128_or()
1989 self.asm.xmm_vpor_rrr(dst, src1, src2); in v128_or()
1993 fn v128_xor(&mut self, src1: Reg, src2: Reg, dst: WritableReg) -> Result<()> { in v128_xor()
1995 self.asm.xmm_vpxor_rrr(src1, src2, dst); in v128_xor()
1999 fn v128_bitselect(&mut self, src1: Reg, src2: Reg, mask: Reg, dst: WritableReg) -> Result<()> { in v128_bitselect()
2004 masm.v128_and_not(mask, src2, dst)?; in v128_bitselect()
2091 src2: Reg, in v128_narrow()
2099 .xmm_vpackss_rrr(src1, src2, dst, kind.dst_lane_size()) in v128_narrow()
2103 .xmm_vpackus_rrr(src1, src2, dst, kind.dst_lane_size()) in v128_narrow()
2839 src2: Reg, in v128_min()
2854 self.asm.xmm_vpmins_rrr(dst, src1, src2, OperandSize::S8) in v128_min()
2857 self.asm.xmm_vpminu_rrr(dst, src1, src2, OperandSize::S8) in v128_min()
2860 self.asm.xmm_vpmins_rrr(dst, src1, src2, OperandSize::S16) in v128_min()
2863 self.asm.xmm_vpminu_rrr(dst, src1, src2, OperandSize::S16) in v128_min()
2866 self.asm.xmm_vpmins_rrr(dst, src1, src2, OperandSize::S32) in v128_min()
2869 self.asm.xmm_vpminu_rrr(dst, src1, src2, OperandSize::S32) in v128_min()
2882 .xmm_vminp_rrr(src1, src2, scratch.writable(), kind.lane_size()); in v128_min()
2883 masm.asm.xmm_vminp_rrr(src2, src1, dst, kind.lane_size()); in v128_min()
2891 writable!(src2), in v128_min()
2892 src2, in v128_min()
2899 .xmm_vorp_rrr(src2, dst.to_reg(), dst, kind.lane_size()); in v128_min()
2900 self.canonicalize_nans(writable!(src2), dst, kind.lane_size()); in v128_min()
2910 src2: Reg, in v128_max()
2925 self.asm.xmm_vpmaxs_rrr(dst, src1, src2, OperandSize::S8) in v128_max()
2928 self.asm.xmm_vpmaxu_rrr(dst, src1, src2, OperandSize::S8) in v128_max()
2931 self.asm.xmm_vpmaxs_rrr(dst, src1, src2, OperandSize::S16) in v128_max()
2934 self.asm.xmm_vpmaxu_rrr(dst, src1, src2, OperandSize::S16) in v128_max()
2937 self.asm.xmm_vpmaxs_rrr(dst, src1, src2, OperandSize::S32) in v128_max()
2940 self.asm.xmm_vpmaxu_rrr(dst, src1, src2, OperandSize::S32) in v128_max()
2954 .xmm_vmaxp_rrr(src1, src2, scratch.writable(), kind.lane_size()); in v128_max()
2955 masm.asm.xmm_vmaxp_rrr(src2, src1, dst, kind.lane_size()); in v128_max()
2963 writable!(src2), in v128_max()
2968 .xmm_vsub_rrr(src2, dst.to_reg(), dst, kind.lane_size()); in v128_max()
2971 writable!(src2), in v128_max()
2972 src2, in v128_max()
2973 src2, in v128_max()
2977 self.canonicalize_nans(writable!(src2), dst, kind.lane_size()); in v128_max()
2994 let src2 = context.pop_to_reg(self, None)?; in v128_extmul() localVariable
2998 self.v128_extend(src2.reg, writable!(src2.reg), ext_kind)?; in v128_extmul()
3000 context.stack.push(src2.into()); in v128_extmul()