31 use crate::reg::WritableReg;
67 fn pair_gpr(reg: WritableReg) -> PairedGpr {  in pair_gpr()
88 fn pair_xmm(reg: WritableReg) -> PairedXmm {  in pair_xmm()
324     pub fn load_fp_const(&mut self, dst: WritableReg, constant: &[u8], size: OperandSize) {  in load_fp_const()  argument
375     pub fn pop_r(&mut self, dst: WritableReg) {  in pop_r()  argument
388     pub fn mov_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in mov_rr()  argument
435     pub fn mov_ir(&mut self, imm: u64, dst: WritableReg, size: OperandSize) {  in mov_ir()  argument
443         dst: WritableReg,  in movzx_mr()  argument
479         dst: WritableReg,  in movsx_mr()  argument
496     pub fn movzx_rr(&mut self, src: Reg, dst: WritableReg, kind: Extend<Zero>) {  in movzx_rr()  argument
517     pub fn movsx_rr(&mut self, src: Reg, dst: WritableReg, kind: Extend<Signed>) {  in movsx_rr()  argument
530     pub fn cmov(&mut self, src: Reg, dst: WritableReg, cc: IntCmpKind, size: OperandSize) {  in cmov()  argument
567     pub fn xmm_mov_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xmm_mov_rr()  argument
581         dst: WritableReg,  in xmm_mov_mr()  argument
604         dst: WritableReg,  in xmm_vpmov_mr()  argument
623     pub fn xmm_vpmov_rr(&mut self, src: Reg, dst: WritableReg, kind: VpmovKind) {  in xmm_vpmov_rr()  argument
640         dst: WritableReg,  in xmm_vpbroadcast_mr()  argument
657     pub fn xmm_vpbroadcast_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vpbroadcast_rr()  argument
673         dst: WritableReg,  in xmm_vpshuf_mr()  argument
688     pub fn xmm_vpshuf_rr(&mut self, src: Reg, dst: WritableReg, mask: u8, size: OperandSize) {  in xmm_vpshuf_rr()  argument
718     pub fn xmm_cmov(&mut self, src: Reg, dst: WritableReg, cc: IntCmpKind, size: OperandSize) {  in xmm_cmov()  argument
738     pub fn sub_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in sub_rr()  argument
751     pub fn sub_ir(&mut self, imm: i32, dst: WritableReg, size: OperandSize) {  in sub_ir()  argument
764     pub fn and_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in and_rr()  argument
776     pub fn and_ir(&mut self, imm: i32, dst: WritableReg, size: OperandSize) {  in and_ir()  argument
789     pub fn xmm_and_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xmm_and_rr()  argument
800     pub fn xmm_andn_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xmm_andn_rr()  argument
810     pub fn gpr_to_xmm(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in gpr_to_xmm()  argument
821     pub fn xmm_to_gpr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xmm_to_gpr()  argument
837         dst: WritableReg,  in cvt_float_to_sint_seq()  argument
859         dst: WritableReg,  in cvt_float_to_uint_seq()  argument
883         dst: WritableReg,  in cvt_sint_to_float()  argument
903         dst: WritableReg,  in cvt_uint64_to_float_seq()  argument
921         dst: WritableReg,  in cvt_float_to_float()  argument
935     pub fn or_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in or_rr()  argument
947     pub fn or_ir(&mut self, imm: i32, dst: WritableReg, size: OperandSize) {  in or_ir()  argument
959     pub fn xmm_or_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xmm_or_rr()  argument
970     pub fn xor_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xor_rr()  argument
982     pub fn xor_ir(&mut self, imm: i32, dst: WritableReg, size: OperandSize) {  in xor_ir()  argument
995     pub fn xmm_xor_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xmm_xor_rr()  argument
1006     pub fn shift_rr(&mut self, src: Reg, dst: WritableReg, kind: ShiftKind, size: OperandSize) {  in shift_rr()  argument
1030     pub fn shift_ir(&mut self, imm: u8, dst: WritableReg, kind: ShiftKind, size: OperandSize) {  in shift_ir()  argument
1165     pub fn mul_ir(&mut self, imm: i32, dst: WritableReg, size: OperandSize) {  in mul_ir()  argument
1179     pub fn mul_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in mul_rr()  argument
1192     pub fn add_ir(&mut self, imm: i32, dst: WritableReg, size: OperandSize) {  in add_ir()  argument
1205     pub fn add_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in add_rr()  argument
1220         dst: WritableReg,  in lock_xadd()  argument
1242         dst: WritableReg,  in atomic_rmw_seq()  argument
1243         temp: WritableReg,  in atomic_rmw_seq()  argument
1260     pub fn xchg(&mut self, addr: Address, dst: WritableReg, size: OperandSize, flags: MemFlags) {  in xchg()  argument
1278         dst: WritableReg,  in cmpxchg()  argument
1346     pub fn popcnt(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in popcnt()  argument
1376     pub fn setcc(&mut self, kind: IntCmpKind, dst: WritableReg) {  in setcc()  argument
1382     pub fn setp(&mut self, dst: WritableReg) {  in setp()  argument
1388     pub fn setnp(&mut self, dst: WritableReg) {  in setnp()  argument
1392     fn setcc_impl(&mut self, cc: CC, dst: WritableReg) {  in setcc_impl()  argument
1428     pub fn lzcnt(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in lzcnt()  argument
1442     pub fn tzcnt(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in tzcnt()  argument
1456     pub fn bsr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in bsr()  argument
1468     pub fn neg(&mut self, read: Reg, write: WritableReg, size: OperandSize) {  in neg()  argument
1485     pub fn bsf(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in bsf()  argument
1497     pub fn xmm_add_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xmm_add_rr()  argument
1508     pub fn xmm_sub_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xmm_sub_rr()  argument
1519     pub fn xmm_mul_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xmm_mul_rr()  argument
1531     pub fn xmm_div_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xmm_div_rr()  argument
1542     pub fn xmm_min_seq(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xmm_min_seq()  argument
1553     pub fn xmm_max_seq(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xmm_max_seq()  argument
1568         dst: WritableReg,  in xmm_rounds_rr()  argument
1590     pub fn sqrt(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in sqrt()  argument
1661     pub fn lea(&mut self, addr: &Address, dst: WritableReg, size: OperandSize) {  in lea()  argument
1673     pub fn adc_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in adc_rr()  argument
1685     pub fn sbb_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in sbb_rr()  argument
1699         dst_lo: WritableReg,  in mul_wide()  argument
1700         dst_hi: WritableReg,  in mul_wide()  argument
1734     pub fn xmm_vpshufb_rrm(&mut self, dst: WritableReg, src: Reg, mask: &Address) {  in xmm_vpshufb_rrm()  argument
1743     pub fn xmm_vpshufb_rrr(&mut self, dst: WritableReg, src: Reg, mask: Reg) {  in xmm_vpshufb_rrr()  argument
1755         dst: WritableReg,  in xmm_vpaddus_rrm()  argument
1774     pub fn xmm_vpaddus_rrr(&mut self, dst: WritableReg, src1: Reg, src2: Reg, size: OperandSize) {  in xmm_vpaddus_rrr()  argument
1785     pub fn xmm_vpadds_rrr(&mut self, dst: WritableReg, src1: Reg, src2: Reg, size: OperandSize) {  in xmm_vpadds_rrr()  argument
1799         dst: WritableReg,  in xmm_vpadd_rmr()  argument
1815     pub fn xmm_vpadd_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vpadd_rrr()  argument
1855     pub fn xmm_vpextr_rr(&mut self, dst: WritableReg, src: Reg, lane: u8, size: OperandSize) {  in xmm_vpextr_rr()  argument
1871         dst: WritableReg,  in xmm_vpinsr_rrm()  argument
1894         dst: WritableReg,  in xmm_vpinsr_rrr()  argument
1912     pub fn xmm_vinsertps_rrm(&mut self, dst: WritableReg, src1: Reg, address: &Address, imm: u8) {  in xmm_vinsertps_rrm()  argument
1920     pub fn xmm_vinsertps_rrr(&mut self, dst: WritableReg, src1: Reg, src2: Reg, imm: u8) {  in xmm_vinsertps_rrr()  argument
1928     pub fn xmm_vmovsd_rrr(&mut self, dst: WritableReg, src1: Reg, src2: Reg) {  in xmm_vmovsd_rrr()  argument
1936     pub fn xmm_vmovsd_rm(&mut self, dst: WritableReg, src: &Address) {  in xmm_vmovsd_rm()  argument
1946     pub fn xmm_vmovlhps_rrm(&mut self, dst: WritableReg, src1: Reg, src2: &Address) {  in xmm_vmovlhps_rrm()  argument
1956     pub fn xmm_vmovlhps_rrr(&mut self, dst: WritableReg, src1: Reg, src2: Reg) {  in xmm_vmovlhps_rrr()  argument
1963     pub fn xmm_vmovdqu_mr(&mut self, src: &Address, dst: WritableReg, flags: MemFlags) {  in xmm_vmovdqu_mr()  argument
1971     pub fn avx_gpr_to_xmm(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in avx_gpr_to_xmm()  argument
1988     pub fn xmm_vcvt_rr(&mut self, src: Reg, dst: WritableReg, kind: VcvtKind) {  in xmm_vcvt_rr()  argument
2002     pub fn xmm_vsubp_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vsubp_rrr()  argument
2013     pub fn xmm_vpsub_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vpsub_rrr()  argument
2026     pub fn xmm_vpsubus_rrr(&mut self, dst: WritableReg, src1: Reg, src2: Reg, size: OperandSize) {  in xmm_vpsubus_rrr()  argument
2037     pub fn xmm_vpsubs_rrr(&mut self, dst: WritableReg, src1: Reg, src2: Reg, size: OperandSize) {  in xmm_vpsubs_rrr()  argument
2052         dst: WritableReg,  in xmm_vaddp_rrm()  argument
2066     pub fn xmm_vaddp_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vaddp_rrr()  argument
2081         dst: WritableReg,  in xmm_vpcmpeq_rrm()  argument
2100     pub fn xmm_vpcmpeq_rrr(&mut self, dst: WritableReg, lhs: Reg, rhs: Reg, size: OperandSize) {  in xmm_vpcmpeq_rrr()  argument
2114     pub fn xmm_vpcmpgt_rrr(&mut self, dst: WritableReg, lhs: Reg, rhs: Reg, size: OperandSize) {  in xmm_vpcmpgt_rrr()  argument
2128     pub fn xmm_vpmaxs_rrr(&mut self, dst: WritableReg, lhs: Reg, rhs: Reg, size: OperandSize) {  in xmm_vpmaxs_rrr()  argument
2141     pub fn xmm_vpmaxu_rrr(&mut self, dst: WritableReg, lhs: Reg, rhs: Reg, size: OperandSize) {  in xmm_vpmaxu_rrr()  argument
2154     pub fn xmm_vpmins_rrr(&mut self, dst: WritableReg, lhs: Reg, rhs: Reg, size: OperandSize) {  in xmm_vpmins_rrr()  argument
2167     pub fn xmm_vpminu_rrr(&mut self, dst: WritableReg, lhs: Reg, rhs: Reg, size: OperandSize) {  in xmm_vpminu_rrr()  argument
2182         dst: WritableReg,  in xmm_vcmpp_rrr()  argument
2206     pub fn xmm_vsub_rrm(&mut self, src1: Reg, src2: &Address, dst: WritableReg, size: OperandSize) {  in xmm_vsub_rrm()  argument
2218     pub fn xmm_vsub_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vsub_rrr()  argument
2230     pub fn xmm_vpackss_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vpackss_rrr()  argument
2242     pub fn xmm_vpackus_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vpackus_rrr()  argument
2254     pub fn xmm_vpalignr_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, imm: u8) {  in xmm_vpalignr_rrr()  argument
2266         dst: WritableReg,  in xmm_vunpcklp_rrm()  argument
2280     pub fn xmm_vunpckhp_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vunpckhp_rrr()  argument
2291     pub fn xmm_vpunpckl_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vpunpckl_rrr()  argument
2303     pub fn xmm_vpunpckh_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vpunpckh_rrr()  argument
2313     pub(crate) fn vpmullq(&mut self, src1: Reg, src2: Reg, dst: WritableReg) {  in vpmullq()  argument
2324         dst: WritableReg,  in xmm_vpmovmsk_rr()  argument
2343         dst: WritableReg,  in xmm_vmovskp_rr()  argument
2360     pub fn xmm_vpabs_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vpabs_rr()  argument
2373     pub fn xmm_vpsra_rrr(&mut self, src: Reg, amount: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vpsra_rrr()  argument
2385     pub fn xmm_vpsra_rri(&mut self, src: Reg, dst: WritableReg, imm: u32, size: OperandSize) {  in xmm_vpsra_rri()  argument
2396     pub fn xmm_vpsll_rri(&mut self, src: Reg, dst: WritableReg, imm: u32, size: OperandSize) {  in xmm_vpsll_rri()  argument
2408     pub fn xmm_vpsll_rrr(&mut self, src: Reg, amount: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vpsll_rrr()  argument
2420     pub fn xmm_vpsrl_rri(&mut self, src: Reg, dst: WritableReg, imm: u32, size: OperandSize) {  in xmm_vpsrl_rri()  argument
2433     pub fn xmm_vpsrl_rrr(&mut self, src: Reg, amount: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vpsrl_rrr()  argument
2450         dst: WritableReg,  in xmm_vandp_rrm()  argument
2465     pub fn xmm_vandp_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vandp_rrr()  argument
2477     pub fn xmm_vpand_rrm(&mut self, src1: Reg, src2: &Address, dst: WritableReg) {  in xmm_vpand_rrm()  argument
2486     pub fn xmm_vpand_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg) {  in xmm_vpand_rrr()  argument
2494     pub fn xmm_vandnp_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vandnp_rrr()  argument
2506     pub fn xmm_vpandn_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg) {  in xmm_vpandn_rrr()  argument
2514     pub fn xmm_vorp_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vorp_rrr()  argument
2525     pub fn xmm_vpor_rrr(&mut self, dst: WritableReg, src1: Reg, src2: Reg) {  in xmm_vpor_rrr()  argument
2533     pub fn xmm_vxorp_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vxorp_rrr()  argument
2545     pub fn xmm_vpxor_rmr(&mut self, src: Reg, address: &Address, dst: WritableReg) {  in xmm_vpxor_rmr()  argument
2554     pub fn xmm_vpxor_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg) {  in xmm_vpxor_rrr()  argument
2562     pub fn xmm_vmaxp_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vmaxp_rrr()  argument
2578         dst: WritableReg,  in xmm_vminp_rrm()  argument
2593     pub fn xmm_vminp_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vminp_rrr()  argument
2607         dst: WritableReg,  in xmm_vroundp_rri()  argument
2633         dst: WritableReg,  in xmm_vshufp_rrri()  argument
2651     pub fn xmm_vpmulhrs_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vpmulhrs_rrr()  argument
2660     pub fn xmm_vpmuldq_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg) {  in xmm_vpmuldq_rrr()  argument
2666     pub fn xmm_vpmuludq_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg) {  in xmm_vpmuludq_rrr()  argument
2672     pub fn xmm_vpmull_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vpmull_rrr()  argument
2682     pub fn xmm_vmulp_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vmulp_rrr()  argument
2694     pub fn xmm_vpavg_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vpavg_rrr()  argument
2706     pub fn xmm_vdivp_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vdivp_rrr()  argument
2718     pub fn xmm_vsqrtp_rr(&mut self, src: Reg, dst: WritableReg, size: OperandSize) {  in xmm_vsqrtp_rr()  argument
2729     pub fn xmm_vpmaddubsw_rmr(&mut self, src: Reg, address: &Address, dst: WritableReg) {  in xmm_vpmaddubsw_rmr()  argument
2737     pub fn xmm_vpmaddubsw_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg) {  in xmm_vpmaddubsw_rrr()  argument
2744     pub fn xmm_vpmaddwd_rmr(&mut self, src: Reg, address: &Address, dst: WritableReg) {  in xmm_vpmaddwd_rmr()  argument
2752     pub fn xmm_vpmaddwd_rrr(&mut self, src1: Reg, src2: Reg, dst: WritableReg) {  in xmm_vpmaddwd_rrr()  argument