Lines Matching refs:OperandSize
11 masm::OperandSize,
38 impl From<OperandSize> for inst::OperandSize { implementation
39 fn from(size: OperandSize) -> Self { in from()
41 OperandSize::S32 => Self::Size32, in from()
42 OperandSize::S64 => Self::Size64, in from()
78 impl From<OperandSize> for ScalarSize {
79 fn from(size: OperandSize) -> ScalarSize { in from()
81 OperandSize::S8 => ScalarSize::Size8, in from()
82 OperandSize::S16 => ScalarSize::Size16, in from()
83 OperandSize::S32 => ScalarSize::Size32, in from()
84 OperandSize::S64 => ScalarSize::Size64, in from()
85 OperandSize::S128 => ScalarSize::Size128, in from()
171 pub fn str(&mut self, reg: Reg, mem: AMode, size: OperandSize, flags: MemFlags) { in str() argument
172 use OperandSize::*; in str()
215 pub fn sload(&mut self, mem: AMode, rd: WritableReg, size: OperandSize, flags: MemFlags) { in sload() argument
220 pub fn uload(&mut self, mem: AMode, rd: WritableReg, size: OperandSize, flags: MemFlags) { in uload() argument
229 size: OperandSize, in ldr() argument
233 use OperandSize::*; in ldr()
308 pub fn mov_ir(&mut self, rd: WritableReg, imm: Imm, size: OperandSize) { in mov_ir() argument
336 pub fn mov_rr(&mut self, rm: Reg, rd: WritableReg, size: OperandSize) { in mov_rr() argument
346 pub fn fmov_rr(&mut self, rn: Reg, rd: WritableReg, size: OperandSize) { in fmov_rr() argument
349 OperandSize::S32 => Inst::FpuMove32 { in fmov_rr()
353 OperandSize::S64 => Inst::FpuMove64 { in fmov_rr()
363 pub fn mov_to_fpu(&mut self, rn: Reg, rd: WritableReg, size: OperandSize) { in mov_to_fpu() argument
372 pub fn mov_from_vec(&mut self, rn: Reg, rd: WritableReg, idx: u8, size: OperandSize) { in mov_from_vec() argument
382 pub fn add_ir(&mut self, imm: Imm12, rn: Reg, rd: WritableReg, size: OperandSize) { in add_ir() argument
387 pub fn adds_ir(&mut self, imm: Imm12, rn: Reg, rd: WritableReg, size: OperandSize) { in adds_ir() argument
392 pub fn add_rrr(&mut self, rm: Reg, rn: Reg, rd: WritableReg, size: OperandSize) { in add_rrr() argument
402 size: OperandSize, in add_rrr_with_extend() argument
409 pub fn adds_rrr(&mut self, rm: Reg, rn: Reg, rd: WritableReg, size: OperandSize) { in adds_rrr() argument
424 pub fn sub_ir(&mut self, imm: Imm12, rn: Reg, rd: WritableReg, size: OperandSize) { in sub_ir() argument
429 pub fn subs_ir(&mut self, imm: Imm12, rn: Reg, size: OperandSize) { in subs_ir() argument
434 pub fn sub_rrr(&mut self, rm: Reg, rn: Reg, rd: WritableReg, size: OperandSize) { in sub_rrr() argument
439 pub fn subs_rrr(&mut self, rm: Reg, rn: Reg, size: OperandSize) { in subs_rrr() argument
451 pub fn mul_rrr(&mut self, rm: Reg, rn: Reg, rd: WritableReg, size: OperandSize) { in mul_rrr() argument
462 size: OperandSize, in div_rrr() argument
494 let size = if size == OperandSize::S32 && kind == DivKind::Signed { in div_rrr()
505 OperandSize::S64 in div_rrr()
526 size: OperandSize, in rem_rrr() argument
534 let size = if size == OperandSize::S32 && kind.is_signed() { in rem_rrr()
545 OperandSize::S64 in rem_rrr()
568 pub fn and_rrr(&mut self, rm: Reg, rn: Reg, rd: WritableReg, size: OperandSize) { in and_rrr() argument
573 pub fn and_ir(&mut self, imm: ImmLogic, rn: Reg, rd: WritableReg, size: OperandSize) { in and_ir() argument
578 pub fn or_rrr(&mut self, rm: Reg, rn: Reg, rd: WritableReg, size: OperandSize) { in or_rrr() argument
583 pub fn or_ir(&mut self, imm: ImmLogic, rn: Reg, rd: WritableReg, size: OperandSize) { in or_ir() argument
588 pub fn xor_rrr(&mut self, rm: Reg, rn: Reg, rd: WritableReg, size: OperandSize) { in xor_rrr() argument
593 pub fn xor_ir(&mut self, imm: ImmLogic, rn: Reg, rd: WritableReg, size: OperandSize) { in xor_ir() argument
604 size: OperandSize, in shift_rrr() argument
624 size: OperandSize, in shift_ir() argument
642 pub fn clz(&mut self, rn: Reg, rd: WritableReg, size: OperandSize) { in clz() argument
647 pub fn rbit(&mut self, rn: Reg, rd: WritableReg, size: OperandSize) { in rbit() argument
652 pub fn fadd_rrr(&mut self, rm: Reg, rn: Reg, rd: WritableReg, size: OperandSize) { in fadd_rrr() argument
657 pub fn fsub_rrr(&mut self, rm: Reg, rn: Reg, rd: WritableReg, size: OperandSize) { in fsub_rrr() argument
662 pub fn fmul_rrr(&mut self, rm: Reg, rn: Reg, rd: WritableReg, size: OperandSize) { in fmul_rrr() argument
667 pub fn fdiv_rrr(&mut self, rm: Reg, rn: Reg, rd: WritableReg, size: OperandSize) { in fdiv_rrr() argument
672 pub fn fmax_rrr(&mut self, rm: Reg, rn: Reg, rd: WritableReg, size: OperandSize) { in fmax_rrr() argument
677 pub fn fmin_rrr(&mut self, rm: Reg, rn: Reg, rd: WritableReg, size: OperandSize) { in fmin_rrr() argument
682 pub fn fneg_rr(&mut self, rn: Reg, rd: WritableReg, size: OperandSize) { in fneg_rr() argument
687 pub fn fabs_rr(&mut self, rn: Reg, rd: WritableReg, size: OperandSize) { in fabs_rr() argument
692 pub fn fsqrt_rr(&mut self, rn: Reg, rd: WritableReg, size: OperandSize) { in fsqrt_rr() argument
697 pub fn fround_rr(&mut self, rn: Reg, rd: WritableReg, mode: RoundingMode, size: OperandSize) { in fround_rr() argument
699 (RoundingMode::Nearest, OperandSize::S32) => FpuRoundMode::Nearest32, in fround_rr()
700 (RoundingMode::Up, OperandSize::S32) => FpuRoundMode::Plus32, in fround_rr()
701 (RoundingMode::Down, OperandSize::S32) => FpuRoundMode::Minus32, in fround_rr()
702 (RoundingMode::Zero, OperandSize::S32) => FpuRoundMode::Zero32, in fround_rr()
703 (RoundingMode::Nearest, OperandSize::S64) => FpuRoundMode::Nearest64, in fround_rr()
704 (RoundingMode::Up, OperandSize::S64) => FpuRoundMode::Plus64, in fround_rr()
705 (RoundingMode::Down, OperandSize::S64) => FpuRoundMode::Minus64, in fround_rr()
706 (RoundingMode::Zero, OperandSize::S64) => FpuRoundMode::Zero64, in fround_rr()
713 pub fn fushr_rri(&mut self, rn: Reg, rd: WritableReg, amount: u8, size: OperandSize) { in fushr_rri() argument
719 OperandSize::S32 => UShr32(imm), in fushr_rri()
720 OperandSize::S64 => UShr64(imm), in fushr_rri()
734 size: OperandSize, in fsli_rri_mod() argument
741 OperandSize::S32 => FPUOpRIMod::Sli32(imm), in fsli_rri_mod()
742 OperandSize::S64 => FPUOpRIMod::Sli64(imm), in fsli_rri_mod()
749 pub fn fcmp(&mut self, rn: Reg, rm: Reg, size: OperandSize) { in fcmp() argument
762 src_size: OperandSize, in cvt_sint_to_float() argument
763 dst_size: OperandSize, in cvt_sint_to_float() argument
766 (OperandSize::S32, OperandSize::S32) => IntToFpuOp::I32ToF32, in cvt_sint_to_float()
767 (OperandSize::S64, OperandSize::S32) => IntToFpuOp::I64ToF32, in cvt_sint_to_float()
768 (OperandSize::S32, OperandSize::S64) => IntToFpuOp::I32ToF64, in cvt_sint_to_float()
769 (OperandSize::S64, OperandSize::S64) => IntToFpuOp::I64ToF64, in cvt_sint_to_float()
785 src_size: OperandSize, in cvt_uint_to_float() argument
786 dst_size: OperandSize, in cvt_uint_to_float() argument
789 (OperandSize::S32, OperandSize::S32) => IntToFpuOp::U32ToF32, in cvt_uint_to_float()
790 (OperandSize::S64, OperandSize::S32) => IntToFpuOp::U64ToF32, in cvt_uint_to_float()
791 (OperandSize::S32, OperandSize::S64) => IntToFpuOp::U32ToF64, in cvt_uint_to_float()
792 (OperandSize::S64, OperandSize::S64) => IntToFpuOp::U64ToF64, in cvt_uint_to_float()
808 src_size: OperandSize, in cvt_float_to_float() argument
809 dst_size: OperandSize, in cvt_float_to_float() argument
812 (OperandSize::S32, OperandSize::S64) => (FPUOp1::Cvt32To64, ScalarSize::Size32), in cvt_float_to_float()
813 (OperandSize::S64, OperandSize::S32) => (FPUOp1::Cvt64To32, ScalarSize::Size64), in cvt_float_to_float()
891 pub fn fpu_csel(&mut self, rn: Reg, rm: Reg, rd: WritableReg, cond: Cond, size: OperandSize) { in fpu_csel() argument
893 OperandSize::S32 => { in fpu_csel()
901 OperandSize::S64 => { in fpu_csel()
934 pub fn ands_rr(&mut self, rn: Reg, rm: Reg, size: OperandSize) { in ands_rr() argument
952 pub fn trapz(&mut self, rn: Reg, code: TrapCode, size: OperandSize) { in trapz() argument
961 fn alu_rri(&mut self, op: ALUOp, imm: Imm12, rn: Reg, rd: WritableReg, size: OperandSize) { in alu_rri() argument
977 size: OperandSize, in alu_rri_logic() argument
994 size: OperandSize, in alu_rri_shift() argument
1005 fn alu_rrr(&mut self, op: ALUOp, rm: Reg, rn: Reg, rd: WritableReg, size: OperandSize) { in alu_rrr() argument
1021 size: OperandSize, in alu_rrr_extend() argument
1041 size: OperandSize, in alu_rrrr() argument
1053 fn fpu_rrr(&mut self, op: FPUOp2, rm: Reg, rn: Reg, rd: WritableReg, size: OperandSize) { in fpu_rrr() argument
1080 fn fpu_rr(&mut self, op: FPUOp1, rn: Reg, rd: WritableReg, size: OperandSize) { in fpu_rr() argument
1097 fn bit_rr(&mut self, op: BitOp, rn: Reg, rd: WritableReg, size: OperandSize) { in bit_rr() argument
1149 in_size: OperandSize, in min_fp_value() argument
1150 out_size: OperandSize, in min_fp_value() argument
1154 OperandSize::S32 => { in min_fp_value()
1158 OperandSize::S64 => { in min_fp_value()
1171 in_size: OperandSize, in max_fp_value() argument
1172 out_size: OperandSize, in max_fp_value() argument
1176 OperandSize::S32 => { in max_fp_value()
1180 OperandSize::S64 => { in max_fp_value()
1189 fn check_nan(&mut self, rn: Reg, size: OperandSize) { in check_nan() argument
1201 src_size: OperandSize, in fpu_to_int() argument
1202 dst_size: OperandSize, in fpu_to_int() argument
1229 src_size: OperandSize, in cvt_fpu_to_int() argument
1230 dst_size: OperandSize, in cvt_fpu_to_int() argument
1234 (OperandSize::S32, OperandSize::S32, false) => FpuToIntOp::F32ToU32, in cvt_fpu_to_int()
1235 (OperandSize::S32, OperandSize::S32, true) => FpuToIntOp::F32ToI32, in cvt_fpu_to_int()
1236 (OperandSize::S32, OperandSize::S64, false) => FpuToIntOp::F32ToU64, in cvt_fpu_to_int()
1237 (OperandSize::S32, OperandSize::S64, true) => FpuToIntOp::F32ToI64, in cvt_fpu_to_int()
1238 (OperandSize::S64, OperandSize::S32, false) => FpuToIntOp::F64ToU32, in cvt_fpu_to_int()
1239 (OperandSize::S64, OperandSize::S32, true) => FpuToIntOp::F64ToI32, in cvt_fpu_to_int()
1240 (OperandSize::S64, OperandSize::S64, false) => FpuToIntOp::F64ToU64, in cvt_fpu_to_int()
1241 (OperandSize::S64, OperandSize::S64, true) => FpuToIntOp::F64ToI64, in cvt_fpu_to_int()
1299 let size = OperandSize::S64.into();