Lines Matching refs:Writable
125 pub vreg: Writable<Reg>,
411 fn gen_load_stack(mem: StackAMode, into_reg: Writable<Reg>, ty: Type) -> Self::I; in gen_load_stack()
417 fn gen_move(to_reg: Writable<Reg>, from_reg: Reg, ty: Type) -> Self::I; in gen_move()
421 to_reg: Writable<Reg>, in gen_extend()
447 into_reg: Writable<Reg>, in gen_add_imm()
459 fn gen_get_stack_addr(mem: StackAMode, into_reg: Writable<Reg>) -> Self::I; in gen_get_stack_addr()
476 fn gen_load_base_offset(into_reg: Writable<Reg>, base: Reg, offset: i32, ty: Type) -> Self::I; in gen_load_base_offset()
492 regs: &[Writable<RealReg>], in compute_frame_layout()
561 fn gen_memcpy<F: FnMut(Type) -> Writable<Reg>>( in gen_memcpy()
600 fn retval_temp_reg(call_conv_of_callee: isa::CallConv) -> Writable<Reg>; in retval_temp_reg()
1088 pub clobbered_callee_saves: Vec<Writable<RealReg>>,
1100 pub fn clobbered_callee_saves_by_class(&self) -> (&[Writable<RealReg>], &[Writable<RealReg>]) { in clobbered_callee_saves_by_class()
1381 let scratch = Writable::from_reg(M::get_stacklimit_reg(self.call_conv)); in insert_stack_check()
1444 let into_reg = Writable::from_reg(M::get_stacklimit_reg(f.stencil.signature.call_conv)); in generate_gv()
1562 into_regs: ValueRegs<Writable<Reg>>, in gen_copy_arg_to_regs()
1566 let mut copy_arg_slot_to_reg = |slot: &ABIArgSlot, into_reg: &Writable<Reg>| { in gen_copy_arg_to_regs()
1625 vreg: Writable::from_reg(tmp), in gen_copy_arg_to_regs()
1763 let ret_area_ptr = Writable::from_reg(self.ret_area_ptr.unwrap()); in gen_retval_area_setup()
1855 Writable::from_reg(tmp), in gen_call_args()
1863 Writable::from_reg( in gen_call_args()
1896 Writable::from_reg(tmp), in gen_call_args()
1919 Writable::from_reg(tmp), in gen_call_args()
1938 insts.push(M::gen_get_stack_addr(amode, Writable::from_reg(tmp))); in gen_call_args()
1967 try_call_payloads: Option<&[Writable<Reg>]>, in gen_call_rets()
2011 vreg: Writable::from_reg(*retval_reg), in gen_call_rets()
2019 vreg: Writable::from_reg(*retval_reg), in gen_call_rets()
2164 into_reg: Writable<Reg>, in sized_stackslot_addr()
2173 pub fn dynamic_stackslot_addr(&self, slot: DynamicStackSlot, into_reg: Writable<Reg>) -> M::I { in dynamic_stackslot_addr()
2205 clobbered: Vec<Writable<RealReg>>, in compute_frame_layout()
2402 pub fn gen_reload(&self, to_reg: Writable<RealReg>, from_slot: SpillSlot) -> M::I { in gen_reload()
2452 pub vreg: Writable<Reg>,