Lines Matching refs:src2
1529 (rule (x64_produce_flags (ProduceFlagsOp.Add) ty src1 src2)
1530 (x64_add_with_flags_paired ty src1 src2))
1531 (rule (x64_produce_flags (ProduceFlagsOp.Sub) ty src1 src2)
1532 (x64_sub_with_flags_paired ty src1 src2))
1546 (rule (x64_chain_flags (ChainFlagsOp.Adc) ty src1 src2)
1547 (x64_adc_chained ty src1 src2))
1548 (rule (x64_chain_flags (ChainFlagsOp.Sbb) ty src1 src2)
1549 (x64_sbb_chained ty src1 src2))
1560 (rule (x64_produce_flags_side_effect (ProduceFlagsSideEffectOp.Or) (fits_in_64 ty) src1 src2)
1561 (x64_or_with_flags_paired_side_effect ty src1 src2))
1562 (rule (x64_produce_flags_side_effect (ProduceFlagsSideEffectOp.Sbb) (fits_in_64 ty) src1 src2)
1563 (x64_sbb_paired_side_effect ty src1 src2))
1593 (rule 2 (x64_add_raw $I32 src1 (is_simm8 src2)) (x64_addl_mi_sxb_raw src1 src2))
1594 (rule 2 (x64_add_raw $I64 src1 (is_simm8 src2)) (x64_addq_mi_sxb_raw src1 src2))
1597 (rule 1 (x64_add_raw $I8 src1 (is_imm8 src2)) (x64_addb_mi_raw src1 src2))
1598 (rule 1 (x64_add_raw $I16 src1 (is_imm16 src2)) (x64_addw_mi_raw src1 src2))
1599 (rule 1 (x64_add_raw $I32 src1 (is_imm32 src2)) (x64_addl_mi_raw src1 src2))
1600 (rule 1 (x64_add_raw $I64 src1 (is_simm32 src2)) (x64_addq_mi_sxl_raw src1 src2))
1603 (rule 0 (x64_add_raw $I8 src1 (is_gpr_mem src2)) (x64_addb_rm_raw src1 src2))
1604 (rule 0 (x64_add_raw $I16 src1 (is_gpr_mem src2)) (x64_addw_rm_raw src1 src2))
1605 (rule 0 (x64_add_raw $I32 src1 (is_gpr_mem src2)) (x64_addl_rm_raw src1 src2))
1606 (rule 0 (x64_add_raw $I64 src1 (is_gpr_mem src2)) (x64_addq_rm_raw src1 src2))
1612 (rule 1 (x64_add_break_deps $I8 src1 (is_gpr src2)) (x64_addl_rm_raw src1 src2))
1613 (rule 1 (x64_add_break_deps $I16 src1 (is_gpr src2)) (x64_addl_rm_raw src1 src2))
1614 (rule 0 (x64_add_break_deps ty src1 src2) (x64_add_raw ty src1 src2))
1618 (rule (x64_add ty src1 src2)
1619 (emit_ret_gpr (x64_add_break_deps ty src1 src2)))
1625 (rule (x64_add_with_flags_paired ty src1 src2)
1626 (asm_produce_flags (x64_add_raw ty src1 src2)))
1634 (rule 2 (x64_adc_raw $I64 src1 (is_simm8 src2)) (x64_adcq_mi_sxb_raw src1 src2))
1635 (rule 1 (x64_adc_raw $I64 src1 (is_simm32 src2)) (x64_adcq_mi_sxl_raw src1 src2))
1636 (rule 0 (x64_adc_raw $I64 src1 (is_gpr_mem src2)) (x64_adcq_rm_raw src1 src2))
1640 (rule (x64_adc_paired ty src1 src2)
1641 (asm_consume_flags (x64_adc_raw ty src1 src2)))
1645 (rule (x64_adc_chained ty src1 src2)
1646 (asm_chain_flags (x64_adc_raw ty src1 src2)))
1654 (rule 3 (x64_sub_raw $I32 src1 (is_simm8 src2)) (x64_subl_mi_sxb_raw src1 src2))
1655 (rule 3 (x64_sub_raw $I64 src1 (is_simm8 src2)) (x64_subq_mi_sxb_raw src1 src2))
1658 (rule 2 (x64_sub_raw $I8 src1 (is_imm8 src2)) (x64_subb_mi_raw src1 src2))
1659 (rule 2 (x64_sub_raw $I16 src1 (is_imm16 src2)) (x64_subw_mi_raw src1 src2))
1660 (rule 2 (x64_sub_raw $I32 src1 (is_imm32 src2)) (x64_subl_mi_raw src1 src2))
1661 (rule 2 (x64_sub_raw $I64 src1 (is_simm32 src2)) (x64_subq_mi_sxl_raw src1 src2))
1664 (rule 0 (x64_sub_raw $I8 src1 (is_gpr_mem src2)) (x64_subb_rm_raw src1 src2))
1665 (rule 0 (x64_sub_raw $I16 src1 (is_gpr_mem src2)) (x64_subw_rm_raw src1 src2))
1666 (rule 0 (x64_sub_raw $I32 src1 (is_gpr_mem src2)) (x64_subl_rm_raw src1 src2))
1667 (rule 0 (x64_sub_raw $I64 src1 (is_gpr_mem src2)) (x64_subq_rm_raw src1 src2))
1673 (rule 1 (x64_sub_break_deps $I8 src1 (is_gpr src2)) (x64_subl_rm_raw src1 src2))
1674 (rule 1 (x64_sub_break_deps $I16 src1 (is_gpr src2)) (x64_subl_rm_raw src1 src2))
1675 (rule 0 (x64_sub_break_deps ty src1 src2) (x64_sub_raw ty src1 src2))
1679 (rule (x64_sub ty src1 src2)
1680 (emit_ret_gpr (x64_sub_break_deps ty src1 src2)))
1685 (rule (x64_sub_with_flags_paired ty src1 src2)
1686 (asm_produce_flags (x64_sub_raw ty src1 src2)))
1695 (rule 2 (x64_sbb_raw $I32 src1 (is_simm8 src2)) (x64_sbbl_mi_sxb_raw src1 src2))
1696 (rule 2 (x64_sbb_raw $I64 src1 (is_simm8 src2)) (x64_sbbq_mi_sxb_raw src1 src2))
1699 (rule 1 (x64_sbb_raw $I8 src1 (is_imm8 src2)) (x64_sbbb_mi_raw src1 src2))
1700 (rule 1 (x64_sbb_raw $I16 src1 (is_imm16 src2)) (x64_sbbw_mi_raw src1 src2))
1701 (rule 1 (x64_sbb_raw $I32 src1 (is_imm32 src2)) (x64_sbbl_mi_raw src1 src2))
1702 (rule 1 (x64_sbb_raw $I64 src1 (is_simm32 src2)) (x64_sbbq_mi_sxl_raw src1 src2))
1705 (rule 0 (x64_sbb_raw $I8 src1 (is_gpr_mem src2)) (x64_sbbb_rm_raw src1 src2))
1706 (rule 0 (x64_sbb_raw $I16 src1 (is_gpr_mem src2)) (x64_sbbw_rm_raw src1 src2))
1707 (rule 0 (x64_sbb_raw $I32 src1 (is_gpr_mem src2)) (x64_sbbl_rm_raw src1 src2))
1708 (rule 0 (x64_sbb_raw $I64 src1 (is_gpr_mem src2)) (x64_sbbq_rm_raw src1 src2))
1714 (rule 1 (x64_sbb_break_deps $I8 src1 (is_gpr src2)) (x64_sbbl_rm_raw src1 src2))
1715 (rule 1 (x64_sbb_break_deps $I16 src1 (is_gpr src2)) (x64_sbbl_rm_raw src1 src2))
1716 (rule 0 (x64_sbb_break_deps ty src1 src2) (x64_sbb_raw ty src1 src2))
1721 (rule (x64_sbb_paired ty src1 src2)
1722 (asm_consume_flags (x64_sbb_break_deps ty src1 src2)))
1726 (rule (x64_sbb_chained ty src1 src2)
1727 (asm_chain_flags (x64_sbb_raw ty src1 src2)))
1731 (rule (x64_sbb_paired_side_effect ty src1 src2)
1732 (asm_produce_flags_side_effect (x64_sbb_raw ty src1 src2)))
1739 (rule (x64_mul_raw $I16 false src1 src2) (x64_mulw_m_raw src1 src2))
1740 (rule (x64_mul_raw $I32 false src1 src2) (x64_mull_m_raw src1 src2))
1741 (rule (x64_mul_raw $I64 false src1 src2) (x64_mulq_m_raw src1 src2))
1742 (rule (x64_mul_raw $I16 true src1 src2) (x64_imulw_m_raw src1 src2))
1743 (rule (x64_mul_raw $I32 true src1 src2) (x64_imull_m_raw src1 src2))
1744 (rule (x64_mul_raw $I64 true src1 src2) (x64_imulq_m_raw src1 src2))
1747 (rule 0 (x64_mul ty signed src1 src2)
1748 (emit_ret_value_regs (x64_mul_raw ty signed src1 src2)))
1755 (rule 1 (x64_mul $I32 false src1 src2)
1757 (let ((regs ValueRegs (x64_mulxl_rvm src2 src1)))
1759 (rule 1 (x64_mul $I64 false src1 src2)
1761 (let ((regs ValueRegs (x64_mulxq_rvm src2 src1)))
1765 (rule (x64_mulx_hi $I32 src1 src2) (x64_mulxl_rvm_hi src2 src1))
1766 (rule (x64_mulx_hi $I64 src1 src2) (x64_mulxq_rvm_hi src2 src1))
1774 (rule (x64_mul_lo_with_flags_paired ty signed src1 src2)
1775 (asm_produce_flags (x64_mul_raw ty signed src1 src2)))
1783 (rule (x64_imul $I16 src1 src2) (x64_imulw_rm src1 src2))
1784 (rule (x64_imul $I32 src1 src2) (x64_imull_rm src1 src2))
1785 (rule (x64_imul $I64 src1 src2) (x64_imulq_rm src1 src2))
1790 (rule 2 (x64_imul_imm $I16 src1 (i8_from_i32 src2)) (x64_imulw_rmi_sxb src1 src2))
1791 (rule 2 (x64_imul_imm $I32 src1 (i8_from_i32 src2)) (x64_imull_rmi_sxb src1 src2))
1792 (rule 2 (x64_imul_imm $I64 src1 (i8_from_i32 src2)) (x64_imulq_rmi_sxb src1 src2))
1793 (rule 1 (x64_imul_imm $I16 src1 (i16_from_i32 src2)) (x64_imulw_rmi src1 (i16_cast_unsigned src2)))
1794 (rule 1 (x64_imul_imm $I32 src1 src2) (x64_imull_rmi src1 (i32_cast_unsigned src2)))
1795 (rule 1 (x64_imul_imm $I64 src1 src2) (x64_imulq_rmi_sxl src1 src2))
1800 (rule (x64_mul8_raw false src1 src2) (x64_mulb_m_raw src1 src2))
1801 (rule (x64_mul8_raw true src1 src2) (x64_imulb_m_raw src1 src2))
1804 (rule (x64_mul8 signed src1 src2)
1805 (emit_ret_gpr (x64_mul8_raw signed src1 src2)))
1808 (rule (x64_mul8_with_flags_paired signed src1 src2)
1809 (asm_produce_flags (x64_mul8_raw signed src1 src2)))
1817 (rule 3 (x64_and $I32 src1 (is_simm8 src2)) (x64_andl_mi_sxb src1 src2))
1818 (rule 3 (x64_and $I64 src1 (is_simm8 src2)) (x64_andq_mi_sxb src1 src2))
1821 (rule 2 (x64_and $I8 src1 (is_imm8 src2)) (x64_andb_mi src1 src2))
1822 (rule 2 (x64_and $I16 src1 (is_imm16 src2)) (x64_andw_mi src1 src2))
1823 (rule 2 (x64_and $I32 src1 (is_imm32 src2)) (x64_andl_mi src1 src2))
1824 (rule 2 (x64_and $I64 src1 (is_simm32 src2)) (x64_andq_mi_sxl src1 src2))
1828 (rule 1 (x64_and $I8 src1 (is_gpr src2)) (x64_andl_rm src1 src2))
1829 (rule 1 (x64_and $I16 src1 (is_gpr src2)) (x64_andl_rm src1 src2))
1832 (rule 0 (x64_and $I8 src1 (is_gpr_mem src2)) (x64_andb_rm src1 src2))
1833 (rule 0 (x64_and $I16 src1 (is_gpr_mem src2)) (x64_andw_rm src1 src2))
1834 (rule 0 (x64_and $I32 src1 (is_gpr_mem src2)) (x64_andl_rm src1 src2))
1835 (rule 0 (x64_and $I64 src1 (is_gpr_mem src2)) (x64_andq_rm src1 src2))
1843 (rule 2 (x64_or_raw $I32 src1 (is_simm8 src2)) (x64_orl_mi_sxb_raw src1 src2))
1844 (rule 2 (x64_or_raw $I64 src1 (is_simm8 src2)) (x64_orq_mi_sxb_raw src1 src2))
1847 (rule 1 (x64_or_raw $I8 src1 (is_imm8 src2)) (x64_orb_mi_raw src1 src2))
1848 (rule 1 (x64_or_raw $I16 src1 (is_imm16 src2)) (x64_orw_mi_raw src1 src2))
1849 (rule 1 (x64_or_raw $I32 src1 (is_imm32 src2)) (x64_orl_mi_raw src1 src2))
1850 (rule 1 (x64_or_raw $I64 src1 (is_simm32 src2)) (x64_orq_mi_sxl_raw src1 src2))
1853 (rule 0 (x64_or_raw $I8 src1 (is_gpr_mem src2)) (x64_orb_rm_raw src1 src2))
1854 (rule 0 (x64_or_raw $I16 src1 (is_gpr_mem src2)) (x64_orw_rm_raw src1 src2))
1855 (rule 0 (x64_or_raw $I32 src1 (is_gpr_mem src2)) (x64_orl_rm_raw src1 src2))
1856 (rule 0 (x64_or_raw $I64 src1 (is_gpr_mem src2)) (x64_orq_rm_raw src1 src2))
1861 (rule 1 (x64_or_break_deps $I8 src1 (is_gpr src2)) (x64_orl_rm_raw src1 src2))
1862 (rule 1 (x64_or_break_deps $I16 src1 (is_gpr src2)) (x64_orl_rm_raw src1 src2))
1863 (rule 0 (x64_or_break_deps ty src1 src2) (x64_or_raw ty src1 src2))
1867 (rule (x64_or ty src1 src2)
1868 (emit_ret_gpr (x64_or_break_deps ty src1 src2)))
1873 (rule (x64_or_with_flags_paired_side_effect ty src1 src2)
1874 (asm_produce_flags_side_effect (x64_or_raw ty src1 src2)))
1882 (rule 3 (x64_xor $I32 src1 (is_simm8 src2)) (x64_xorl_mi_sxb src1 src2))
1883 (rule 3 (x64_xor $I64 src1 (is_simm8 src2)) (x64_xorq_mi_sxb src1 src2))
1886 (rule 2 (x64_xor $I8 src1 (is_imm8 src2)) (x64_xorb_mi src1 src2))
1887 (rule 2 (x64_xor $I16 src1 (is_imm16 src2)) (x64_xorw_mi src1 src2))
1888 (rule 2 (x64_xor $I32 src1 (is_imm32 src2)) (x64_xorl_mi src1 src2))
1889 (rule 2 (x64_xor $I64 src1 (is_simm32 src2)) (x64_xorq_mi_sxl src1 src2))
1893 (rule 1 (x64_xor $I8 src1 (is_gpr src2)) (x64_xorl_rm src1 src2))
1894 (rule 1 (x64_xor $I16 src1 (is_gpr src2)) (x64_xorl_rm src1 src2))
1897 (rule 0 (x64_xor $I8 src1 (is_gpr_mem src2)) (x64_xorb_rm src1 src2))
1898 (rule 0 (x64_xor $I16 src1 (is_gpr_mem src2)) (x64_xorw_rm src1 src2))
1899 (rule 0 (x64_xor $I32 src1 (is_gpr_mem src2)) (x64_xorl_rm src1 src2))
1900 (rule 0 (x64_xor $I64 src1 (is_gpr_mem src2)) (x64_xorq_rm src1 src2))
1908 (rule (x64_andn $I8 src1 src2) (x64_andnl_rvm src1 src2))
1909 (rule (x64_andn $I16 src1 src2) (x64_andnl_rvm src1 src2))
1910 (rule (x64_andn $I32 src1 src2) (x64_andnl_rvm src1 src2))
1911 (rule (x64_andn $I64 src1 src2) (x64_andnq_rvm src1 src2))
1976 (rule (x64_rotl $I8 src1 (Imm8Gpr.Gpr src2)) (x64_rolb_mc src1 src2))
1977 (rule (x64_rotl $I8 src1 (Imm8Gpr.Imm8 src2)) (x64_rolb_mi src1 src2))
1978 (rule (x64_rotl $I16 src1 (Imm8Gpr.Gpr src2)) (x64_rolw_mc src1 src2))
1979 (rule (x64_rotl $I16 src1 (Imm8Gpr.Imm8 src2)) (x64_rolw_mi src1 src2))
1980 (rule (x64_rotl $I32 src1 (Imm8Gpr.Gpr src2)) (x64_roll_mc src1 src2))
1981 (rule (x64_rotl $I32 src1 (Imm8Gpr.Imm8 src2)) (x64_roll_mi src1 src2))
1982 (rule (x64_rotl $I64 src1 (Imm8Gpr.Gpr src2)) (x64_rolq_mc src1 src2))
1983 (rule (x64_rotl $I64 src1 (Imm8Gpr.Imm8 src2)) (x64_rolq_mi src1 src2))
1994 (rule (x64_rotr $I8 src1 (Imm8Gpr.Gpr src2)) (x64_rorb_mc src1 src2))
1995 (rule (x64_rotr $I8 src1 (Imm8Gpr.Imm8 src2)) (x64_rorb_mi src1 src2))
1996 (rule (x64_rotr $I16 src1 (Imm8Gpr.Gpr src2)) (x64_rorw_mc src1 src2))
1997 (rule (x64_rotr $I16 src1 (Imm8Gpr.Imm8 src2)) (x64_rorw_mi src1 src2))
1998 (rule (x64_rotr $I32 src1 (Imm8Gpr.Gpr src2)) (x64_rorl_mc src1 src2))
1999 (rule (x64_rotr $I32 src1 (Imm8Gpr.Imm8 src2)) (x64_rorl_mi src1 src2))
2000 (rule (x64_rotr $I64 src1 (Imm8Gpr.Gpr src2)) (x64_rorq_mc src1 src2))
2001 (rule (x64_rotr $I64 src1 (Imm8Gpr.Imm8 src2)) (x64_rorq_mi src1 src2))
2012 (rule (x64_shl $I8 src1 (Imm8Gpr.Gpr src2)) (x64_shlb_mc src1 src2))
2013 (rule (x64_shl $I8 src1 (Imm8Gpr.Imm8 src2)) (x64_shlb_mi src1 src2))
2014 (rule (x64_shl $I16 src1 (Imm8Gpr.Gpr src2)) (x64_shlw_mc src1 src2))
2015 (rule (x64_shl $I16 src1 (Imm8Gpr.Imm8 src2)) (x64_shlw_mi src1 src2))
2016 (rule (x64_shl $I32 src1 (Imm8Gpr.Gpr src2)) (x64_shll_mc src1 src2))
2017 (rule (x64_shl $I32 src1 (Imm8Gpr.Imm8 src2)) (x64_shll_mi src1 src2))
2018 (rule (x64_shl $I64 src1 (Imm8Gpr.Gpr src2)) (x64_shlq_mc src1 src2))
2019 (rule (x64_shl $I64 src1 (Imm8Gpr.Imm8 src2)) (x64_shlq_mi src1 src2))
2028 (rule 1 (x64_shl (ty_32_or_64 ty) src1 (Imm8Gpr.Gpr src2))
2030 (x64_shlx ty src1 src2))
2034 (rule (x64_shr $I8 src1 (Imm8Gpr.Gpr src2)) (x64_shrb_mc src1 src2))
2035 (rule (x64_shr $I8 src1 (Imm8Gpr.Imm8 src2)) (x64_shrb_mi src1 src2))
2036 (rule (x64_shr $I16 src1 (Imm8Gpr.Gpr src2)) (x64_shrw_mc src1 src2))
2037 (rule (x64_shr $I16 src1 (Imm8Gpr.Imm8 src2)) (x64_shrw_mi src1 src2))
2038 (rule (x64_shr $I32 src1 (Imm8Gpr.Gpr src2)) (x64_shrl_mc src1 src2))
2039 (rule (x64_shr $I32 src1 (Imm8Gpr.Imm8 src2)) (x64_shrl_mi src1 src2))
2040 (rule (x64_shr $I64 src1 (Imm8Gpr.Gpr src2)) (x64_shrq_mc src1 src2))
2041 (rule (x64_shr $I64 src1 (Imm8Gpr.Imm8 src2)) (x64_shrq_mi src1 src2))
2047 (rule 1 (x64_shr (ty_32_or_64 ty) src1 (Imm8Gpr.Gpr src2))
2049 (x64_shrx ty src1 src2))
2053 (rule (x64_sar $I8 src1 (Imm8Gpr.Gpr src2)) (x64_sarb_mc src1 src2))
2054 (rule (x64_sar $I8 src1 (Imm8Gpr.Imm8 src2)) (x64_sarb_mi src1 src2))
2055 (rule (x64_sar $I16 src1 (Imm8Gpr.Gpr src2)) (x64_sarw_mc src1 src2))
2056 (rule (x64_sar $I16 src1 (Imm8Gpr.Imm8 src2)) (x64_sarw_mi src1 src2))
2057 (rule (x64_sar $I32 src1 (Imm8Gpr.Gpr src2)) (x64_sarl_mc src1 src2))
2058 (rule (x64_sar $I32 src1 (Imm8Gpr.Imm8 src2)) (x64_sarl_mi src1 src2))
2059 (rule (x64_sar $I64 src1 (Imm8Gpr.Gpr src2)) (x64_sarq_mc src1 src2))
2060 (rule (x64_sar $I64 src1 (Imm8Gpr.Imm8 src2)) (x64_sarq_mi src1 src2))
2066 (rule 1 (x64_sar (ty_32_or_64 ty) src1 (Imm8Gpr.Gpr src2))
2068 (x64_sarx ty src1 src2))
2073 (rule (x64_shld $I16 src1 src2 amt) (x64_shldw_mri src1 src2 amt))
2074 (rule (x64_shld $I32 src1 src2 amt) (x64_shldl_mri src1 src2 amt))
2075 (rule (x64_shld $I64 src1 src2 amt) (x64_shldq_mri src1 src2 amt))
2079 (rule (x64_bzhi $I32 src1 src2) (x64_bzhil_rmv src1 src2))
2080 (rule (x64_bzhi $I64 src1 src2) (x64_bzhiq_rmv src1 src2))
2093 (rule 2 (x64_cmp $I16 src1 (is_simm8 src2)) (x64_cmpw_mi_sxb src1 src2))
2094 (rule 2 (x64_cmp $I32 src1 (is_simm8 src2)) (x64_cmpl_mi_sxb src1 src2))
2095 (rule 2 (x64_cmp $I64 src1 (is_simm8 src2)) (x64_cmpq_mi_sxb src1 src2))
2098 (rule 1 (x64_cmp $I8 src1 (is_imm8 src2)) (x64_cmpb_mi src1 src2))
2099 (rule 1 (x64_cmp $I16 src1 (is_imm16 src2)) (x64_cmpw_mi src1 src2))
2100 (rule 1 (x64_cmp $I32 src1 (is_imm32 src2)) (x64_cmpl_mi src1 src2))
2101 (rule 1 (x64_cmp $I64 src1 (is_simm32 src2)) (x64_cmpq_mi src1 src2))
2104 (rule 0 (x64_cmp $I8 src1 (is_gpr_mem src2)) (x64_cmpb_rm src1 src2))
2105 (rule 0 (x64_cmp $I16 src1 (is_gpr_mem src2)) (x64_cmpw_rm src1 src2))
2106 (rule 0 (x64_cmp $I32 src1 (is_gpr_mem src2)) (x64_cmpl_rm src1 src2))
2107 (rule 0 (x64_cmp $I64 src1 (is_gpr_mem src2)) (x64_cmpq_rm src1 src2))
2111 (rule (x64_ucomis $F32 src1 src2) (x64_ucomiss_a_or_avx src1 src2))
2112 (rule (x64_ucomis $F64 src1 src2) (x64_ucomisd_a_or_avx src1 src2))
2117 (rule 1 (x64_test $I8 src1 (is_imm8 src2)) (x64_testb_mi src1 src2))
2118 (rule 1 (x64_test $I16 src1 (is_imm16 src2)) (x64_testw_mi src1 src2))
2119 (rule 1 (x64_test $I32 src1 (is_imm32 src2)) (x64_testl_mi src1 src2))
2120 (rule 1 (x64_test $I64 src1 (is_simm32 src2)) (x64_testq_mi src1 src2))
2122 (rule 0 (x64_test $I8 src1 (is_gpr_mem src2)) (x64_testb_mr src2 src1))
2123 (rule 0 (x64_test $I16 src1 (is_gpr_mem src2)) (x64_testw_mr src2 src1))
2124 (rule 0 (x64_test $I32 src1 (is_gpr_mem src2)) (x64_testl_mr src2 src1))
2125 (rule 0 (x64_test $I64 src1 (is_gpr_mem src2)) (x64_testq_mr src2 src1))
2129 (rule (x64_ptest src1 src2) (x64_ptest_rm_or_avx src1 src2))
2221 (rule (x64_addss src1 src2) (x64_addss_a_or_avx src1 src2))
2224 (rule (x64_addsd src1 src2) (x64_addsd_a_or_avx src1 src2))
2227 (rule (x64_addps src1 src2) (x64_addps_a_or_avx src1 src2))
2230 (rule (x64_addpd src1 src2) (x64_addpd_a_or_avx src1 src2))
2233 (rule (x64_paddb src1 src2) (x64_paddb_a_or_avx src1 src2))
2236 (rule (x64_paddw src1 src2) (x64_paddw_a_or_avx src1 src2))
2239 (rule (x64_paddd src1 src2) (x64_paddd_a_or_avx src1 src2))
2242 (rule (x64_paddq src1 src2) (x64_paddq_a_or_avx src1 src2))
2245 (rule (x64_paddsb src1 src2) (x64_paddsb_a_or_avx src1 src2))
2248 (rule (x64_paddsw src1 src2) (x64_paddsw_a_or_avx src1 src2))
2251 (rule (x64_phaddw src1 src2) (x64_phaddw_a_or_avx src1 src2))
2254 (rule (x64_phaddd src1 src2) (x64_phaddd_a_or_avx src1 src2))
2257 (rule (x64_paddusb src1 src2) (x64_paddusb_a_or_avx src1 src2))
2260 (rule (x64_paddusw src1 src2) (x64_paddusw_a_or_avx src1 src2))
2264 (rule (x64_subss src1 src2) (x64_subss_a_or_avx src1 src2))
2267 (rule (x64_subsd src1 src2) (x64_subsd_a_or_avx src1 src2))
2270 (rule (x64_subps src1 src2) (x64_subps_a_or_avx src1 src2))
2273 (rule (x64_subpd src1 src2) (x64_subpd_a_or_avx src1 src2))
2276 (rule (x64_psubb src1 src2) (x64_psubb_a_or_avx src1 src2))
2279 (rule (x64_psubw src1 src2) (x64_psubw_a_or_avx src1 src2))
2282 (rule (x64_psubd src1 src2) (x64_psubd_a_or_avx src1 src2))
2285 (rule (x64_psubq src1 src2) (x64_psubq_a_or_avx src1 src2))
2288 (rule (x64_psubsb src1 src2) (x64_psubsb_a_or_avx src1 src2))
2291 (rule (x64_psubsw src1 src2) (x64_psubsw_a_or_avx src1 src2))
2294 (rule (x64_psubusb src1 src2) (x64_psubusb_a_or_avx src1 src2))
2297 (rule (x64_psubusw src1 src2) (x64_psubusw_a_or_avx src1 src2))
2301 (rule (x64_pavgb src1 src2) (x64_pavgb_a_or_avx src1 src2))
2304 (rule (x64_pavgw src1 src2) (x64_pavgw_a_or_avx src1 src2))
2308 (rule (x64_pand src1 src2) (x64_pand_a_or_avx src1 src2))
2311 (rule (x64_andps src1 src2) (x64_andps_a_or_avx src1 src2))
2314 (rule (x64_andpd src1 src2) (x64_andpd_a_or_avx src1 src2))
2318 (rule (x64_por src1 src2) (x64_por_a_or_avx src1 src2))
2321 (rule (x64_orps src1 src2) (x64_orps_a_or_avx src1 src2))
2324 (rule (x64_orpd src1 src2) (x64_orpd_a_or_avx src1 src2))
2328 (rule (x64_pxor src1 src2) (x64_pxor_a_or_avx src1 src2))
2331 (rule (x64_xorps src1 src2) (x64_xorps_a_or_avx src1 src2))
2334 (rule (x64_xorpd src1 src2) (x64_xorpd_a_or_avx src1 src2))
2338 (rule (x64_andnps src1 src2) (x64_andnps_a_or_avx src1 src2))
2341 (rule (x64_andnpd src1 src2) (x64_andnpd_a_or_avx src1 src2))
2344 (rule (x64_pandn src1 src2) (x64_pandn_a_or_avx src1 src2))
2348 (rule (x64_mulss src1 src2) (x64_mulss_a_or_avx src1 src2))
2351 (rule (x64_mulsd src1 src2) (x64_mulsd_a_or_avx src1 src2))
2354 (rule (x64_mulps src1 src2) (x64_mulps_a_or_avx src1 src2))
2357 (rule (x64_mulpd src1 src2) (x64_mulpd_a_or_avx src1 src2))
2360 (rule (x64_pmullw src1 src2) (x64_pmullw_a_or_avx src1 src2))
2363 (rule (x64_pmulld src1 src2) (x64_pmulld_a_or_avx src1 src2))
2366 (rule (x64_pmulhw src1 src2) (x64_pmulhw_a_or_avx src1 src2))
2369 (rule (x64_pmulhrsw src1 src2) (x64_pmulhrsw_a_or_avx src1 src2))
2372 (rule (x64_pmulhuw src1 src2) (x64_pmulhuw_a_or_avx src1 src2))
2375 (rule (x64_pmuldq src1 src2) (x64_pmuldq_a_or_avx src1 src2))
2378 (rule (x64_pmuludq src1 src2) (x64_pmuludq_a_or_avx src1 src2))
2382 (rule (x64_divss src1 src2) (x64_divss_a_or_avx src1 src2))
2385 (rule (x64_divsd src1 src2) (x64_divsd_a_or_avx src1 src2))
2388 (rule (x64_divps src1 src2) (x64_divps_a_or_avx src1 src2))
2391 (rule (x64_divpd src1 src2) (x64_divpd_a_or_avx src1 src2))
2395 (rule (x64_punpckhwd src1 src2) (x64_punpckhwd_a_or_avx src1 src2))
2398 (rule (x64_punpcklwd src1 src2) (x64_punpcklwd_a_or_avx src1 src2))
2401 (rule (x64_punpckldq src1 src2) (x64_punpckldq_a_or_avx src1 src2))
2404 (rule (x64_punpckhdq src1 src2) (x64_punpckhdq_a_or_avx src1 src2))
2407 (rule (x64_punpcklqdq src1 src2) (x64_punpcklqdq_a_or_avx src1 src2))
2410 (rule (x64_punpckhqdq src1 src2) (x64_punpckhqdq_a_or_avx src1 src2))
2413 (rule (x64_unpcklps src1 src2) (x64_unpcklps_a_or_avx src1 src2))
2416 (rule (x64_unpcklpd src1 src2) (x64_unpcklpd_a_or_avx src1 src2))
2419 (rule (x64_unpckhps src1 src2) (x64_unpckhps_a_or_avx src1 src2))
2422 (rule (x64_punpcklbw src1 src2) (x64_punpcklbw_a_or_avx src1 src2))
2425 (rule (x64_punpckhbw src1 src2) (x64_punpckhbw_a_or_avx src1 src2))
2429 (rule 0 (x64_blendvpd src1 src2 mask) (x64_blendvpd_rm0 src1 src2 mask))
2430 (rule 1 (x64_blendvpd src1 src2 mask)
2432 (x64_vblendvpd_rvmr src1 src2 mask))
2436 (rule 0 (x64_blendvps src1 src2 mask) (x64_blendvps_rm0 src1 src2 mask))
2437 (rule 1 (x64_blendvps src1 src2 mask)
2439 (x64_vblendvps_rvmr src1 src2 mask))
2443 (rule 0 (x64_pblendvb src1 src2 mask) (x64_pblendvb_rm src1 src2 mask))
2444 (rule 1 (x64_pblendvb src1 src2 mask)
2446 (x64_vpblendvb_rvmr src1 src2 mask))
2450 (rule (x64_pblendw src1 src2 imm) (x64_pblendw_rmi_or_avx src1 src2 imm))
2461 (rule (x64_movsd_regmove src1 src2) (x64_movsd_a_r_or_avx src1 src2))
2464 (rule (x64_movss_regmove src1 src2) (x64_movss_a_r_or_avx src1 src2))
2468 (rule (x64_movlhps src1 src2) (x64_movlhps_rm_or_avx src1 src2))
2500 (rule (x64_packsswb src1 src2) (x64_packsswb_a_or_avx src1 src2))
2504 (rule (x64_packssdw src1 src2) (x64_packssdw_a_or_avx src1 src2))
2508 (rule (x64_packuswb src1 src2) (x64_packuswb_a_or_avx src1 src2))
2512 (rule (x64_packusdw src1 src2) (x64_packusdw_a_or_avx src1 src2))
2516 (rule (x64_palignr src1 src2 imm) (x64_palignr_a_or_avx src1 src2 imm))
2524 (rule 1 (x64_cmpps src1 src2 imm)
2526 (x64_vcmpps_b src1 src2 (encode_fcmp_imm imm)))
2527 (rule 0 (x64_cmpps src1 src2 imm) (x64_cmpps_a src1 src2 (encode_fcmp_imm imm)))
2533 (rule 1 (x64_cmppd src1 src2 imm)
2535 (x64_vcmppd_b src1 src2 (encode_fcmp_imm imm)))
2536 (rule 0 (x64_cmppd src1 src2 imm) (x64_cmppd_a src1 src2 (encode_fcmp_imm imm)))
2540 (rule 1 (x64_pinsrb src1 src2 lane)
2542 (x64_vpinsrb_b src1 src2 lane))
2543 (rule 0 (x64_pinsrb src1 src2 lane) (x64_pinsrb_a src1 src2 lane))
2547 (rule 1 (x64_pinsrw src1 src2 lane)
2549 (x64_vpinsrw_b src1 src2 lane))
2550 (rule 0 (x64_pinsrw src1 src2 lane) (x64_pinsrw_a src1 src2 lane))
2554 (rule 1 (x64_pinsrd src1 src2 lane)
2556 (x64_vpinsrd_b src1 src2 lane))
2557 (rule 0 (x64_pinsrd src1 src2 lane) (x64_pinsrd_a src1 src2 lane))
2561 (rule 1 (x64_pinsrq src1 src2 lane)
2563 (x64_vpinsrq_b src1 src2 lane))
2564 (rule 0 (x64_pinsrq src1 src2 lane) (x64_pinsrq_a src1 src2 lane))
2600 (rule 0 (x64_pmaddwd src1 src2) (x64_pmaddwd_a_or_avx src1 src2))
2603 (rule (x64_pmaddubsw src1 src2) (x64_pmaddubsw_a_or_avx src1 src2))
2607 (rule 0 (x64_insertps src1 src2 lane) (x64_insertps_a_or_avx src1 src2 lane))
2618 (rule (x64_pshufb src1 src2) (x64_pshufb_a_or_avx src1 src2))
2622 (rule (x64_shufpd src1 src2 byte) (x64_shufpd_a_or_avx src1 src2 byte))
2626 (rule (x64_shufps src1 src2 byte) (x64_shufps_a_or_avx src1 src2 byte))
2660 (rule (x64_vpmullq src1 src2) (x64_vpmullq_c src1 src2))
2666 (rule (x64_vpermi2b src1 src2 src3) (x64_vpermi2b_a src1 src2 src3))
2670 (rule 1 (x64_psllw src1 (is_xmm_mem src2)) (x64_psllw_a_or_avx src1 src2))
2671 (rule 0 (x64_psllw src1 (is_imm8_xmm src2)) (x64_psllw_b_or_avx src1 src2))
2674 (rule 1 (x64_pslld src1 (is_xmm_mem src2)) (x64_pslld_a_or_avx src1 src2))
2675 (rule 0 (x64_pslld src1 (is_imm8_xmm src2)) (x64_pslld_b_or_avx src1 src2))
2678 (rule 1 (x64_psllq src1 (is_xmm_mem src2)) (x64_psllq_a_or_avx src1 src2))
2679 (rule 0 (x64_psllq src1 (is_imm8_xmm src2)) (x64_psllq_b_or_avx src1 src2))
2682 (rule 1 (x64_psrlw src1 (is_xmm_mem src2)) (x64_psrlw_a_or_avx src1 src2))
2683 (rule 0 (x64_psrlw src1 (is_imm8_xmm src2)) (x64_psrlw_b_or_avx src1 src2))
2686 (rule 1 (x64_psrld src1 (is_xmm_mem src2)) (x64_psrld_a_or_avx src1 src2))
2687 (rule 0 (x64_psrld src1 (is_imm8_xmm src2)) (x64_psrld_b_or_avx src1 src2))
2690 (rule 1 (x64_psrlq src1 (is_xmm_mem src2)) (x64_psrlq_a_or_avx src1 src2))
2691 (rule 0 (x64_psrlq src1 (is_imm8_xmm src2)) (x64_psrlq_b_or_avx src1 src2))
2694 (rule 1 (x64_psraw src1 (is_xmm_mem src2)) (x64_psraw_a_or_avx src1 src2))
2695 (rule 0 (x64_psraw src1 (is_imm8_xmm src2)) (x64_psraw_b_or_avx src1 src2))
2698 (rule 1 (x64_psrad src1 (is_xmm_mem src2)) (x64_psrad_a_or_avx src1 src2))
2699 (rule 0 (x64_psrad src1 (is_imm8_xmm src2)) (x64_psrad_b_or_avx src1 src2))
2703 (rule (x64_vpsraq src1 src2) (x64_vpsraq_g src1 src2))
2850 (rule (x64_bt $I16 src1 src2) (x64_btw_mr src1 src2))
2851 (rule (x64_bt $I32 src1 src2) (x64_btl_mr src1 src2))
2852 (rule (x64_bt $I64 src1 src2) (x64_btq_mr src1 src2))
2888 (rule (x64_minss src1 src2) (x64_minss_a_or_avx src1 src2))
2891 (rule (x64_minsd src1 src2) (x64_minsd_a_or_avx src1 src2))
2894 (rule (x64_minps src1 src2) (x64_minps_a_or_avx src1 src2))
2897 (rule (x64_minpd src1 src2) (x64_minpd_a_or_avx src1 src2))
2900 (rule (x64_maxss src1 src2) (x64_maxss_a_or_avx src1 src2))
2903 (rule (x64_maxsd src1 src2) (x64_maxsd_a_or_avx src1 src2))
2906 (rule (x64_maxps src1 src2) (x64_maxps_a_or_avx src1 src2))
2909 (rule (x64_maxpd src1 src2) (x64_maxpd_a_or_avx src1 src2))