Lines Matching refs:val
37 u32 val = ioflg_to_pciflg(ioflg); in baseres_to_pcires() local
42 if ((val & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO && addr <= 0xffffffff) in baseres_to_pcires()
43 val |= addr & PCI_BASE_ADDRESS_IO_MASK; in baseres_to_pcires()
44 else if ((val & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY) in baseres_to_pcires()
46 val |= addr & PCI_BASE_ADDRESS_MEM_MASK; in baseres_to_pcires()
47 if ((val & PCI_BASE_ADDRESS_MEM_TYPE_64) && have_sec) in baseres_to_pcires()
54 return val; in baseres_to_pcires()
67 u32 val; in odd_baseres_to_pcires() local
68 baseres_to_pcires(addr0, ioflg0, &have_sec, &val); in odd_baseres_to_pcires()
70 val = baseres_to_pcires(addr, ioflg, NULL, NULL); in odd_baseres_to_pcires()
71 return val; in odd_baseres_to_pcires()
78 u32 val = 0; in pci_emulated_read() local
100 val |= PCI_COMMAND_IO; in pci_emulated_read()
102 val |= PCI_COMMAND_MEMORY; in pci_emulated_read()
106 val = (d->device_id << 16) | d->vendor_id; in pci_emulated_read()
109 val = (d->device_class << 16) | (d->prog_if << 8) | d->rev_id; in pci_emulated_read()
112 val = ht << 16; in pci_emulated_read()
115 val = even_baseres_to_pcires(d->base_addr[0], d->flags[0]); in pci_emulated_read()
118 val = (d->irq >= 0 && d->irq <= 0xff) ? d->irq : 0; in pci_emulated_read()
123 val = odd_baseres_to_pcires(d->base_addr[0], d->flags[0], d->base_addr[1], d->flags[1]); in pci_emulated_read()
129 val = even_baseres_to_pcires(d->base_addr[2], d->flags[2]); in pci_emulated_read()
132 val = odd_baseres_to_pcires(d->base_addr[2], d->flags[2], d->base_addr[3], d->flags[3]); in pci_emulated_read()
135 val = even_baseres_to_pcires(d->base_addr[4], d->flags[4]); in pci_emulated_read()
138 val = odd_baseres_to_pcires(d->base_addr[4], d->flags[4], d->base_addr[5], d->flags[5]); in pci_emulated_read()
141 val = (d->subsys_id << 16) | d->subsys_vendor_id; in pci_emulated_read()
144 val = d->rom_base_addr & PCI_ROM_ADDRESS_MASK; in pci_emulated_read()
145 if (val) in pci_emulated_read()
146 val |= PCI_ROM_ADDRESS_ENABLE; in pci_emulated_read()
154 val |= PCI_COMMAND_IO; in pci_emulated_read()
156 val |= PCI_COMMAND_MEMORY; in pci_emulated_read()
159 val = d->bus; in pci_emulated_read()
164 …val = (((((d->bridge_base_addr[0] + d->bridge_size[0] - 1) >> 8) & PCI_IO_RANGE_MASK) << 8) & 0xff… in pci_emulated_read()
168 val |= (PCI_IO_RANGE_TYPE_16 << 8) | PCI_IO_RANGE_TYPE_16; in pci_emulated_read()
170 val |= (PCI_IO_RANGE_TYPE_32 << 8) | PCI_IO_RANGE_TYPE_32; in pci_emulated_read()
173 val = 0xff & PCI_IO_RANGE_MASK; in pci_emulated_read()
177 …val = (((((d->bridge_base_addr[1] + d->bridge_size[1] - 1) >> 16) & PCI_MEMORY_RANGE_MASK) << 16) … in pci_emulated_read()
180 val = 0xffff & PCI_MEMORY_RANGE_MASK; in pci_emulated_read()
185 …val = (((((d->bridge_base_addr[2] + d->bridge_size[2] - 1) >> 16) & PCI_PREF_RANGE_MASK) << 16) & … in pci_emulated_read()
189 val |= (PCI_PREF_RANGE_TYPE_64 << 16) | PCI_PREF_RANGE_TYPE_64; in pci_emulated_read()
191 val |= (PCI_PREF_RANGE_TYPE_32 << 16) | PCI_PREF_RANGE_TYPE_32; in pci_emulated_read()
194 val = 0xffff & PCI_PREF_RANGE_MASK; in pci_emulated_read()
198 val = d->bridge_base_addr[2] >> 32; in pci_emulated_read()
202 val = (d->bridge_base_addr[2] + d->bridge_size[2] - 1) >> 32; in pci_emulated_read()
206 val = ((((d->bridge_base_addr[0] + d->bridge_size[0] - 1) >> 16) << 16) & 0xffff0000) | in pci_emulated_read()
210 val = d->rom_base_addr & PCI_ROM_ADDRESS_MASK; in pci_emulated_read()
211 if (val) in pci_emulated_read()
212 val |= PCI_ROM_ADDRESS_ENABLE; in pci_emulated_read()
220 val |= PCI_COMMAND_MEMORY; in pci_emulated_read()
222 val |= PCI_COMMAND_IO; in pci_emulated_read()
225 val = d->bus; in pci_emulated_read()
229 val = d->bridge_base_addr[0] & ~0xfff; in pci_emulated_read()
231 val = 0xffffffff & ~0xfff; in pci_emulated_read()
235 val = (d->bridge_base_addr[0] + d->bridge_size[0] - 1) & ~0xfff; in pci_emulated_read()
239 val = d->bridge_base_addr[1] & ~0xfff; in pci_emulated_read()
241 val = 0xffffffff & ~0xfff; in pci_emulated_read()
245 val = (d->bridge_base_addr[1] + d->bridge_size[1] - 1) & ~0xfff; in pci_emulated_read()
250 val = d->bridge_base_addr[2] & PCI_CB_IO_RANGE_MASK; in pci_emulated_read()
253 val |= PCI_IO_RANGE_TYPE_16; in pci_emulated_read()
255 val |= PCI_IO_RANGE_TYPE_32; in pci_emulated_read()
258 val = 0x0000ffff & PCI_CB_IO_RANGE_MASK; in pci_emulated_read()
262 val = (d->bridge_base_addr[2] + d->bridge_size[2] - 1) & PCI_CB_IO_RANGE_MASK; in pci_emulated_read()
267 val = d->bridge_base_addr[3] & PCI_CB_IO_RANGE_MASK; in pci_emulated_read()
270 val |= PCI_IO_RANGE_TYPE_16; in pci_emulated_read()
272 val |= PCI_IO_RANGE_TYPE_32; in pci_emulated_read()
275 val = 0x0000ffff & PCI_CB_IO_RANGE_MASK; in pci_emulated_read()
279 val = (d->bridge_base_addr[3] + d->bridge_size[3] - 1) & PCI_CB_IO_RANGE_MASK; in pci_emulated_read()
283 val |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM0; in pci_emulated_read()
285 val |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM1; in pci_emulated_read()
288 val = (d->subsys_id << 16) | d->subsys_vendor_id; in pci_emulated_read()
293 val = (val >> (8 * (pos & 3))) & ((1 << (len * 8)) - 1); in pci_emulated_read()
297 *(buf++) = val & 0xff; in pci_emulated_read()
298 val >>= 8; in pci_emulated_read()