Lines Matching refs:s2a
16 ; CHECK-DAG: %x.addr.2.s2a = alloca i32
18 ; CHECK-DAG: %x.addr.1.s2a = alloca i32
20 ; CHECK-DAG: %x.addr.0.s2a = alloca i32
35 ; CHECK: %x.addr.0.final_reload = load i32, i32* %x.addr.0.s2a
40 ; CHECK: store i32 %x.addr.0.phiops.reload[[R1]], i32* %x.addr.0.s2a
48 ; CHECK: %x.addr.0.s2a.reload[[R2:[0-9]*]] = load i32, i32* %x.addr.0.s2a
49 ; CHECK: store i32 %x.addr.0.s2a.reload[[R2]], i32* %x.addr.1.phiops
54 ; CHECK: %x.addr.1.s2a.reload[[R5:[0-9]*]] = load i32, i32* %x.addr.1.s2a
55 ; CHECK: store i32 %x.addr.1.s2a.reload[[R5]], i32* %x.addr.0.phiops
62 ; CHECK: store i32 %x.addr.1.phiops.reload, i32* %x.addr.1.s2a
70 ; CHECK: %x.addr.1.s2a.reload = load i32, i32* %x.addr.1.s2a
71 ; CHECK: store i32 %x.addr.1.s2a.reload, i32* %x.addr.2.phiops
78 ; CHECK: store i32 %x.addr.2.phiops.reload, i32* %x.addr.2.s2a
84 ; CHECK: %x.addr.2.s2a.reload[[R3:[0-9]*]] = load i32, i32* %x.addr.2.s2a
85 ; CHECK: store i32 %x.addr.2.s2a.reload[[R3]], i32* %x.addr.1.phiops
91 ; CHECK: %x.addr.1.s2a.reload[[R5:[0-9]*]] = load i32, i32* %x.addr.1.s2a
92 ; CHECK: %p_add = add nsw i32 %x.addr.1.s2a.reload[[R5]], %tmp2_p_scalar_