Lines Matching refs:MIR
4 // RUN: FileCheck %s --check-prefix=CHECK-MIR
51 // CHECK-MIR-LABEL: func @sparse_dynamic_dims(
52 // CHECK-MIR-SAME: %[[VAL_0:.*]]: !llvm.ptr<i8>,
53 // CHECK-MIR-SAME: %[[VAL_1:.*]]: tensor<f32>) -> tensor<f32> {
54 // CHECK-MIR-DAG: %[[VAL_2:.*]] = arith.constant 2 : index
55 // CHECK-MIR-DAG: %[[VAL_3:.*]] = arith.constant 1 : index
56 // CHECK-MIR-DAG: %[[VAL_4:.*]] = arith.constant 0 : index
57 // CHECK-MIR-DAG: %[[VAL_5:.*]] = call @sparseDimSize(%[[VAL_0]], %[[VAL_4]]) : (!llvm.ptr<i8…
58 // CHECK-MIR-DAG: %[[VAL_6:.*]] = call @sparseDimSize(%[[VAL_0]], %[[VAL_3]]) : (!llvm.ptr<i8…
59 // CHECK-MIR-DAG: %[[VAL_7:.*]] = call @sparseDimSize(%[[VAL_0]], %[[VAL_2]]) : (!llvm.ptr<i8…
60 // CHECK-MIR-DAG: %[[VAL_8:.*]] = call @sparseValuesF32(%[[VAL_0]]) : (!llvm.ptr<i8>) -> memr…
61 // CHECK-MIR-DAG: %[[VAL_10:.*]] = bufferization.to_memref %[[VAL_1]] : memref<f32>
62 // CHECK-MIR: %[[VAL_11:.*]] = tensor.extract %[[VAL_1]][] : tensor<f32>
63 // CHECK-MIR: %[[VAL_12:.*]] = scf.for %[[VAL_13:.*]] = %[[VAL_4]] to %[[VAL_5]] step %[[…
64 // CHECK-MIR: %[[VAL_15:.*]] = scf.for %[[VAL_16:.*]] = %[[VAL_4]] to %[[VAL_6]] step %…
65 // CHECK-MIR: %[[VAL_18:.*]] = arith.muli %[[VAL_6]], %[[VAL_13]] : index
66 // CHECK-MIR: %[[VAL_19:.*]] = arith.addi %[[VAL_18]], %[[VAL_16]] : index
67 // CHECK-MIR: %[[VAL_20:.*]] = scf.for %[[VAL_21:.*]] = %[[VAL_4]] to %[[VAL_7]] step…
68 // CHECK-MIR: %[[VAL_23:.*]] = arith.muli %[[VAL_7]], %[[VAL_19]] : index
69 // CHECK-MIR: %[[VAL_24:.*]] = arith.addi %[[VAL_23]], %[[VAL_21]] : index
70 // CHECK-MIR: %[[VAL_25:.*]] = memref.load %[[VAL_8]]{{\[}}%[[VAL_24]]] : memref<?x…
71 // CHECK-MIR: %[[VAL_26:.*]] = arith.addf %[[VAL_22]], %[[VAL_25]] : f32
72 // CHECK-MIR: scf.yield %[[VAL_26]] : f32
73 // CHECK-MIR: }
74 // CHECK-MIR: scf.yield %[[VAL_20]] : f32
75 // CHECK-MIR: }
76 // CHECK-MIR: scf.yield %[[VAL_15]] : f32
77 // CHECK-MIR: }
78 // CHECK-MIR: memref.store %[[VAL_12]], %[[VAL_10]][] : memref<f32>
79 // CHECK-MIR: %[[VAL_30:.*]] = bufferization.to_tensor %[[VAL_10]] : memref<f32>
80 // CHECK-MIR: return %[[VAL_30]] : tensor<f32>
81 // CHECK-MIR: }