Lines Matching refs:gpu
46 static NVVM::ShflKind convertShflKind(gpu::ShuffleMode mode) { in convertShflKind()
48 case gpu::ShuffleMode::XOR: in convertShflKind()
50 case gpu::ShuffleMode::UP: in convertShflKind()
52 case gpu::ShuffleMode::DOWN: in convertShflKind()
54 case gpu::ShuffleMode::IDX: in convertShflKind()
60 struct GPUShuffleOpLowering : public ConvertOpToLLVMPattern<gpu::ShuffleOp> {
61 using ConvertOpToLLVMPattern<gpu::ShuffleOp>::ConvertOpToLLVMPattern;
82 matchAndRewrite(gpu::ShuffleOp op, OpAdaptor adaptor, in matchAndRewrite()
104 if (op.mode() == gpu::ShuffleMode::UP) { in matchAndRewrite()
127 struct GPULaneIdOpToNVVM : ConvertOpToLLVMPattern<gpu::LaneIdOp> {
128 using ConvertOpToLLVMPattern<gpu::LaneIdOp>::ConvertOpToLLVMPattern;
131 matchAndRewrite(gpu::LaneIdOp op, gpu::LaneIdOp::Adaptor adaptor, in matchAndRewrite()
167 gpu::GPUModuleOp m = getOperation(); in runOnOperation()
189 gpu::GPUDialect::getPrivateAddressSpace()) in runOnOperation()
194 converter.addConversion([&](gpu::MMAMatrixType type) -> Type { in runOnOperation()
225 target.addIllegalDialect<gpu::GPUDialect>(); in configureGpuToNVVMConversionLegality()
231 target.addLegalOp<gpu::YieldOp, gpu::GPUModuleOp, gpu::ModuleEndOp>(); in configureGpuToNVVMConversionLegality()
238 .add<GPUIndexIntrinsicOpLowering<gpu::ThreadIdOp, NVVM::ThreadIdXOp, in populateGpuToNVVMConversionPatterns()
240 GPUIndexIntrinsicOpLowering<gpu::BlockDimOp, NVVM::BlockDimXOp, in populateGpuToNVVMConversionPatterns()
242 GPUIndexIntrinsicOpLowering<gpu::BlockIdOp, NVVM::BlockIdXOp, in populateGpuToNVVMConversionPatterns()
244 GPUIndexIntrinsicOpLowering<gpu::GridDimOp, NVVM::GridDimXOp, in populateGpuToNVVMConversionPatterns()
295 std::unique_ptr<OperationPass<gpu::GPUModuleOp>>