Lines Matching refs:RC
978 CodeGenRegisterClass &RC = *I; in computeSubClasses() local
979 RC.SubClasses.resize(RegClasses.size()); in computeSubClasses()
980 RC.SubClasses.set(RC.EnumValue); in computeSubClasses()
981 if (RC.Artificial) in computeSubClasses()
987 if (RC.SubClasses.test(SubRC.EnumValue)) in computeSubClasses()
989 if (!testSubClass(&RC, &SubRC)) in computeSubClasses()
993 RC.SubClasses |= SubRC.SubClasses; in computeSubClasses()
997 for (auto I2 = std::next(I); I2 != E && testSubClass(&RC, &*I2); ++I2) in computeSubClasses()
998 RC.SubClasses.set(I2->EnumValue); in computeSubClasses()
1002 for (auto &RC : RegClasses) { in computeSubClasses() local
1003 const BitVector &SC = RC.getSubClasses(); in computeSubClasses()
1009 if (&*I == &RC) in computeSubClasses()
1011 I->SuperClasses.push_back(&RC); in computeSubClasses()
1018 for (auto &RC : RegClasses) in computeSubClasses() local
1019 if (!RC.getDef()) in computeSubClasses()
1020 RC.inheritProperties(RegBank); in computeSubClasses()
1046 for (auto &RC : RegClasses) in getMatchingSubClassWithSubRegs() local
1047 if (SuperRegRCsBV[RC.EnumValue]) in getMatchingSubClassWithSubRegs()
1048 SuperRegRCs.emplace_back(&RC); in getMatchingSubClassWithSubRegs()
1056 for (auto &RC: RegClasses) { in getMatchingSubClassWithSubRegs() local
1058 RC.getSuperRegClasses(SubIdx, SuperRegClassesBV); in getMatchingSubClassWithSubRegs()
1060 SuperRegClasses.push_back(std::make_pair(&RC, SuperRegClassesBV)); in getMatchingSubClassWithSubRegs()
1114 for (CodeGenRegisterClass *RC : FindI->second) in getSuperRegClasses()
1115 Out.set(RC->EnumValue); in getSuperRegClasses()
1179 for (Record *RC : TupRegs) in CodeGenRegBank()
1180 getReg(RC); in CodeGenRegBank()
1246 CodeGenRegisterClass &RC = RegClasses.back(); in CodeGenRegBank() local
1247 if (!RC.Artificial) in CodeGenRegBank()
1248 addToMaps(&RC); in CodeGenRegBank()
1257 for (auto &RC : RegClasses) in CodeGenRegBank() local
1258 RC.EnumValue = i++; in CodeGenRegBank()
1298 void CodeGenRegBank::addToMaps(CodeGenRegisterClass *RC) { in addToMaps() argument
1299 if (Record *Def = RC->getDef()) in addToMaps()
1300 Def2RC.insert(std::make_pair(Def, RC)); in addToMaps()
1304 CodeGenRegisterClass::Key K(*RC); in addToMaps()
1305 Key2RC.insert(std::make_pair(K, RC)); in addToMaps()
1310 CodeGenRegBank::getOrCreateSubClass(const CodeGenRegisterClass *RC, in getOrCreateSubClass() argument
1314 CodeGenRegisterClass::Key K(Members, RC->RSI); in getOrCreateSubClass()
1326 if (CodeGenRegisterClass *RC = Def2RC.lookup(Def)) in getRegClass() local
1327 return RC; in getRegClass()
1942 for (auto &RC : RegClasses) { in computeRegUnitSets() local
1943 if (!RC.Allocatable || RC.Artificial || !RC.GeneratePressureSet) in computeRegUnitSets()
1948 RegUnitSets.back().Name = RC.getName(); in computeRegUnitSets()
1951 RC.buildRegUnitSet(*this, RegUnitSets.back().Units); in computeRegUnitSets()
2046 for (auto &RC : RegClasses) { in computeRegUnitSets() local
2048 if (!RC.Allocatable) in computeRegUnitSets()
2053 RC.buildRegUnitSet(*this, RCRegUnits); in computeRegUnitSets()
2059 LLVM_DEBUG(dbgs() << "RC " << RC.getName() << " Units:\n"; in computeRegUnitSets()
2073 assert((!RegClassUnitSets[RCIdx].empty() || !RC.GeneratePressureSet) && in computeRegUnitSets()
2159 for (CodeGenRegisterClass &RC : RegClasses) { in computeDerivedInfo()
2160 RC.HasDisjunctSubRegs = false; in computeDerivedInfo()
2161 RC.CoveredBySubRegs = true; in computeDerivedInfo()
2162 for (const CodeGenRegister *Reg : RC.getMembers()) { in computeDerivedInfo()
2163 RC.HasDisjunctSubRegs |= Reg->HasDisjunctSubRegs; in computeDerivedInfo()
2164 RC.CoveredBySubRegs &= Reg->CoveredBySubRegs; in computeDerivedInfo()
2192 void CodeGenRegBank::inferCommonSubClass(CodeGenRegisterClass *RC) { in inferCommonSubClass() argument
2198 CodeGenRegisterClass *RC1 = RC; in inferCommonSubClass()
2232 void CodeGenRegBank::inferSubClassWithSubReg(CodeGenRegisterClass *RC) { in inferSubClassWithSubReg() argument
2240 for (const auto R : RC->getMembers()) { in inferSubClassWithSubReg()
2263 if (I->second.size() == RC->getMembers().size()) { in inferSubClassWithSubReg()
2264 RC->setSubClassWithSubReg(&SubIdx, RC); in inferSubClassWithSubReg()
2269 getOrCreateSubClass(RC, &I->second, in inferSubClassWithSubReg()
2270 RC->getName() + "_with_" + I->first->getName()); in inferSubClassWithSubReg()
2271 RC->setSubClassWithSubReg(&SubIdx, SubRC); in inferSubClassWithSubReg()
2282 void CodeGenRegBank::inferMatchingSuperRegClass(CodeGenRegisterClass *RC, in inferMatchingSuperRegClass() argument
2293 if (RC->getSubClassWithSubReg(&SubIdx) != RC) in inferMatchingSuperRegClass()
2299 for (const auto Super : RC->getMembers()) { in inferMatchingSuperRegClass()
2331 SubRC.addSuperRegClass(&SubIdx, RC); in inferMatchingSuperRegClass()
2337 getOrCreateSubClass(RC, &SubSetVec, RC->getName() + "_with_" + in inferMatchingSuperRegClass()
2360 CodeGenRegisterClass *RC = &*I; in computeInferredRegisterClasses() local
2361 if (RC->Artificial) in computeInferredRegisterClasses()
2365 inferSubClassWithSubReg(RC); in computeInferredRegisterClasses()
2368 inferCommonSubClass(RC); in computeInferredRegisterClasses()
2371 inferMatchingSuperRegClass(RC); in computeInferredRegisterClasses()
2398 for (const auto &RC : getRegClasses()) { in getRegClassForRegister() local
2399 if (!RC.contains(Reg)) in getRegClassForRegister()
2405 FoundRC = &RC; in getRegClassForRegister()
2410 if (RC.getValueTypes() != FoundRC->getValueTypes()) in getRegClassForRegister()
2416 if (RC.hasSubClass(FoundRC)) { in getRegClassForRegister()
2417 FoundRC = &RC; in getRegClassForRegister()
2424 if (FoundRC->hasSubClass(&RC)) in getRegClassForRegister()
2439 for (const auto &RC : getRegClasses()) { in getMinimalPhysRegClass() local
2440 if ((!VT || RC.hasType(*VT)) && in getMinimalPhysRegClass()
2441 RC.contains(Reg) && (!BestRC || BestRC->hasSubClass(&RC))) in getMinimalPhysRegClass()
2442 BestRC = &RC; in getMinimalPhysRegClass()