Lines Matching refs:addOperand
65 MI1->addOperand(*MF, MachineOperand::CreateReg(VirtualDef1, /*isDef*/ true)); in TEST()
66 MI1->addOperand(*MF, MachineOperand::CreateReg(VirtualUse, /*isDef*/ false)); in TEST()
69 MI2->addOperand(*MF, MachineOperand::CreateReg(VirtualDef2, /*isDef*/ true)); in TEST()
70 MI2->addOperand(*MF, MachineOperand::CreateReg(VirtualUse, /*isDef*/ false)); in TEST()
85 MI3->addOperand(*MF, MachineOperand::CreateReg(VirtualDef1, /*isDef*/ true)); in TEST()
86 MI3->addOperand(*MF, MachineOperand::CreateReg(SentinelReg, /*isDef*/ true)); in TEST()
89 MI4->addOperand(*MF, MachineOperand::CreateReg(VirtualDef2, /*isDef*/ true)); in TEST()
90 MI4->addOperand(*MF, MachineOperand::CreateReg(SentinelReg, /*isDef*/ false)); in TEST()
140 VD1VU->addOperand(*MF, in TEST()
142 VD1VU->addOperand(*MF, in TEST()
146 VD2VU->addOperand(*MF, in TEST()
148 VD2VU->addOperand(*MF, in TEST()
152 VD1SU->addOperand(*MF, in TEST()
154 VD1SU->addOperand(*MF, in TEST()
158 VD1SD->addOperand(*MF, in TEST()
160 VD1SD->addOperand(*MF, in TEST()
164 VD2PU->addOperand(*MF, in TEST()
166 VD2PU->addOperand(*MF, in TEST()
170 VD2PD->addOperand(*MF, in TEST()
172 VD2PD->addOperand(*MF, in TEST()
211 MI->addOperand(*MF, MachineOperand::CreateReg(0, /*isDef*/ true)); in TEST()
405 MI->addOperand(*MF, MachineOperand::CreateReg(0, /*isDef*/ false)); in TEST()
407 MI->addOperand(*MF, MachineOperand::CreateImm(0)); in TEST()