Lines Matching refs:Op
59 for (const auto &Op : Variant.getInstr().Operands) { in generateConfigurations() local
60 if (Op.isDef() && Op.isImplicitReg() && in generateConfigurations()
61 ScratchRegAliases.test(Op.getImplicitReg())) in generateConfigurations()
111 const auto GetOpReg = [&IT](const Operand &Op) -> unsigned { in computeRegisterInitialValues() argument
112 if (Op.isMemory()) in computeRegisterInitialValues()
114 if (Op.isImplicitReg()) in computeRegisterInitialValues()
115 return Op.getImplicitReg(); in computeRegisterInitialValues()
116 if (Op.isExplicit() && IT.getValueFor(Op).isReg()) in computeRegisterInitialValues()
117 return IT.getValueFor(Op).getReg(); in computeRegisterInitialValues()
121 for (const Operand &Op : IT.getInstr().Operands) { in computeRegisterInitialValues() local
122 if (Op.isUse()) { in computeRegisterInitialValues()
123 const unsigned Reg = GetOpReg(Op); in computeRegisterInitialValues()
131 for (const Operand &Op : IT.getInstr().Operands) { in computeRegisterInitialValues() local
132 if (Op.isDef()) { in computeRegisterInitialValues()
133 const unsigned Reg = GetOpReg(Op); in computeRegisterInitialValues()
194 assert(ROV.Op); in setRegisterOperandValue()
195 if (ROV.Op->isExplicit()) { in setRegisterOperandValue()
196 auto &AssignedValue = IB.getValueFor(*ROV.Op); in setRegisterOperandValue()
203 assert(ROV.Op->isImplicitReg()); in setRegisterOperandValue()
204 assert(ROV.Reg == ROV.Op->getImplicitReg()); in setRegisterOperandValue()
229 const Operand &Op = Instr.getPrimaryOperand(Var); in randomizeMCOperand() local
230 if (Op.getExplicitOperandInfo().OperandType >= in randomizeMCOperand()
234 switch (Op.getExplicitOperandInfo().OperandType) { in randomizeMCOperand()
240 assert(Op.isReg()); in randomizeMCOperand()
241 auto AllowedRegs = Op.getRegisterAliasing().sourceBits(); in randomizeMCOperand()
249 Op.getRegisterAliasing().sourceBits())) in randomizeMCOperand()