151   for (auto &Op : Operands)  in create()  local
152     if (Op.isExplicit() && !Op.isTied()) {  in create()
155       Op.VariableIndex = VariableIndex;  in create()
160   for (auto &Op : Operands)  in create()  local
161     if (Op.isExplicit() && Op.isTied())  in create()
162       Op.VariableIndex = Operands[Op.getTiedToIndex()].getVariableIndex();  in create()
164   for (auto &Op : Operands)  in create()  local
165     if (Op.isVariable())  in create()
166       Variables[Op.getVariableIndex()].TiedOperands.push_back(Op.getIndex());  in create()
172   for (const auto &Op : Operands) {  in create()  local
173     if (Op.isReg()) {  in create()
174       const auto &AliasingBits = Op.getRegisterAliasing().aliasedBits();  in create()
175       if (Op.isDef())  in create()
177       if (Op.isUse())  in create()
179       if (Op.isDef() && Op.isImplicit())  in create()
181       if (Op.isUse() && Op.isImplicit())  in create()
201   return any_of(Operands, [](const Operand &Op) {  in hasMemoryOperands()  argument
202     return Op.isReg() && Op.isExplicit() && Op.isMemory();  in hasMemoryOperands()
254   for (const auto &Op : Operands) {  in dump()  local
255     Stream << "- Op" << Op.getIndex();  in dump()
256     if (Op.isExplicit())  in dump()
258     if (Op.isImplicit())  in dump()
260     if (Op.isUse())  in dump()
262     if (Op.isDef())  in dump()
264     if (Op.isImmediate())  in dump()
266     if (Op.isMemory())  in dump()
268     if (Op.isReg()) {  in dump()
269       if (Op.isImplicitReg())  in dump()
270         Stream << " Reg(" << RegInfo.getName(Op.getImplicitReg()) << ")";  in dump()
274                       &RegInfo.getRegClass(Op.Info->RegClass))  in dump()
277     if (Op.isTied())  in dump()
278       Stream << " TiedToOp" << Op.getTiedToIndex();  in dump()
317   return std::tie(Op, Reg) == std::tie(Other.Op, Other.Reg);  in operator ==()
329   for (const auto &Op : Operands) {  in addOperandIfAlias()  local
330     if (Op.isReg() && Op.isDef() == SelectDef) {  in addOperandIfAlias()
331       const int SourceReg = Op.getRegisterAliasing().getOrigin(Reg);  in addOperandIfAlias()
333         OperandValues.emplace_back(&Op, SourceReg);  in addOperandIfAlias()
340     return ROV.Op->isImplicit();  in hasImplicitAliasing()
369 void DumpMCOperand(const MCRegisterInfo &MCRegisterInfo, const MCOperand &Op,  in DumpMCOperand()  argument
371   if (!Op.isValid())  in DumpMCOperand()
373   else if (Op.isReg())  in DumpMCOperand()
374     OS << MCRegisterInfo.getName(Op.getReg());  in DumpMCOperand()
375   else if (Op.isImm())  in DumpMCOperand()
376     OS << Op.getImm();  in DumpMCOperand()
377   else if (Op.isDFPImm())  in DumpMCOperand()
378     OS << bit_cast<double>(Op.getDFPImm());  in DumpMCOperand()
379   else if (Op.isSFPImm())  in DumpMCOperand()
380     OS << bit_cast<float>(Op.getSFPImm());  in DumpMCOperand()
381   else if (Op.isExpr())  in DumpMCOperand()
383   else if (Op.isInst())  in DumpMCOperand()