zext.ll - OpenGrok cross reference for /llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/zext.ll

Lines Matching refs:zext
18 ; SSE2-NEXT:    [[X0:%.*]] = zext i8 [[I0]] to i64
19 ; SSE2-NEXT:    [[X1:%.*]] = zext i8 [[I1]] to i64
27 ; SLM-NEXT:    [[TMP3:%.*]] = zext <2 x i8> [[TMP2]] to <2 x i64>
33 ; AVX-NEXT:    [[TMP3:%.*]] = zext <2 x i8> [[TMP2]] to <2 x i64>
39   %x0 = zext i8 %i0 to i64
40   %x1 = zext i8 %i1 to i64
50 ; SSE2-NEXT:    [[TMP3:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i32>
56 ; SLM-NEXT:    [[TMP3:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i32>
62 ; AVX-NEXT:    [[TMP3:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i32>
72   %x0 = zext i8 %i0 to i32
73   %x1 = zext i8 %i1 to i32
74   %x2 = zext i8 %i2 to i32
75   %x3 = zext i8 %i3 to i32
87 ; SSE2-NEXT:    [[TMP3:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i64>
93 ; SLM-NEXT:    [[TMP3:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i64>
99 ; AVX-NEXT:    [[TMP3:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i64>
109   %x0 = zext i8 %i0 to i64
110   %x1 = zext i8 %i1 to i64
111   %x2 = zext i8 %i2 to i64
112   %x3 = zext i8 %i3 to i64
124 ; SSE2-NEXT:    [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i16>
130 ; SLM-NEXT:    [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i16>
136 ; AVX-NEXT:    [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i16>
154   %x0 = zext i8 %i0 to i16
155   %x1 = zext i8 %i1 to i16
156   %x2 = zext i8 %i2 to i16
157   %x3 = zext i8 %i3 to i16
158   %x4 = zext i8 %i4 to i16
159   %x5 = zext i8 %i5 to i16
160   %x6 = zext i8 %i6 to i16
161   %x7 = zext i8 %i7 to i16
177 ; SSE2-NEXT:    [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i32>
183 ; SLM-NEXT:    [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i32>
189 ; AVX-NEXT:    [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i32>
207   %x0 = zext i8 %i0 to i32
208   %x1 = zext i8 %i1 to i32
209   %x2 = zext i8 %i2 to i32
210   %x3 = zext i8 %i3 to i32
211   %x4 = zext i8 %i4 to i32
212   %x5 = zext i8 %i5 to i32
213   %x6 = zext i8 %i6 to i32
214   %x7 = zext i8 %i7 to i32
230 ; SSE2-NEXT:    [[TMP3:%.*]] = zext <16 x i8> [[TMP2]] to <16 x i16>
236 ; SLM-NEXT:    [[TMP3:%.*]] = zext <16 x i8> [[TMP2]] to <16 x i16>
242 ; AVX-NEXT:    [[TMP3:%.*]] = zext <16 x i8> [[TMP2]] to <16 x i16>
276   %x0  = zext i8 %i0  to i16
277   %x1  = zext i8 %i1  to i16
278   %x2  = zext i8 %i2  to i16
279   %x3  = zext i8 %i3  to i16
280   %x4  = zext i8 %i4  to i16
281   %x5  = zext i8 %i5  to i16
282   %x6  = zext i8 %i6  to i16
283   %x7  = zext i8 %i7  to i16
284   %x8  = zext i8 %i8  to i16
285   %x9  = zext i8 %i9  to i16
286   %x10 = zext i8 %i10 to i16
287   %x11 = zext i8 %i11 to i16
288   %x12 = zext i8 %i12 to i16
289   %x13 = zext i8 %i13 to i16
290   %x14 = zext i8 %i14 to i16
291   %x15 = zext i8 %i15 to i16
319 ; SSE2-NEXT:    [[TMP3:%.*]] = zext <2 x i16> [[TMP2]] to <2 x i64>
325 ; SLM-NEXT:    [[TMP3:%.*]] = zext <2 x i16> [[TMP2]] to <2 x i64>
331 ; AVX-NEXT:    [[TMP3:%.*]] = zext <2 x i16> [[TMP2]] to <2 x i64>
337   %x0 = zext i16 %i0 to i64
338   %x1 = zext i16 %i1 to i64
348 ; SSE2-NEXT:    [[TMP3:%.*]] = zext <4 x i16> [[TMP2]] to <4 x i32>
354 ; SLM-NEXT:    [[TMP3:%.*]] = zext <4 x i16> [[TMP2]] to <4 x i32>
360 ; AVX-NEXT:    [[TMP3:%.*]] = zext <4 x i16> [[TMP2]] to <4 x i32>
370   %x0 = zext i16 %i0 to i32
371   %x1 = zext i16 %i1 to i32
372   %x2 = zext i16 %i2 to i32
373   %x3 = zext i16 %i3 to i32
385 ; SSE2-NEXT:    [[TMP3:%.*]] = zext <4 x i16> [[TMP2]] to <4 x i64>
391 ; SLM-NEXT:    [[TMP3:%.*]] = zext <4 x i16> [[TMP2]] to <4 x i64>
397 ; AVX-NEXT:    [[TMP3:%.*]] = zext <4 x i16> [[TMP2]] to <4 x i64>
407   %x0 = zext i16 %i0 to i64
408   %x1 = zext i16 %i1 to i64
409   %x2 = zext i16 %i2 to i64
410   %x3 = zext i16 %i3 to i64
422 ; SSE2-NEXT:    [[TMP3:%.*]] = zext <8 x i16> [[TMP2]] to <8 x i32>
428 ; SLM-NEXT:    [[TMP3:%.*]] = zext <8 x i16> [[TMP2]] to <8 x i32>
434 ; AVX-NEXT:    [[TMP3:%.*]] = zext <8 x i16> [[TMP2]] to <8 x i32>
452   %x0 = zext i16 %i0 to i32
453   %x1 = zext i16 %i1 to i32
454   %x2 = zext i16 %i2 to i32
455   %x3 = zext i16 %i3 to i32
456   %x4 = zext i16 %i4 to i32
457   %x5 = zext i16 %i5 to i32
458   %x6 = zext i16 %i6 to i32
459   %x7 = zext i16 %i7 to i32
479 ; SSE2-NEXT:    [[TMP3:%.*]] = zext <2 x i32> [[TMP2]] to <2 x i64>
485 ; SLM-NEXT:    [[TMP3:%.*]] = zext <2 x i32> [[TMP2]] to <2 x i64>
491 ; AVX-NEXT:    [[TMP3:%.*]] = zext <2 x i32> [[TMP2]] to <2 x i64>
497   %x0 = zext i32 %i0 to i64
498   %x1 = zext i32 %i1 to i64
508 ; SSE2-NEXT:    [[TMP3:%.*]] = zext <4 x i32> [[TMP2]] to <4 x i64>
514 ; SLM-NEXT:    [[TMP3:%.*]] = zext <4 x i32> [[TMP2]] to <4 x i64>
520 ; AVX-NEXT:    [[TMP3:%.*]] = zext <4 x i32> [[TMP2]] to <4 x i64>
530   %x0 = zext i32 %i0 to i64
531   %x1 = zext i32 %i1 to i64
532   %x2 = zext i32 %i2 to i64
533   %x3 = zext i32 %i3 to i64