Lines Matching refs:INDEX

19 ; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_C…
20 ; CHECK-NEXT:    [[INDUCTION:%.*]] = add i64 [[INDEX]], 0
21 ; CHECK-NEXT:    [[INDUCTION1:%.*]] = add i64 [[INDEX]], 1
22 ; CHECK-NEXT:    [[INDUCTION2:%.*]] = add i64 [[INDEX]], 2
23 ; CHECK-NEXT:    [[INDUCTION3:%.*]] = add i64 [[INDEX]], 3
30 ; CHECK-NEXT:    [[SUNK_IND0:%.*]] = add i64 [[INDEX]], 0
37 ; CHECK-NEXT:    [[SUNK_IND1:%.*]] = add i64 [[INDEX]], 1
44 ; CHECK-NEXT:    [[SUNK_IND2:%.*]] = add i64 [[INDEX]], 2
51 ; CHECK-NEXT:    [[SUNK_IND3:%.*]] = add i64 [[INDEX]], 3
56 ; CHECK-NEXT:    [[INDEX_NEXT]] = add i64 [[INDEX]], 4
98 ; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_C…
99 ; CHECK-NEXT:    [[VEC_IV:%.*]] = add i64 [[INDEX]], 0
100 ; CHECK-NEXT:    [[VEC_IV4:%.*]] = add i64 [[INDEX]], 1
101 ; CHECK-NEXT:    [[VEC_IV5:%.*]] = add i64 [[INDEX]], 2
102 ; CHECK-NEXT:    [[VEC_IV6:%.*]] = add i64 [[INDEX]], 3
109 ; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 0
116 ; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[INDEX]], 1
123 ; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[INDEX]], 2
130 ; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[INDEX]], 3
135 ; CHECK-NEXT:    [[INDEX_NEXT]] = add i64 [[INDEX]], 4