Lines Matching refs:access
79 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP4]], align 4, !llvm.access.gro…
84 ; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP5]], align 4, !llvm.access.group [[ACC_GRP0]]
85 ; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP6]], align 4, !llvm.access.group [[ACC_GRP0]]
86 ; CHECK-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP7]], align 4, !llvm.access.group [[ACC_GRP0]]
87 ; CHECK-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP8]], align 4, !llvm.access.group [[ACC_GRP0]]
97 ; CHECK-NEXT: store i32 [[TMP21]], i32* [[TMP17]], align 4, !llvm.access.group [[ACC_GRP1:![0-9]…
99 ; CHECK-NEXT: store i32 [[TMP22]], i32* [[TMP18]], align 4, !llvm.access.group [[ACC_GRP1]]
101 ; CHECK-NEXT: store i32 [[TMP23]], i32* [[TMP19]], align 4, !llvm.access.group [[ACC_GRP1]]
103 ; CHECK-NEXT: store i32 [[TMP24]], i32* [[TMP20]], align 4, !llvm.access.group [[ACC_GRP1]]
107 ; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP27]], align 4, !llvm.access.g…
109 ; CHECK-NEXT: store <4 x i32> [[WIDE_LOAD1]], <4 x i32>* [[TMP28]], align 4, !llvm.access.group …
128 %0 = load i32, i32* %arrayidx, align 4, !llvm.access.group !13
130 %1 = load i32, i32* %arrayidx2, align 4, !llvm.access.group !13
135 store i32 %0, i32* %arrayidx4, align 4, !llvm.access.group !15
138 %2 = load i32, i32* %arrayidx6, align 4, !llvm.access.group !13
139 store i32 %2, i32* %arrayidx2, align 4, !llvm.access.group !13
159 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP7…
161 ; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4, !llvm.access.group [[ACC_GRP…
164 ; CHECK-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX4]], align 4, !llvm.access.group [[ACC_GRP8:![0…
167 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP…
168 ; CHECK-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX2]], align 4, !llvm.access.group [[ACC_GRP7]]
181 %0 = load i32, i32* %arrayidx, align 4, !llvm.access.group !16
183 %1 = load i32, i32* %arrayidx2, align 4, !llvm.access.group !16
188 store i32 %0, i32* %arrayidx4, align 4, !llvm.access.group !17
191 %2 = load i32, i32* %arrayidx6, align 4, !llvm.access.group !16
192 store i32 %2, i32* %arrayidx2, align 4, !llvm.access.group !16