Lines Matching refs:CONV

15 ; CHECK-NEXT:    [[CONV:%.*]] = sext i8 [[X:%.*]] to i32
16 ; CHECK-NEXT:    [[DIV:%.*]] = sdiv i32 [[CONV]], 128
35 ; CHECK-NEXT:    [[CONV:%.*]] = sext i8 [[X:%.*]] to i32
36 ; CHECK-NEXT:    [[DIV:%.*]] = sdiv i32 [[CONV]], -128
55 ; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[X:%.*]] to i32
56 ; CHECK-NEXT:    [[DIV:%.*]] = sdiv i32 [[CONV]], 255
75 ; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[X:%.*]] to i32
76 ; CHECK-NEXT:    [[DIV:%.*]] = sdiv i32 [[CONV]], -255
166 ; CHECK-NEXT:    [[CONV:%.*]] = sext i8 [[X:%.*]] to i32
167 ; CHECK-NEXT:    ret i32 [[CONV]]
176 ; CHECK-NEXT:    [[CONV:%.*]] = sext i8 [[X:%.*]] to i32
177 ; CHECK-NEXT:    [[REM:%.*]] = srem i32 [[CONV]], 128
187 ; CHECK-NEXT:    [[CONV:%.*]] = sext i8 [[X:%.*]] to i32
188 ; CHECK-NEXT:    ret i32 [[CONV]]
197 ; CHECK-NEXT:    [[CONV:%.*]] = sext i8 [[X:%.*]] to i32
198 ; CHECK-NEXT:    [[REM:%.*]] = srem i32 [[CONV]], -128
208 ; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[X:%.*]] to i32
209 ; CHECK-NEXT:    ret i32 [[CONV]]
218 ; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[X:%.*]] to i32
219 ; CHECK-NEXT:    [[REM:%.*]] = srem i32 [[CONV]], 255
229 ; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[X:%.*]] to i32
230 ; CHECK-NEXT:    ret i32 [[CONV]]
239 ; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[X:%.*]] to i32
240 ; CHECK-NEXT:    [[REM:%.*]] = srem i32 [[CONV]], -255