Lines Matching refs:sub
11 %r = sub i32 %x, 42
19 ; CHECK-NEXT: [[R:%.*]] = sub i32 [[X:%.*]], ptrtoint (i32* @g to i32)
22 %r = sub i32 %x, ptrtoint (i32* @g to i32)
31 %r = sub <2 x i32> %x, <i32 42, i32 -12>
40 %r = sub <3 x i33> %x, <i33 -42, i33 42, i33 -12>
46 ; CHECK-NEXT: [[R:%.*]] = sub <4 x i32> [[X:%.*]], bitcast (i128 ptrtoint (i32* @g to i128) to <…
49 %r = sub <4 x i32> %x, bitcast (i128 ptrtoint (i32* @g to i128) to <4 x i32>)
58 %neg = sub i32 0, %x
59 %r = sub i32 %y, %neg
68 %neg = sub nsw i32 0, %x
69 %r = sub i32 %y, %neg
78 %neg = sub i32 0, %x
79 %r = sub nsw i32 %y, %neg
88 %neg = sub nsw i32 0, %x
89 %r = sub nsw i32 %y, %neg
98 %neg = sub <2 x i32> zeroinitializer, %x
99 %r = sub <2 x i32> %y, %neg
108 %neg = sub nsw <2 x i32> zeroinitializer, %x
109 %r = sub <2 x i32> %y, %neg
118 %neg = sub <2 x i32> zeroinitializer, %x
119 %r = sub nsw <2 x i32> %y, %neg
128 %neg = sub nsw <2 x i32> zeroinitializer, %x
129 %r = sub nsw <2 x i32> %y, %neg
138 %neg = sub <2 x i32> <i32 0, i32 undef>, %x
139 %r = sub <2 x i32> %y, %neg
148 %neg = sub nsw <2 x i32> <i32 undef, i32 0>, %x
149 %r = sub <2 x i32> %y, %neg
158 %neg = sub <2 x i32> <i32 undef, i32 0>, %x
159 %r = sub nsw <2 x i32> %y, %neg
170 %neg = sub nsw <2 x i32> <i32 0, i32 undef>, %x
171 %r = sub nsw <2 x i32> %y, %neg
184 ; CHECK-NEXT: [[SUB:%.*]] = sub i8 [[Y]], [[X]]
191 %sub = sub i8 %nx, %ny
194 ret i8 %sub
199 ; CHECK-NEXT: [[SUB:%.*]] = sub <2 x i8> [[Y:%.*]], [[X:%.*]]
204 %sub = sub <2 x i8> %nx, %ny
205 ret <2 x i8> %sub
210 ; CHECK-NEXT: [[SUB:%.*]] = sub <2 x i8> [[Y:%.*]], [[X:%.*]]
215 %sub = sub <2 x i8> %nx, %ny
216 ret <2 x i8> %sub
221 ; CHECK-NEXT: [[D_NEG:%.*]] = sub i32 [[C:%.*]], [[B:%.*]]
225 %D = sub i32 %B, %C
226 %E = sub i32 %A, %D
237 %D = sub i32 %A, %C
248 %D = sub i32 %A, %C
257 %B = sub i32 -1, %A
267 %C = sub i32 %B, %A
277 %C = sub i32 %A, %B
286 %C = sub i8 %A, %B
296 %C = sub <2 x i8> %A, %B
307 %C = sub i32 0, %B
317 %C = sub i32 0, %B
327 %C = sub <2 x i32> zeroinitializer, %B
337 %C = sub <2 x i32> zeroinitializer, %B
343 ; CHECK-NEXT: [[C:%.*]] = sub i32 0, [[A:%.*]]
347 %C = sub i32 0, %A
358 %Y = sub i32 0, %X
366 ; CHECK-NEXT: [[B:%.*]] = sub i32 0, [[A:%.*]]
370 %B = sub i32 0, %A
381 %i.8 = sub i64 %i.4, %i.12
390 %i.2 = sub i32 %g, %h
400 %i.2 = sub i32 %g, %h
411 %i2 = sub i32 0, %a
412 %i4 = sub i32 0, %b
423 %neg = sub i32 0, %shl
429 ; CHECK-NEXT: [[SUB_NEG:%.*]] = sub i64 [[B:%.*]], [[A:%.*]]
433 %sub = sub i64 %a, %b
434 %mul = shl i64 %sub, 2
435 %neg = sub i64 0, %mul
441 ; CHECK-NEXT: [[SUB:%.*]] = sub i64 [[A:%.*]], [[B:%.*]]
446 %sub = sub i64 %a, %b
447 store i64 %sub, i64* %p
448 %mul = shl i64 %sub, 2
449 %neg = sub i64 0, %mul
455 ; CHECK-NEXT: [[SUB:%.*]] = sub i64 [[A:%.*]], [[B:%.*]]
458 ; CHECK-NEXT: [[NEG:%.*]] = sub i64 0, [[MUL]]
461 %sub = sub i64 %a, %b
462 %mul = shl i64 %sub, 2
464 %neg = sub i64 0, %mul
476 %neg = sub i64 0, %shl
488 %neg = sub i64 0, %shl
500 %neg = sub i64 0, %shl
512 %neg = sub i64 0, %ext
525 %neg = sub i64 0, %ext
532 ; CHECK-NEXT: [[SUB_NEG:%.*]] = sub i64 [[B:%.*]], [[A:%.*]]
537 %sub = sub i64 %a, %b
538 %shl = shl i64 %sub, 2
540 %neg = sub i32 0, %trunc
554 %neg = sub i32 0, %trunc
568 %neg = sub i32 0, %trunc
574 ; CHECK-NEXT: [[SUB_NEG:%.*]] = sub i64 [[B:%.*]], [[A:%.*]]
578 %sub = sub i64 %a, %b
579 %mul = mul i64 %sub, %c
580 %neg = sub i64 0, %mul
587 ; CHECK-NEXT: [[SUB_NEG:%.*]] = sub i64 [[B:%.*]], [[A:%.*]]
592 %sub = sub i64 %a, %b
593 %mul = mul i64 %complex, %sub
594 %neg = sub i64 0, %mul
605 %sub = sub i32 %x, %mul
606 ret i32 %sub
616 %sub = sub <2 x i32> %x, %mul
617 ret <2 x i32> %sub
627 %sub = sub <2 x i32> %x, %mul
628 ret <2 x i32> %sub
638 %sub = sub <2 x i32> %x, %mul
639 ret <2 x i32> %sub
649 %sub = sub i32 %x, %mul
650 ret i32 %sub
660 %sub = sub <2 x i32> %x, %mul
661 ret <2 x i32> %sub
671 %sub = sub <2 x i32> %x, %mul
672 ret <2 x i32> %sub
682 %sub = sub <2 x i32> %x, %mul
683 ret <2 x i32> %sub
692 %neg = sub i32 0, %z
694 %sub = sub i32 %x, %mul
695 ret i32 %sub
704 %neg = sub i32 0, %z
706 %sub = sub i32 %x, %mul
707 ret i32 %sub
716 %sub = sub <2 x i64> <i64 2, i64 3>, %xor
717 ret <2 x i64> %sub
722 ; CHECK-NEXT: [[SUB:%.*]] = sub <2 x i64> <i64 3, i64 4>, [[A:%.*]]
726 %sub = sub <2 x i64> <i64 2, i64 3>, %add
727 ret <2 x i64> %sub
736 %sub = sub <2 x i64> %A, %mul
737 ret <2 x i64> %sub
746 %sub = sub <2 x i64> %shl, %A
747 ret <2 x i64> %sub
757 %sub = sub nsw <2 x i32> zeroinitializer, %div
758 ret <2 x i32> %sub
768 %sub = sub nsw i32 0, %div
769 ret i32 %sub
776 ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i16 [[ASHR]], [[ASHR1]]
781 %sub = sub i16 %ashr, %ashr1
782 ret i16 %sub
789 ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[CONV]], [[CONV1]]
794 %sub = sub i32 %conv, %conv1
795 ret i32 %sub
802 ; CHECK-NEXT: [[C:%.*]] = sub nsw i4 [[A]], [[B]]
807 %c = sub i4 %a, %b
815 ; CHECK-NEXT: [[C:%.*]] = sub nuw i4 [[A]], [[B]]
820 %c = sub i4 %a, %b
829 %sub = sub nsw i32 %x, 32768
830 ret i32 %sub
838 %sub = sub nsw <2 x i32> %x, <i32 32768, i32 32768>
839 ret <2 x i32> %sub
847 …%sub = sub nsw <vscale x 2 x i32> %x, shufflevector (<vscale x 2 x i32> insertelement (<vscale x 2…
848 ret <vscale x 2 x i32> %sub
856 %sub = sub nsw <2 x i16> %x, <i16 -32768, i16 -32768>
857 ret <2 x i16> %sub
867 …%sub = sub nsw <vscale x 2 x i16> %x, shufflevector (<vscale x 2 x i16> insertelement (<vscale x 2…
868 ret <vscale x 2 x i16> %sub
878 %sub = sub i32 %or, %xor
879 ret i32 %sub
889 %sub = sub i32 %or, %xor
890 ret i32 %sub
900 %sub = sub i32 %or, %x
901 ret i32 %sub
911 %sub = sub i32 %or, %x
912 ret i32 %sub
917 ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[D:%.*]], [[C:%.*]]
923 %sub = sub i32 %sel0, %sel1
924 ret i32 %sub
929 ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[D:%.*]], [[C:%.*]]
935 %sub = sub i32 %sel0, %sel1
936 ret i32 %sub
941 ; CHECK-NEXT: [[SUB:%.*]] = sub i32 1, [[X:%.*]]
945 %sub = sub i32 129, %X
946 %res = and i32 %sub, 64
952 ; CHECK-NEXT: [[SUB:%.*]] = sub i32 1, [[X:%.*]]
956 %sub = sub i32 129, %X
957 %res = and i32 %sub, 127
963 ; CHECK-NEXT: [[SUB:%.*]] = sub i32 126, [[X:%.*]]
967 %sub = sub i32 254, %X
968 %res = and i32 %sub, 64
974 ; CHECK-NEXT: [[SUB:%.*]] = sub i32 126, [[X:%.*]]
978 %sub = sub i32 254, %X
979 %res = and i32 %sub, 127
988 %sub = sub <2 x i1> %A, %B
989 ret <2 x i1> %sub
998 %V = sub i32 123, %A
1008 %V = sub <2 x i32> <i32 123, i32 123>, %A
1018 %V = sub <2 x i32> <i32 123, i32 333>, %A
1040 %value = sub i32 123, %A
1062 %value = sub <2 x i32> <i32 123, i32 123>, %A
1084 %value = sub <2 x i32> <i32 123, i32 333>, %A
1090 ; CHECK-NEXT: [[Y:%.*]] = sub i32 0, [[B:%.*]]
1094 %Y = sub i32 %A, %X
1100 ; CHECK-NEXT: [[Y:%.*]] = sub i32 0, [[B:%.*]]
1104 %Y = sub i32 %A, %X
1113 ; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[I:%.*]], [[J:%.*]]
1120 %sub = sub i64 %cast1, %cast2
1121 ret i64 %sub
1137 %sub = sub i64 %cast1, %cast2
1140 ret i64 %sub
1149 ; CHECK-NEXT: [[SUB:%.*]] = sub i64 [[CAST1]], [[CAST2]]
1158 %sub = sub i64 %cast1, %cast2
1160 ret i64 %sub
1169 ; CHECK-NEXT: [[SUB:%.*]] = sub i64 [[CAST1]], [[CAST2]]
1178 %sub = sub i64 %cast1, %cast2
1180 ret i64 %sub
1189 %B = sub i32 1, %A
1200 %B = sub <2 x i32> <i32 1, i32 1>, %A
1210 %B = sub i32 1, %A
1212 %D = sub i32 2, %C
1221 %B = sub <2 x i32> <i32 1, i32 1>, %A
1223 %D = sub <2 x i32> <i32 2, i32 2>, %C
1236 %res = sub i32 0, %3
1249 %res = sub i32 0, %3
1262 %res = sub i32 0, %3
1275 %res = sub i32 0, %3
1289 %res = sub <2 x i32> zeroinitializer, %3
1303 %res = sub <2 x i32> zeroinitializer, %3
1314 %C = sub i32 %B, 123
1322 ; CHECK-NEXT: [[D:%.*]] = sub i32 [[C]], [[B]]
1327 %D = sub i32 %C, %B
1340 %D = sub <2 x i32> %C, %B
1344 ; Check reversing sub operands won't trigger (X | Y) - Y --> X & ~Y
1348 ; CHECK-NEXT: [[D:%.*]] = sub i32 [[B]], [[C]]
1352 %D = sub i32 %B, %C
1360 ; CHECK-NEXT: [[Z:%.*]] = sub nuw nsw i32 [[X2]], [[Y2]]
1365 %z = sub i32 %x2, %y2
1373 ; CHECK-NEXT: [[Z:%.*]] = sub nsw i32 [[X2]], [[Y2]]
1378 %z = sub i32 %x2, %y2
1386 ; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]]
1391 %t1 = sub i8 %x, %t0
1404 %t1 = sub i8 %x, %t0
1414 ; CHECK-NEXT: [[S2:%.*]] = sub i8 [[TMP1]], [[TMP2]]
1417 %s1 = sub i8 %w, %x
1419 %s2 = sub i8 %a, %z
1430 ; CHECK-NEXT: [[S2:%.*]] = sub <2 x i8> [[TMP1]], [[TMP2]]
1434 %s1 = sub <2 x i8> %w, %x
1436 %s2 = sub <2 x i8> %a, %z
1447 ; CHECK-NEXT: [[S3:%.*]] = sub i8 [[TMP2]], [[TMP3]]
1450 %s1 = sub i8 %v, %w
1451 %s2 = sub i8 %x, %y
1453 %s3 = sub i8 %a, %z
1461 ; CHECK-NEXT: [[S1:%.*]] = sub i8 [[W:%.*]], [[X:%.*]]
1464 ; CHECK-NEXT: [[S2:%.*]] = sub i8 [[A]], [[Z:%.*]]
1467 %s1 = sub i8 %w, %x
1470 %s2 = sub i8 %a, %z
1478 ; CHECK-NEXT: [[S1:%.*]] = sub i8 [[W:%.*]], [[X:%.*]]
1481 ; CHECK-NEXT: [[S2:%.*]] = sub i8 [[A]], [[Z:%.*]]
1484 %s1 = sub i8 %w, %x
1487 %s2 = sub i8 %a, %z
1499 %r = sub i8 %a1, %a2
1509 ; CHECK-NEXT: [[R:%.*]] = sub i8 [[A1]], [[A2]]
1514 %r = sub i8 %a1, %a2
1529 %r = sub <2 x i8> %a1, %a2
1535 ; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i16 [[X:%.*]], [[Y:%.*]]
1541 %r = sub nsw i16 %x8, %y8
1547 ; CHECK-NEXT: [[TMP1:%.*]] = sub i16 [[X:%.*]], [[Y:%.*]]
1553 %r = sub nuw i16 %x8, %y8
1559 ; CHECK-NEXT: [[TMP1:%.*]] = sub i16 [[X:%.*]], [[Y:%.*]]
1565 %r = sub i16 %x8, %y8
1571 ; CHECK-NEXT: [[TMP1:%.*]] = sub i16 [[X:%.*]], [[Y:%.*]]
1577 %r = sub nsw i16 %x8, %y8
1583 ; CHECK-NEXT: [[TMP1:%.*]] = sub nuw i16 [[X:%.*]], [[Y:%.*]]
1589 %r = sub nuw i16 %x8, %y8
1595 ; CHECK-NEXT: [[TMP1:%.*]] = sub i16 [[X:%.*]], [[Y:%.*]]
1601 %r = sub i16 %x8, %y8
1611 %r = sub i32 %a, %o
1622 %r = sub i32 %a, %o
1633 %r = sub i32 %a, %o
1645 %r = sub <2 x i8> %a, %o
1656 %r = sub i32 %a, %b
1667 %r = sub i32 %a, %b
1678 %r = sub i32 %a, %b
1689 %r = sub <2 x i8> %a, %b
1696 ; CHECK-NEXT: [[DOTNEG:%.*]] = sub i32 -11, [[TMP1]]
1699 %sub = sub i32 0, %a
1701 %sub1 = sub i32 %sub, %add
1708 ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i8 [[X]], [[REM]]
1712 %sub = sub i8 %x, %rem
1713 ret i8 %sub
1719 ; CHECK-NEXT: [[SUB:%.*]] = sub nuw <2 x i5> [[X]], [[REM]]
1723 %sub = sub <2 x i5> %x, %rem
1724 ret <2 x i5> %sub
1730 ; CHECK-NEXT: [[S:%.*]] = sub nuw nsw <3 x i32> <i32 255, i32 128, i32 0>, [[ZY]]
1734 %s = sub nuw <3 x i32> <i32 255, i32 128, i32 0>, %zy
1741 ; CHECK-NEXT: [[S:%.*]] = sub nuw nsw i32 257, [[ZY]]
1745 %s = sub nuw i32 257, %zy
1753 ; CHECK-NEXT: [[S:%.*]] = sub nuw nsw i32 [[ZX]], [[ZY]]
1758 %s = sub nuw i32 %zx, %zy
1766 ; CHECK-NEXT: [[S:%.*]] = sub nuw nsw <2 x i16> [[ZX]], [[SY]]
1771 %s = sub nuw <2 x i16> %zx, %sy
1779 ; CHECK-NEXT: [[S:%.*]] = sub nuw nsw i32 [[SX]], [[ZY]]
1784 %s = sub nuw i32 %sx, %zy
1793 ; CHECK-NEXT: [[S:%.*]] = sub nuw nsw i8 [[ZX]], [[ZY]]
1799 %s = sub nuw i8 %zx, %zy
1808 ; CHECK-NEXT: [[S:%.*]] = sub nuw nsw i8 [[ZX]], [[ZY]]
1814 %s = sub nuw i8 %zx, %zy
1824 ; CHECK-NEXT: [[S:%.*]] = sub nuw nsw i8 [[ZX]], [[ZY]]
1831 %s = sub nuw i8 %zx, %zy
1839 ; CHECK-NEXT: [[S:%.*]] = sub nuw nsw i32 [[ZX]], [[ZY]]
1844 %s = sub nuw i32 %zx, %zy
1853 %d = sub nsw i8 %x, %y
1856 %z = sub i16 %ex, %ed
1864 ; CHECK-NEXT: [[D:%.*]] = sub nsw i8 [[X:%.*]], [[Y:%.*]]
1867 ; CHECK-NEXT: [[Z:%.*]] = sub nsw i16 [[EX]], [[ED]]
1870 %d = sub nsw i8 %x, %y
1873 %z = sub i16 %ex, %ed
1881 ; CHECK-NEXT: [[D:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
1884 ; CHECK-NEXT: [[Z:%.*]] = sub nsw i16 [[EX]], [[ED]]
1887 %d = sub i8 %x, %y
1890 %z = sub i16 %ex, %ed
1898 ; CHECK-NEXT: [[D:%.*]] = sub nsw i8 [[X:%.*]], [[Y:%.*]]
1901 ; CHECK-NEXT: [[Z:%.*]] = sub nsw i16 [[EQ]], [[ED]]
1904 %d = sub nsw i8 %x, %y
1907 %z = sub i16 %eq, %ed
1920 %d = sub i8 %x, %r
1923 %z = sub i16 %sx, %sd
1932 %d = sub nuw i8 %x, %y
1935 %z = sub i16 %ex, %ed
1943 ; CHECK-NEXT: [[D:%.*]] = sub nuw i8 [[X:%.*]], [[Y:%.*]]
1946 ; CHECK-NEXT: [[Z:%.*]] = sub nsw i16 [[EX]], [[ED]]
1949 %d = sub nuw i8 %x, %y
1952 %z = sub i16 %ex, %ed
1960 ; CHECK-NEXT: [[D:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
1963 ; CHECK-NEXT: [[Z:%.*]] = sub nsw i16 [[EX]], [[ED]]
1966 %d = sub i8 %x, %y
1969 %z = sub i16 %ex, %ed
1977 ; CHECK-NEXT: [[D:%.*]] = sub nuw i8 [[X:%.*]], [[Y:%.*]]
1980 ; CHECK-NEXT: [[Z:%.*]] = sub nsw i16 [[EQ]], [[ED]]
1983 %d = sub nuw i8 %x, %y
1986 %z = sub i16 %eq, %ed
1999 %d = sub i8 %x, %r
2002 %z = sub i16 %ex, %ed