Lines Matching refs:ADD

51 ; CHECK-NEXT:    [[ADD:%.*]] = xor <2 x i1> [[A:%.*]], [[B:%.*]]
52 ; CHECK-NEXT:    ret <2 x i1> [[ADD]]
60 ; CHECK-NEXT:    [[ADD:%.*]] = mul <2 x i64> [[A:%.*]], <i64 5, i64 9>
61 ; CHECK-NEXT:    ret <2 x i64> [[ADD]]
70 ; CHECK-NEXT:    [[ADD:%.*]] = mul <2 x i64> [[A:%.*]], <i64 7, i64 12>
71 ; CHECK-NEXT:    ret <2 x i64> [[ADD]]
249 ; CHECK-NEXT:    [[ADD:%.*]] = mul i16 [[A:%.*]], 5
250 ; CHECK-NEXT:    ret i16 [[ADD]]
260 ; CHECK-NEXT:    [[ADD:%.*]] = mul nsw i16 [[A:%.*]], 9
261 ; CHECK-NEXT:    ret i16 [[ADD]]
271 ; CHECK-NEXT:    [[ADD:%.*]] = mul nsw i16 [[A:%.*]], 10
272 ; CHECK-NEXT:    ret i16 [[ADD]]
283 ; CHECK-NEXT:    [[ADD:%.*]] = mul nsw i32 [[MUL1]], 6
284 ; CHECK-NEXT:    ret i32 [[ADD]]
304 ; CHECK-NEXT:    [[ADD:%.*]] = mul nsw i16 [[A:%.*]], 32767
305 ; CHECK-NEXT:    ret i16 [[ADD]]
315 ; CHECK-NEXT:    [[ADD:%.*]] = shl i16 [[A:%.*]], 15
316 ; CHECK-NEXT:    ret i16 [[ADD]]
373 ; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[X:%.*]], [[Y:%.*]]
374 ; CHECK-NEXT:    ret i32 [[ADD]]
384 ; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[X:%.*]], [[Y:%.*]]
385 ; CHECK-NEXT:    ret i32 [[ADD]]
395 ; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[X:%.*]], [[Y:%.*]]
396 ; CHECK-NEXT:    ret i32 [[ADD]]
406 ; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[X:%.*]], [[Y:%.*]]
407 ; CHECK-NEXT:    ret i32 [[ADD]]
417 ; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[X:%.*]], [[Y:%.*]]
418 ; CHECK-NEXT:    ret i32 [[ADD]]
428 ; CHECK-NEXT:    [[ADD:%.*]] = add nuw i32 [[X:%.*]], [[Y:%.*]]
429 ; CHECK-NEXT:    ret i32 [[ADD]]
439 ; CHECK-NEXT:    [[ADD:%.*]] = add nuw nsw i32 [[X:%.*]], [[Y:%.*]]
440 ; CHECK-NEXT:    ret i32 [[ADD]]
467 ; CHECK-NEXT:    [[ADD:%.*]] = select i1 [[A:%.*]], i32 [[B:%.*]], i32 0
468 ; CHECK-NEXT:    ret i32 [[ADD]]