Lines Matching refs:SUB

16 ; CHECK-NEXT:    [[SIZE_ADDR_0:%.*]] = phi i32 [ [[SIZE]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_…
18 ; CHECK-NEXT:    [[SUB]] = add i32 [[SIZE_ADDR_0]], -32
43 ; CHECK-NEXT:    [[SIZE_ADDR_0:%.*]] = phi i32 [ [[SIZE:%.*]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WH…
46 ; CHECK-NEXT:    [[SUB]] = add i32 [[SIZE_ADDR_0]], -32
73 ; CHECK-NEXT:    [[S_ADDR_0:%.*]] = phi i32 [ [[S:%.*]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_BO…
77 ; CHECK-NEXT:    [[SUB]] = add nsw i32 [[S_ADDR_0]], -32
107 ; CHECK-NEXT:    [[S_ADDR_0:%.*]] = phi i32 [ [[S:%.*]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[DO_BODY]…
108 ; CHECK-NEXT:    [[SUB]] = add nsw i32 [[S_ADDR_0]], -16
110 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[SUB]], 15
113 ; CHECK-NEXT:    [[SUB_LCSSA:%.*]] = phi i32 [ [[SUB]], [[DO_BODY]] ]
136 ; CHECK-NEXT:    [[S_ADDR_0:%.*]] = phi i32 [ [[S:%.*]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_BO…
140 ; CHECK-NEXT:    [[SUB]] = add i32 [[S_ADDR_0]], -16
170 ; CHECK-NEXT:    [[S_ADDR_0:%.*]] = phi i32 [ [[S:%.*]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[DO_BODY]…
171 ; CHECK-NEXT:    [[SUB]] = add i32 [[S_ADDR_0]], -16
173 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[SUB]], 15
176 ; CHECK-NEXT:    [[SUB_LCSSA:%.*]] = phi i32 [ [[SUB]], [[DO_BODY]] ]