Lines Matching refs:unordered
70 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 4 [[TMP0]], i8 …
72 ; CHECK-NEXT: store atomic i32 1, i32* [[ARRAYIDX1]] unordered, align 4
78 call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 4 %p3, i8 0, i64 28, i32 4)
80 store atomic i32 1, i32* %arrayidx1 unordered, align 4
105 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 4 [[TMP0]], i8 …
106 ; CHECK-NEXT: store atomic i32 1, i32* [[P]] unordered, align 4
111 call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 4 %p3, i8 0, i64 28, i32 4)
112 store atomic i32 1, i32* %p unordered, align 4
122 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 4 [[TMP0]], i8 …
128 call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 4 %p3, i8 0, i64 28, i32 4)
158 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 4 [[TMP0]], i8 …
160 ; CHECK-NEXT: store atomic i64 1, i64* [[P4]] unordered, align 8
165 call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 4 %p3, i8 0, i64 32, i32 4)
167 store atomic i64 1, i64* %p4 unordered, align 8
197 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 4 [[TMP0]], i8 …
199 ; CHECK-NEXT: store atomic i64 1, i64* [[P4]] unordered, align 8
205 call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 4 %p3, i8 0, i64 28, i32 4)
207 store atomic i64 1, i64* %p4 unordered, align 8
232 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 8 [[P3]], i8 0,…
233 ; CHECK-NEXT: store atomic i32 1, i32* [[P]] unordered, align 4
238 call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 8 %p3, i8 0, i64 32, i32 4)
239 store atomic i32 1, i32* %p unordered, align 4
264 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 4 [[P3]], i8 0,…
266 ; CHECK-NEXT: store atomic i16 1, i16* [[P4]] unordered, align 4
271 call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 4 %p3, i8 0, i64 32, i32 4)
273 store atomic i16 1, i16* %p4 unordered, align 4
307 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 4 [[TMP0]], i8 …
311 ; CHECK-NEXT: store atomic i64 1, i64* [[P5]] unordered, align 8
317 call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 4 %p3, i8 0, i64 32, i32 4)
321 store atomic i64 1, i64* %p5 unordered, align 8
358 ; CHECK-NEXT: tail call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 8 [[TMP0]]…
361 ; CHECK-NEXT: store atomic i64 1, i64* [[BASE64_1]] unordered, align 8
362 ; CHECK-NEXT: store atomic i64 2, i64* [[BASE64_0]] unordered, align 8
369 …tail call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 8 %mybase0, i8 0, i64 32, …
374 store atomic i64 1, i64* %base64_1 unordered, align 8
375 store atomic i64 2, i64* %base64_0 unordered, align 8
385 ; CHECK-NEXT: tail call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 8 [[TMP0]]…
388 ; CHECK-NEXT: store atomic i64 1, i64* [[BASE64_1]] unordered, align 8
396 …tail call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 8 %mybase0, i8 0, i64 32, …
401 store atomic i64 1, i64* %base64_1 unordered, align 8
412 ; CHECK-NEXT: tail call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 8 [[TMP0]]…
416 ; CHECK-NEXT: store atomic i64 2, i64* [[BASE64_0]] unordered, align 8
423 …tail call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 8 %mybase0, i8 0, i64 32, …
429 store atomic i64 2, i64* %base64_0 unordered, align 8
436 declare void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* nocapture, i8, i64, i32) nounwind