Lines Matching refs:icmp
8 ; CHECK-NEXT: [[C_1:%.*]] = icmp uge i8 [[ADD_PTR_I]], [[HIGH:%.*]]
11 ; CHECK-NEXT: [[UC_3:%.*]] = icmp ugt i8 [[START]], [[HIGH]]
13 ; CHECK-NEXT: [[UC_4:%.*]] = icmp uge i8 [[START_1_1]], [[HIGH]]
16 ; CHECK-NEXT: [[T_0:%.*]] = icmp uge i8 [[START_3_1]], [[HIGH]]
18 ; CHECK-NEXT: [[UC_5:%.*]] = icmp ugt i8 [[START_3_1]], [[HIGH]]
20 ; CHECK-NEXT: [[SC_8:%.*]] = icmp sge i8 [[START_1_1]], [[HIGH]]
22 ; CHECK-NEXT: [[SC_9:%.*]] = icmp sge i8 [[START_3_1]], [[HIGH]]
26 ; CHECK-NEXT: [[F_0:%.*]] = icmp ugt i8 [[START]], [[HIGH]]
28 ; CHECK-NEXT: [[F_1:%.*]] = icmp uge i8 [[START_1]], [[HIGH]]
30 ; CHECK-NEXT: [[SC_1:%.*]] = icmp sgt i8 [[START]], [[HIGH]]
32 ; CHECK-NEXT: [[SC_2:%.*]] = icmp sge i8 [[START_1]], [[HIGH]]
35 ; CHECK-NEXT: [[F_2:%.*]] = icmp uge i8 [[START_2]], [[HIGH]]
37 ; CHECK-NEXT: [[SC_3:%.*]] = icmp sge i8 [[START_2]], [[HIGH]]
39 ; CHECK-NEXT: [[SC_4:%.*]] = icmp sle i8 [[START_2]], [[START_1]]
42 ; CHECK-NEXT: [[F_3:%.*]] = icmp uge i8 [[START_3]], [[HIGH]]
44 ; CHECK-NEXT: [[SC_5:%.*]] = icmp sge i8 [[START_3]], [[START_1]]
47 ; CHECK-NEXT: [[UC_2:%.*]] = icmp uge i8 [[START_4]], [[HIGH]]
49 ; CHECK-NEXT: [[SC_6:%.*]] = icmp sge i8 [[START_4]], [[START_1]]
51 ; CHECK-NEXT: [[SC_7:%.*]] = icmp sge i8 [[START_4]], [[HIGH]]
57 %c.1 = icmp uge i8 %add.ptr.i, %high
62 %uc.3 = icmp ugt i8 %start, %high
64 %uc.4 = icmp uge i8 %start.1.1, %high
68 %t.0 = icmp uge i8 %start.3.1, %high
71 %uc.5 = icmp ugt i8 %start.3.1, %high
74 %sc.8 = icmp sge i8 %start.1.1, %high
77 %sc.9 = icmp sge i8 %start.3.1, %high
83 %f.0 = icmp ugt i8 %start, %high
85 %f.1 = icmp uge i8 %start.1, %high
88 %sc.1 = icmp sgt i8 %start, %high
91 %sc.2 = icmp sge i8 %start.1, %high
95 %f.2 = icmp uge i8 %start.2, %high
98 %sc.3 = icmp sge i8 %start.2, %high
101 %sc.4 = icmp sle i8 %start.2, %start.1
105 %f.3 = icmp uge i8 %start.3, %high
108 %sc.5 = icmp sge i8 %start.3, %start.1
112 %uc.2 = icmp uge i8 %start.4, %high
115 %sc.6 = icmp sge i8 %start.4, %start.1
118 %sc.7 = icmp sge i8 %start.4, %high
128 ; CHECK-NEXT: [[C_1:%.*]] = icmp sge i8 [[ADD_PTR_I]], [[HIGH:%.*]]
131 ; CHECK-NEXT: [[UC_3:%.*]] = icmp ugt i8 [[START]], [[HIGH]]
133 ; CHECK-NEXT: [[UC_4:%.*]] = icmp uge i8 [[START_1_1]], [[HIGH]]
136 ; CHECK-NEXT: [[T_0:%.*]] = icmp uge i8 [[START_3_1]], [[HIGH]]
138 ; CHECK-NEXT: [[UC_5:%.*]] = icmp ugt i8 [[START_3_1]], [[HIGH]]
140 ; CHECK-NEXT: [[SC_8:%.*]] = icmp sge i8 [[START_1_1]], [[HIGH]]
142 ; CHECK-NEXT: [[SC_9:%.*]] = icmp sge i8 [[START_3_1]], [[HIGH]]
146 ; CHECK-NEXT: [[F_0:%.*]] = icmp ugt i8 [[START]], [[HIGH]]
148 ; CHECK-NEXT: [[F_1:%.*]] = icmp uge i8 [[START_1]], [[HIGH]]
150 ; CHECK-NEXT: [[SC_1:%.*]] = icmp sgt i8 [[START]], [[HIGH]]
152 ; CHECK-NEXT: [[SC_2:%.*]] = icmp sge i8 [[START_1]], [[HIGH]]
155 ; CHECK-NEXT: [[F_2:%.*]] = icmp uge i8 [[START_2]], [[HIGH]]
157 ; CHECK-NEXT: [[SC_3:%.*]] = icmp sge i8 [[START_2]], [[HIGH]]
159 ; CHECK-NEXT: [[SC_4:%.*]] = icmp sle i8 [[START_2]], [[START_1]]
162 ; CHECK-NEXT: [[F_3:%.*]] = icmp uge i8 [[START_3]], [[HIGH]]
164 ; CHECK-NEXT: [[SC_5:%.*]] = icmp sge i8 [[START_3]], [[START_1]]
167 ; CHECK-NEXT: [[UC_2:%.*]] = icmp uge i8 [[START_4]], [[HIGH]]
169 ; CHECK-NEXT: [[SC_6:%.*]] = icmp sge i8 [[START_4]], [[START_1]]
171 ; CHECK-NEXT: [[SC_7:%.*]] = icmp sge i8 [[START_4]], [[HIGH]]
177 %c.1 = icmp sge i8 %add.ptr.i, %high
181 %uc.3 = icmp ugt i8 %start, %high
183 %uc.4 = icmp uge i8 %start.1.1, %high
187 %t.0 = icmp uge i8 %start.3.1, %high
190 %uc.5 = icmp ugt i8 %start.3.1, %high
193 %sc.8 = icmp sge i8 %start.1.1, %high
196 %sc.9 = icmp sge i8 %start.3.1, %high
202 %f.0 = icmp ugt i8 %start, %high
204 %f.1 = icmp uge i8 %start.1, %high
207 %sc.1 = icmp sgt i8 %start, %high
210 %sc.2 = icmp sge i8 %start.1, %high
214 %f.2 = icmp uge i8 %start.2, %high
217 %sc.3 = icmp sge i8 %start.2, %high
220 %sc.4 = icmp sle i8 %start.2, %start.1
224 %f.3 = icmp uge i8 %start.3, %high
227 %sc.5 = icmp sge i8 %start.3, %start.1
231 %uc.2 = icmp uge i8 %start.4, %high
234 %sc.6 = icmp sge i8 %start.4, %start.1
237 %sc.7 = icmp sge i8 %start.4, %high
248 ; CHECK-NEXT: [[C_1:%.*]] = icmp uge i8 [[ADD_PTR_I]], [[HIGH:%.*]]
251 ; CHECK-NEXT: [[UC_3:%.*]] = icmp ugt i8 [[START]], [[HIGH]]
253 ; CHECK-NEXT: [[UC_4:%.*]] = icmp uge i8 [[START_1_1]], [[HIGH]]
256 ; CHECK-NEXT: [[T_0:%.*]] = icmp uge i8 [[START_3_1]], [[HIGH]]
258 ; CHECK-NEXT: [[UC_5:%.*]] = icmp ugt i8 [[START_3_1]], [[HIGH]]
260 ; CHECK-NEXT: [[SC_8:%.*]] = icmp sge i8 [[START_1_1]], [[HIGH]]
262 ; CHECK-NEXT: [[SC_9:%.*]] = icmp sge i8 [[START_3_1]], [[HIGH]]
266 ; CHECK-NEXT: [[F_0:%.*]] = icmp ugt i8 [[START]], [[HIGH]]
268 ; CHECK-NEXT: [[F_1:%.*]] = icmp uge i8 [[START_1]], [[HIGH]]
270 ; CHECK-NEXT: [[SC_1:%.*]] = icmp sgt i8 [[START]], [[HIGH]]
272 ; CHECK-NEXT: [[SC_2:%.*]] = icmp sge i8 [[START_1]], [[HIGH]]
275 ; CHECK-NEXT: [[F_2:%.*]] = icmp uge i8 [[START_2]], [[HIGH]]
277 ; CHECK-NEXT: [[SC_3:%.*]] = icmp sge i8 [[START_2]], [[HIGH]]
279 ; CHECK-NEXT: [[SC_4:%.*]] = icmp sle i8 [[START_2]], [[START_1]]
282 ; CHECK-NEXT: [[F_3:%.*]] = icmp uge i8 [[START_3]], [[HIGH]]
284 ; CHECK-NEXT: [[SC_5:%.*]] = icmp sge i8 [[START_3]], [[START_1]]
287 ; CHECK-NEXT: [[UC_2:%.*]] = icmp uge i8 [[START_4]], [[HIGH]]
289 ; CHECK-NEXT: [[SC_6:%.*]] = icmp sge i8 [[START_4]], [[START_1]]
291 ; CHECK-NEXT: [[SC_7:%.*]] = icmp sge i8 [[START_4]], [[HIGH]]
297 %c.1 = icmp uge i8 %add.ptr.i, %high
302 %uc.3 = icmp ugt i8 %start, %high
304 %uc.4 = icmp uge i8 %start.1.1, %high
308 %t.0 = icmp uge i8 %start.3.1, %high
311 %uc.5 = icmp ugt i8 %start.3.1, %high
314 %sc.8 = icmp sge i8 %start.1.1, %high
317 %sc.9 = icmp sge i8 %start.3.1, %high
323 %f.0 = icmp ugt i8 %start, %high
325 %f.1 = icmp uge i8 %start.1, %high
328 %sc.1 = icmp sgt i8 %start, %high
331 %sc.2 = icmp sge i8 %start.1, %high
335 %f.2 = icmp uge i8 %start.2, %high
338 %sc.3 = icmp sge i8 %start.2, %high
341 %sc.4 = icmp sle i8 %start.2, %start.1
345 %f.3 = icmp uge i8 %start.3, %high
348 %sc.5 = icmp sge i8 %start.3, %start.1
352 %uc.2 = icmp uge i8 %start.4, %high
355 %sc.6 = icmp sge i8 %start.4, %start.1
358 %sc.7 = icmp sge i8 %start.4, %high
367 ; CHECK-NEXT: [[C_1:%.*]] = icmp ule i32 [[X:%.*]], [[Y:%.*]]
368 ; CHECK-NEXT: [[C_2:%.*]] = icmp sle i32 [[Y]], [[Z:%.*]]
372 ; CHECK-NEXT: [[UC_1:%.*]] = icmp ule i32 [[X]], [[Z]]
373 ; CHECK-NEXT: [[UC_2:%.*]] = icmp ule i32 [[X]], [[Y]]
375 ; CHECK-NEXT: [[UC_3:%.*]] = icmp ule i32 [[Y]], [[Z]]
377 ; CHECK-NEXT: [[UC_4:%.*]] = icmp ule i32 [[X]], [[A:%.*]]
379 ; CHECK-NEXT: [[SC_1:%.*]] = icmp sle i32 [[X]], [[Z]]
381 ; CHECK-NEXT: [[SC_2:%.*]] = icmp sle i32 [[X]], [[Y]]
383 ; CHECK-NEXT: [[SC_3:%.*]] = icmp sle i32 [[Y]], [[Z]]
385 ; CHECK-NEXT: [[SC_4:%.*]] = icmp sle i32 [[X]], [[A]]
389 ; CHECK-NEXT: [[UC_5:%.*]] = icmp ule i32 [[X]], [[Z]]
390 ; CHECK-NEXT: [[UC_6:%.*]] = icmp ule i32 [[X]], [[A]]
392 ; CHECK-NEXT: [[UC_7:%.*]] = icmp ule i32 [[X]], [[Y]]
394 ; CHECK-NEXT: [[UC_8:%.*]] = icmp ule i32 [[Y]], [[Z]]
396 ; CHECK-NEXT: [[SC_5:%.*]] = icmp sle i32 [[X]], [[Z]]
398 ; CHECK-NEXT: [[SC_6:%.*]] = icmp sle i32 [[X]], [[A]]
400 ; CHECK-NEXT: [[SC_7:%.*]] = icmp sle i32 [[X]], [[Y]]
402 ; CHECK-NEXT: [[SC_8:%.*]] = icmp sle i32 [[Y]], [[Z]]
407 %c.1 = icmp ule i32 %x, %y
408 %c.2 = icmp sle i32 %y, %z
413 %uc.1 = icmp ule i32 %x, %z
414 %uc.2 = icmp ule i32 %x, %y
417 %uc.3 = icmp ule i32 %y, %z
420 %uc.4 = icmp ule i32 %x, %a
423 %sc.1 = icmp sle i32 %x, %z
426 %sc.2 = icmp sle i32 %x, %y
429 %sc.3 = icmp sle i32 %y, %z
432 %sc.4 = icmp sle i32 %x, %a
438 %uc.5 = icmp ule i32 %x, %z
439 %uc.6 = icmp ule i32 %x, %a
442 %uc.7 = icmp ule i32 %x, %y
445 %uc.8 = icmp ule i32 %y, %z
448 %sc.5 = icmp sle i32 %x, %z
451 %sc.6 = icmp sle i32 %x, %a
454 %sc.7 = icmp sle i32 %x, %y
457 %sc.8 = icmp sle i32 %y, %z