Lines Matching refs:a3

107 # CHECK-ASM-AND-OBJ: addu32 a3, l0, l1
109 addu32 a3, l0, l1
111 # CHECK-ASM-AND-OBJ: subu32 a3, l0, l1
113 subu32 a3, l0, l1
115 # CHECK-ASM-AND-OBJ: and32 a3, l0, l1
117 and32 a3, l0, l1
119 # CHECK-ASM-AND-OBJ: andn32 a3, l0, l1
121 andn32 a3, l0, l1
123 # CHECK-ASM-AND-OBJ: or32 a3, l0, l1
125 or32 a3, l0, l1
127 # CHECK-ASM-AND-OBJ: xor32 a3, l0, l1
129 xor32 a3, l0, l1
131 # CHECK-ASM-AND-OBJ: nor32 a3, l0, l1
133 nor32 a3, l0, l1
135 # CHECK-ASM-AND-OBJ: lsl32 a3, l0, l1
137 lsl32 a3, l0, l1
139 # CHECK-ASM-AND-OBJ: rotl32 a3, l0, l1
141 rotl32 a3, l0, l1
143 # CHECK-ASM-AND-OBJ: lsr32 a3, l0, l1
145 lsr32 a3, l0, l1
147 # CHECK-ASM-AND-OBJ: asr32 a3, l0, l1
149 asr32 a3, l0, l1
167 # CHECK-ASM-AND-OBJ: bmaski32 a3, 17
169 bmaski32 a3, 17
171 # CHECK-ASM-AND-OBJ: mult32 a3, l0, l1
173 mult32 a3, l0, l1
175 # CHECK-ASM-AND-OBJ: divs32 a3, l0, l1
177 divs32 a3, l0, l1
179 # CHECK-ASM-AND-OBJ: divu32 a3, l0, l1
181 divu32 a3, l0, l1
183 # CHECK-ASM-AND-OBJ: ixh32 a3, l0, l1
185 ixh32 a3, l0, l1
187 # CHECK-ASM-AND-OBJ: ixw32 a3, l0, l1
189 ixw32 a3, l0, l1
191 # CHECK-ASM-AND-OBJ: ixd32 a3, l0, l1
193 ixd32 a3, l0, l1
195 # CHECK-ASM-AND-OBJ: addc32 a3, l0, l1
197 addc32 a3, l0, l1
199 # CHECK-ASM-AND-OBJ: subc32 a3, l0, l1
201 subc32 a3, l0, l1
301 # CHECK-ASM-AND-OBJ: brev32 a3, l0
303 brev32 a3, l0
305 # CHECK-ASM-AND-OBJ: abs32 a3, l0
307 abs32 a3, l0
309 # CHECK-ASM-AND-OBJ: bgenr32 a3, l0
311 bgenr32 a3, l0
313 # CHECK-ASM-AND-OBJ: revb32 a3, l0
315 revb32 a3, l0
317 # CHECK-ASM-AND-OBJ: revh32 a3, l0
319 revh32 a3, l0
321 # CHECK-ASM-AND-OBJ: ff0.32 a3, l0
323 ff0.32 a3, l0
325 # CHECK-ASM-AND-OBJ: ff1.32 a3, l0
327 ff1.32 a3, l0
329 # CHECK-ASM-AND-OBJ: xtrb0.32 a3, l0
331 xtrb0.32 a3, l0
333 # CHECK-ASM-AND-OBJ: xtrb1.32 a3, l0
335 xtrb1.32 a3, l0
337 # CHECK-ASM-AND-OBJ: xtrb2.32 a3, l0
339 xtrb2.32 a3, l0
341 # CHECK-ASM-AND-OBJ: xtrb3.32 a3, l0
343 xtrb3.32 a3, l0
345 # CHECK-ASM-AND-OBJ: mvc32 a3
347 mvc32 a3
349 # CHECK-ASM-AND-OBJ: mvcv32 a3
351 mvcv32 a3
353 # CHECK-ASM-AND-OBJ: cmpne32 a3, l0
355 cmpne32 a3, l0
357 # CHECK-ASM-AND-OBJ: cmphs32 a3, l0
359 cmphs32 a3, l0
361 # CHECK-ASM-AND-OBJ: cmplt32 a3, l0
363 cmplt32 a3, l0
365 # CHECK-ASM-AND-OBJ: zext32 a3, l0, 7, 0
367 zext32 a3, l0, 7, 0
369 # CHECK-ASM-AND-OBJ: sext32 a3, l0, 7, 0
371 sext32 a3, l0, 7, 0
389 # CHECK-ASM-AND-OBJ: tst32 a3, l0
391 tst32 a3, l0
393 # CHECK-ASM-AND-OBJ: tstnbz32 a3
395 tstnbz32 a3
397 # CHECK-ASM-AND-OBJ: clrf32 a3
399 clrf32 a3
401 # CHECK-ASM-AND-OBJ: clrt32 a3
403 clrt32 a3
531 # CHECK-ASM: jmp32 a3
533 jmp32 a3
547 # CHECK-ASM: jsr32 a3
549 jsr32 a3
641 stq32 a1-a3, (a1) # CHECK: :[[#@LINE]]:1: error: Register sequence is not valid. 'r4-r7' expected