Lines Matching refs:X32

2 ; RUN: llc -mtriple=i686-unknown < %s | FileCheck %s --check-prefix=X32
8 ; X32-LABEL: test_lshr_and:
9 ; X32:       # %bb.0:
10 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
11 ; X32-NEXT:    andl $12, %eax
12 ; X32-NEXT:    movl array(%eax), %eax
13 ; X32-NEXT:    retl
30 ; X32-LABEL: test_exact1:
31 ; X32:       # %bb.0:
32 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
33 ; X32-NEXT:    subl {{[0-9]+}}(%esp), %eax
34 ; X32-NEXT:    sarl %eax
35 ; X32-NEXT:    addl {{[0-9]+}}(%esp), %eax
36 ; X32-NEXT:    retl
52 ; X32-LABEL: test_exact2:
53 ; X32:       # %bb.0:
54 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
55 ; X32-NEXT:    subl {{[0-9]+}}(%esp), %eax
56 ; X32-NEXT:    sarl %eax
57 ; X32-NEXT:    addl {{[0-9]+}}(%esp), %eax
58 ; X32-NEXT:    retl
74 ; X32-LABEL: test_exact3:
75 ; X32:       # %bb.0:
76 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
77 ; X32-NEXT:    subl {{[0-9]+}}(%esp), %eax
78 ; X32-NEXT:    addl {{[0-9]+}}(%esp), %eax
79 ; X32-NEXT:    retl
95 ; X32-LABEL: test_exact4:
96 ; X32:       # %bb.0:
97 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
98 ; X32-NEXT:    subl {{[0-9]+}}(%esp), %eax
99 ; X32-NEXT:    shrl %eax
100 ; X32-NEXT:    addl {{[0-9]+}}(%esp), %eax
101 ; X32-NEXT:    retl
117 ; X32-LABEL: test_exact5:
118 ; X32:       # %bb.0:
119 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
120 ; X32-NEXT:    subl {{[0-9]+}}(%esp), %eax
121 ; X32-NEXT:    shrl %eax
122 ; X32-NEXT:    addl {{[0-9]+}}(%esp), %eax
123 ; X32-NEXT:    retl
139 ; X32-LABEL: test_exact6:
140 ; X32:       # %bb.0:
141 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
142 ; X32-NEXT:    subl {{[0-9]+}}(%esp), %eax
143 ; X32-NEXT:    addl {{[0-9]+}}(%esp), %eax
144 ; X32-NEXT:    retl
161 ; X32-LABEL: ashr_add_shl_i32:
162 ; X32:       # %bb.0:
163 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
164 ; X32-NEXT:    incl %eax
165 ; X32-NEXT:    movl %eax, %edx
166 ; X32-NEXT:    sarl $31, %edx
167 ; X32-NEXT:    retl
181 ; X32-LABEL: ashr_add_shl_i8:
182 ; X32:       # %bb.0:
183 ; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
184 ; X32-NEXT:    addb $2, %al
185 ; X32-NEXT:    movsbl %al, %eax
186 ; X32-NEXT:    movl %eax, %edx
187 ; X32-NEXT:    sarl $31, %edx
188 ; X32-NEXT:    retl
202 ; X32-LABEL: ashr_add_shl_v4i8:
203 ; X32:       # %bb.0:
204 ; X32-NEXT:    pushl %edi
205 ; X32-NEXT:    pushl %esi
206 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
207 ; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %ecx
208 ; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %edx
209 ; X32-NEXT:    movb {{[0-9]+}}(%esp), %ch
210 ; X32-NEXT:    movb {{[0-9]+}}(%esp), %dh
211 ; X32-NEXT:    incb %dh
212 ; X32-NEXT:    movsbl %dh, %esi
213 ; X32-NEXT:    incb %ch
214 ; X32-NEXT:    movsbl %ch, %edi
215 ; X32-NEXT:    incb %dl
216 ; X32-NEXT:    movsbl %dl, %edx
217 ; X32-NEXT:    incb %cl
218 ; X32-NEXT:    movsbl %cl, %ecx
219 ; X32-NEXT:    movl %ecx, 12(%eax)
220 ; X32-NEXT:    movl %edx, 8(%eax)
221 ; X32-NEXT:    movl %edi, 4(%eax)
222 ; X32-NEXT:    movl %esi, (%eax)
223 ; X32-NEXT:    popl %esi
224 ; X32-NEXT:    popl %edi
225 ; X32-NEXT:    retl $4
240 ; X32-LABEL: ashr_add_shl_i36:
241 ; X32:       # %bb.0:
242 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %edx
243 ; X32-NEXT:    shll $4, %edx
244 ; X32-NEXT:    movl %edx, %eax
245 ; X32-NEXT:    sarl $4, %eax
246 ; X32-NEXT:    sarl $31, %edx
247 ; X32-NEXT:    retl
262 ; X32-LABEL: ashr_add_shl_mismatch_shifts1:
263 ; X32:       # %bb.0:
264 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
265 ; X32-NEXT:    incl %eax
266 ; X32-NEXT:    movl %eax, %edx
267 ; X32-NEXT:    sarl $31, %edx
268 ; X32-NEXT:    retl
284 ; X32-LABEL: ashr_add_shl_mismatch_shifts2:
285 ; X32:       # %bb.0:
286 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
287 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %edx
288 ; X32-NEXT:    shrl $8, %edx
289 ; X32-NEXT:    incl %edx
290 ; X32-NEXT:    shrdl $8, %edx, %eax
291 ; X32-NEXT:    shrl $8, %edx
292 ; X32-NEXT:    retl
308 ; X32-LABEL: ashr_add_shl_i32_i8_extra_use1:
309 ; X32:       # %bb.0:
310 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
311 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
312 ; X32-NEXT:    shll $24, %eax
313 ; X32-NEXT:    addl $33554432, %eax # imm = 0x2000000
314 ; X32-NEXT:    movl %eax, (%ecx)
315 ; X32-NEXT:    sarl $24, %eax
316 ; X32-NEXT:    retl
334 ; X32-LABEL: ashr_add_shl_i32_i8_extra_use2:
335 ; X32:       # %bb.0:
336 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
337 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
338 ; X32-NEXT:    shll $24, %eax
339 ; X32-NEXT:    movl %eax, (%ecx)
340 ; X32-NEXT:    addl $33554432, %eax # imm = 0x2000000
341 ; X32-NEXT:    sarl $24, %eax
342 ; X32-NEXT:    retl
360 ; X32-LABEL: ashr_add_shl_i32_i8_extra_use3:
361 ; X32:       # %bb.0:
362 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
363 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %edx
364 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
365 ; X32-NEXT:    shll $24, %eax
366 ; X32-NEXT:    movl %eax, (%edx)
367 ; X32-NEXT:    addl $33554432, %eax # imm = 0x2000000
368 ; X32-NEXT:    movl %eax, (%ecx)
369 ; X32-NEXT:    sarl $24, %eax
370 ; X32-NEXT:    retl
392 ; X32-LABEL: PR42880:
393 ; X32:       # %bb.0:
394 ; X32-NEXT:    xorl %eax, %eax
395 ; X32-NEXT:    testb %al, %al
396 ; X32-NEXT:    je .LBB16_1
397 ; X32-NEXT:  # %bb.2: # %if
398 ; X32-NEXT:  .LBB16_1: # %then
424 ; X32-LABEL: ashr_add_neg_shl_i32:
425 ; X32:       # %bb.0:
426 ; X32-NEXT:    movl $1, %eax
427 ; X32-NEXT:    subl {{[0-9]+}}(%esp), %eax
428 ; X32-NEXT:    movl %eax, %edx
429 ; X32-NEXT:    sarl $31, %edx
430 ; X32-NEXT:    retl
446 ; X32-LABEL: ashr_add_neg_shl_i8:
447 ; X32:       # %bb.0:
448 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
449 ; X32-NEXT:    shll $24, %eax
450 ; X32-NEXT:    movl $33554432, %edx # imm = 0x2000000
451 ; X32-NEXT:    subl %eax, %edx
452 ; X32-NEXT:    movl %edx, %eax
453 ; X32-NEXT:    sarl $24, %eax
454 ; X32-NEXT:    sarl $31, %edx
455 ; X32-NEXT:    retl
471 ; X32-LABEL: ashr_add_neg_shl_v4i8:
472 ; X32:       # %bb.0:
473 ; X32-NEXT:    pushl %edi
474 ; X32-NEXT:    pushl %esi
475 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
476 ; X32-NEXT:    movb $1, %cl
477 ; X32-NEXT:    movb $1, %dl
478 ; X32-NEXT:    subb {{[0-9]+}}(%esp), %dl
479 ; X32-NEXT:    movsbl %dl, %edx
480 ; X32-NEXT:    movb $1, %ch
481 ; X32-NEXT:    subb {{[0-9]+}}(%esp), %ch
482 ; X32-NEXT:    movsbl %ch, %esi
483 ; X32-NEXT:    movb $1, %ch
484 ; X32-NEXT:    subb {{[0-9]+}}(%esp), %ch
485 ; X32-NEXT:    movsbl %ch, %edi
486 ; X32-NEXT:    subb {{[0-9]+}}(%esp), %cl
487 ; X32-NEXT:    movsbl %cl, %ecx
488 ; X32-NEXT:    movl %ecx, 12(%eax)
489 ; X32-NEXT:    movl %edi, 8(%eax)
490 ; X32-NEXT:    movl %esi, 4(%eax)
491 ; X32-NEXT:    movl %edx, (%eax)
492 ; X32-NEXT:    popl %esi
493 ; X32-NEXT:    popl %edi
494 ; X32-NEXT:    retl $4