Lines Matching refs:X32

3 ; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X32
18 ; X32-LABEL: and_signbit_select_shl:
19 ; X32:       # %bb.0:
20 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
21 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
22 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
23 ; X32-NEXT:    je .LBB0_2
24 ; X32-NEXT:  # %bb.1:
25 ; X32-NEXT:    andl $16711680, %eax # imm = 0xFF0000
26 ; X32-NEXT:  .LBB0_2:
27 ; X32-NEXT:    shll $8, %eax
28 ; X32-NEXT:    movl %eax, (%ecx)
29 ; X32-NEXT:    retl
47 ; X32-LABEL: and_nosignbit_select_shl:
48 ; X32:       # %bb.0:
49 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
50 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
51 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
52 ; X32-NEXT:    je .LBB1_2
53 ; X32-NEXT:  # %bb.1:
54 ; X32-NEXT:    andl $16711680, %eax # imm = 0xFF0000
55 ; X32-NEXT:  .LBB1_2:
56 ; X32-NEXT:    shll $8, %eax
57 ; X32-NEXT:    movl %eax, (%ecx)
58 ; X32-NEXT:    retl
77 ; X32-LABEL: or_signbit_select_shl:
78 ; X32:       # %bb.0:
79 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
80 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
81 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
82 ; X32-NEXT:    je .LBB2_2
83 ; X32-NEXT:  # %bb.1:
84 ; X32-NEXT:    orl $16711680, %eax # imm = 0xFF0000
85 ; X32-NEXT:  .LBB2_2:
86 ; X32-NEXT:    shll $8, %eax
87 ; X32-NEXT:    movl %eax, (%ecx)
88 ; X32-NEXT:    retl
106 ; X32-LABEL: or_nosignbit_select_shl:
107 ; X32:       # %bb.0:
108 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
109 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
110 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
111 ; X32-NEXT:    je .LBB3_2
112 ; X32-NEXT:  # %bb.1:
113 ; X32-NEXT:    orl $16711680, %eax # imm = 0xFF0000
114 ; X32-NEXT:  .LBB3_2:
115 ; X32-NEXT:    shll $8, %eax
116 ; X32-NEXT:    movl %eax, (%ecx)
117 ; X32-NEXT:    retl
136 ; X32-LABEL: xor_signbit_select_shl:
137 ; X32:       # %bb.0:
138 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
139 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
140 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
141 ; X32-NEXT:    je .LBB4_2
142 ; X32-NEXT:  # %bb.1:
143 ; X32-NEXT:    xorl $16711680, %eax # imm = 0xFF0000
144 ; X32-NEXT:  .LBB4_2:
145 ; X32-NEXT:    shll $8, %eax
146 ; X32-NEXT:    movl %eax, (%ecx)
147 ; X32-NEXT:    retl
165 ; X32-LABEL: xor_nosignbit_select_shl:
166 ; X32:       # %bb.0:
167 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
168 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
169 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
170 ; X32-NEXT:    je .LBB5_2
171 ; X32-NEXT:  # %bb.1:
172 ; X32-NEXT:    xorl $16711680, %eax # imm = 0xFF0000
173 ; X32-NEXT:  .LBB5_2:
174 ; X32-NEXT:    shll $8, %eax
175 ; X32-NEXT:    movl %eax, (%ecx)
176 ; X32-NEXT:    retl
195 ; X32-LABEL: add_signbit_select_shl:
196 ; X32:       # %bb.0:
197 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
198 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
199 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
200 ; X32-NEXT:    je .LBB6_2
201 ; X32-NEXT:  # %bb.1:
202 ; X32-NEXT:    addl $-65536, %eax # imm = 0xFFFF0000
203 ; X32-NEXT:  .LBB6_2:
204 ; X32-NEXT:    shll $8, %eax
205 ; X32-NEXT:    movl %eax, (%ecx)
206 ; X32-NEXT:    retl
224 ; X32-LABEL: add_nosignbit_select_shl:
225 ; X32:       # %bb.0:
226 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
227 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
228 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
229 ; X32-NEXT:    je .LBB7_2
230 ; X32-NEXT:  # %bb.1:
231 ; X32-NEXT:    addl $2147418112, %eax # imm = 0x7FFF0000
232 ; X32-NEXT:  .LBB7_2:
233 ; X32-NEXT:    shll $8, %eax
234 ; X32-NEXT:    movl %eax, (%ecx)
235 ; X32-NEXT:    retl
256 ; X32-LABEL: and_signbit_select_lshr:
257 ; X32:       # %bb.0:
258 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
259 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
260 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
261 ; X32-NEXT:    je .LBB8_2
262 ; X32-NEXT:  # %bb.1:
263 ; X32-NEXT:    andl $-65536, %eax # imm = 0xFFFF0000
264 ; X32-NEXT:  .LBB8_2:
265 ; X32-NEXT:    shrl $8, %eax
266 ; X32-NEXT:    movl %eax, (%ecx)
267 ; X32-NEXT:    retl
285 ; X32-LABEL: and_nosignbit_select_lshr:
286 ; X32:       # %bb.0:
287 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
288 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
289 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
290 ; X32-NEXT:    je .LBB9_2
291 ; X32-NEXT:  # %bb.1:
292 ; X32-NEXT:    andl $2147418112, %eax # imm = 0x7FFF0000
293 ; X32-NEXT:  .LBB9_2:
294 ; X32-NEXT:    shrl $8, %eax
295 ; X32-NEXT:    movl %eax, (%ecx)
296 ; X32-NEXT:    retl
315 ; X32-LABEL: or_signbit_select_lshr:
316 ; X32:       # %bb.0:
317 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
318 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
319 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
320 ; X32-NEXT:    je .LBB10_2
321 ; X32-NEXT:  # %bb.1:
322 ; X32-NEXT:    orl $-65536, %eax # imm = 0xFFFF0000
323 ; X32-NEXT:  .LBB10_2:
324 ; X32-NEXT:    shrl $8, %eax
325 ; X32-NEXT:    movl %eax, (%ecx)
326 ; X32-NEXT:    retl
344 ; X32-LABEL: or_nosignbit_select_lshr:
345 ; X32:       # %bb.0:
346 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
347 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
348 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
349 ; X32-NEXT:    je .LBB11_2
350 ; X32-NEXT:  # %bb.1:
351 ; X32-NEXT:    orl $2147418112, %eax # imm = 0x7FFF0000
352 ; X32-NEXT:  .LBB11_2:
353 ; X32-NEXT:    shrl $8, %eax
354 ; X32-NEXT:    movl %eax, (%ecx)
355 ; X32-NEXT:    retl
374 ; X32-LABEL: xor_signbit_select_lshr:
375 ; X32:       # %bb.0:
376 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
377 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
378 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
379 ; X32-NEXT:    je .LBB12_2
380 ; X32-NEXT:  # %bb.1:
381 ; X32-NEXT:    xorl $-65536, %eax # imm = 0xFFFF0000
382 ; X32-NEXT:  .LBB12_2:
383 ; X32-NEXT:    shrl $8, %eax
384 ; X32-NEXT:    movl %eax, (%ecx)
385 ; X32-NEXT:    retl
403 ; X32-LABEL: xor_nosignbit_select_lshr:
404 ; X32:       # %bb.0:
405 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
406 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
407 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
408 ; X32-NEXT:    je .LBB13_2
409 ; X32-NEXT:  # %bb.1:
410 ; X32-NEXT:    xorl $2147418112, %eax # imm = 0x7FFF0000
411 ; X32-NEXT:  .LBB13_2:
412 ; X32-NEXT:    shrl $8, %eax
413 ; X32-NEXT:    movl %eax, (%ecx)
414 ; X32-NEXT:    retl
433 ; X32-LABEL: add_signbit_select_lshr:
434 ; X32:       # %bb.0:
435 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
436 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
437 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
438 ; X32-NEXT:    je .LBB14_2
439 ; X32-NEXT:  # %bb.1:
440 ; X32-NEXT:    addl $-65536, %eax # imm = 0xFFFF0000
441 ; X32-NEXT:  .LBB14_2:
442 ; X32-NEXT:    shrl $8, %eax
443 ; X32-NEXT:    movl %eax, (%ecx)
444 ; X32-NEXT:    retl
462 ; X32-LABEL: add_nosignbit_select_lshr:
463 ; X32:       # %bb.0:
464 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
465 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
466 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
467 ; X32-NEXT:    je .LBB15_2
468 ; X32-NEXT:  # %bb.1:
469 ; X32-NEXT:    addl $2147418112, %eax # imm = 0x7FFF0000
470 ; X32-NEXT:  .LBB15_2:
471 ; X32-NEXT:    shrl $8, %eax
472 ; X32-NEXT:    movl %eax, (%ecx)
473 ; X32-NEXT:    retl
494 ; X32-LABEL: and_signbit_select_ashr:
495 ; X32:       # %bb.0:
496 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
497 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
498 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
499 ; X32-NEXT:    je .LBB16_2
500 ; X32-NEXT:  # %bb.1:
501 ; X32-NEXT:    andl $-65536, %eax # imm = 0xFFFF0000
502 ; X32-NEXT:  .LBB16_2:
503 ; X32-NEXT:    sarl $8, %eax
504 ; X32-NEXT:    movl %eax, (%ecx)
505 ; X32-NEXT:    retl
523 ; X32-LABEL: and_nosignbit_select_ashr:
524 ; X32:       # %bb.0:
525 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
526 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
527 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
528 ; X32-NEXT:    je .LBB17_2
529 ; X32-NEXT:  # %bb.1:
530 ; X32-NEXT:    andl $2147418112, %eax # imm = 0x7FFF0000
531 ; X32-NEXT:  .LBB17_2:
532 ; X32-NEXT:    sarl $8, %eax
533 ; X32-NEXT:    movl %eax, (%ecx)
534 ; X32-NEXT:    retl
553 ; X32-LABEL: or_signbit_select_ashr:
554 ; X32:       # %bb.0:
555 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
556 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
557 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
558 ; X32-NEXT:    je .LBB18_2
559 ; X32-NEXT:  # %bb.1:
560 ; X32-NEXT:    orl $-65536, %eax # imm = 0xFFFF0000
561 ; X32-NEXT:  .LBB18_2:
562 ; X32-NEXT:    sarl $8, %eax
563 ; X32-NEXT:    movl %eax, (%ecx)
564 ; X32-NEXT:    retl
582 ; X32-LABEL: or_nosignbit_select_ashr:
583 ; X32:       # %bb.0:
584 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
585 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
586 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
587 ; X32-NEXT:    je .LBB19_2
588 ; X32-NEXT:  # %bb.1:
589 ; X32-NEXT:    orl $2147418112, %eax # imm = 0x7FFF0000
590 ; X32-NEXT:  .LBB19_2:
591 ; X32-NEXT:    sarl $8, %eax
592 ; X32-NEXT:    movl %eax, (%ecx)
593 ; X32-NEXT:    retl
612 ; X32-LABEL: xor_signbit_select_ashr:
613 ; X32:       # %bb.0:
614 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
615 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
616 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
617 ; X32-NEXT:    je .LBB20_2
618 ; X32-NEXT:  # %bb.1:
619 ; X32-NEXT:    xorl $-65536, %eax # imm = 0xFFFF0000
620 ; X32-NEXT:  .LBB20_2:
621 ; X32-NEXT:    sarl $8, %eax
622 ; X32-NEXT:    movl %eax, (%ecx)
623 ; X32-NEXT:    retl
641 ; X32-LABEL: xor_nosignbit_select_ashr:
642 ; X32:       # %bb.0:
643 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
644 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
645 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
646 ; X32-NEXT:    je .LBB21_2
647 ; X32-NEXT:  # %bb.1:
648 ; X32-NEXT:    xorl $2147418112, %eax # imm = 0x7FFF0000
649 ; X32-NEXT:  .LBB21_2:
650 ; X32-NEXT:    sarl $8, %eax
651 ; X32-NEXT:    movl %eax, (%ecx)
652 ; X32-NEXT:    retl
671 ; X32-LABEL: add_signbit_select_ashr:
672 ; X32:       # %bb.0:
673 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
674 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
675 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
676 ; X32-NEXT:    je .LBB22_2
677 ; X32-NEXT:  # %bb.1:
678 ; X32-NEXT:    addl $-65536, %eax # imm = 0xFFFF0000
679 ; X32-NEXT:  .LBB22_2:
680 ; X32-NEXT:    sarl $8, %eax
681 ; X32-NEXT:    movl %eax, (%ecx)
682 ; X32-NEXT:    retl
700 ; X32-LABEL: add_nosignbit_select_ashr:
701 ; X32:       # %bb.0:
702 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
703 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
704 ; X32-NEXT:    testb $1, {{[0-9]+}}(%esp)
705 ; X32-NEXT:    je .LBB23_2
706 ; X32-NEXT:  # %bb.1:
707 ; X32-NEXT:    addl $2147418112, %eax # imm = 0x7FFF0000
708 ; X32-NEXT:  .LBB23_2:
709 ; X32-NEXT:    sarl $8, %eax
710 ; X32-NEXT:    movl %eax, (%ecx)
711 ; X32-NEXT:    retl