Lines Matching refs:dbg

6 define void @f6() #0 !dbg !8 {
11 call void @llvm.dbg.declare(metadata ptr %dog, metadata !11, metadata !DIExpression()), !dbg !13
12 store i32 16, ptr %dog, align 4, !dbg !13
13 call void @llvm.dbg.declare(metadata ptr %cat, metadata !14, metadata !DIExpression()), !dbg !15
14 store i32 32, ptr %cat, align 4, !dbg !15
15 …call void @llvm.dbg.declare(metadata ptr %pangolin, metadata !16, metadata !DIExpression()), !dbg …
16 store i32 48, ptr %pangolin, align 4, !dbg !17
17 ret void, !dbg !18
20 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
22 define void @f5() #0 !dbg !19 {
27 call void @llvm.dbg.declare(metadata ptr %dog, metadata !20, metadata !DIExpression()), !dbg !21
28 store i32 16, ptr %dog, align 4, !dbg !21
29 call void @llvm.dbg.declare(metadata ptr %cat, metadata !22, metadata !DIExpression()), !dbg !23
30 store i32 32, ptr %cat, align 4, !dbg !23
31 …call void @llvm.dbg.declare(metadata ptr %pangolin, metadata !24, metadata !DIExpression()), !dbg …
32 store i32 48, ptr %pangolin, align 4, !dbg !25
33 ret void, !dbg !26
36 define void @f4() #0 !dbg !27 {
41 call void @llvm.dbg.declare(metadata ptr %dog, metadata !28, metadata !DIExpression()), !dbg !29
42 store i32 16, ptr %dog, align 4, !dbg !29
43 call void @llvm.dbg.declare(metadata ptr %cat, metadata !30, metadata !DIExpression()), !dbg !31
44 store i32 32, ptr %cat, align 4, !dbg !31
45 …call void @llvm.dbg.declare(metadata ptr %pangolin, metadata !32, metadata !DIExpression()), !dbg …
46 store i32 48, ptr %pangolin, align 4, !dbg !33
47 ret void, !dbg !34
50 define i32 @f1() #0 !dbg !35 {
55 call void @llvm.dbg.declare(metadata ptr %dog, metadata !38, metadata !DIExpression()), !dbg !39
56 store i32 1, ptr %dog, align 4, !dbg !39
57 call void @llvm.dbg.declare(metadata ptr %cat, metadata !40, metadata !DIExpression()), !dbg !41
58 store i32 2, ptr %cat, align 4, !dbg !41
59 …call void @llvm.dbg.declare(metadata ptr %pangolin, metadata !42, metadata !DIExpression()), !dbg …
60 store i32 3, ptr %pangolin, align 4, !dbg !43
61 store i32 16, ptr %dog, align 4, !dbg !44
62 %0 = load i32, ptr %dog, align 4, !dbg !45
63 ret i32 %0, !dbg !46
66 define i32 @f2() #0 !dbg !47 {
71 call void @llvm.dbg.declare(metadata ptr %dog, metadata !48, metadata !DIExpression()), !dbg !49
72 store i32 1, ptr %dog, align 4, !dbg !49
73 call void @llvm.dbg.declare(metadata ptr %cat, metadata !50, metadata !DIExpression()), !dbg !51
74 store i32 2, ptr %cat, align 4, !dbg !51
75 …call void @llvm.dbg.declare(metadata ptr %pangolin, metadata !52, metadata !DIExpression()), !dbg …
76 store i32 3, ptr %pangolin, align 4, !dbg !53
77 store i32 16, ptr %dog, align 4, !dbg !54
78 %0 = load i32, ptr %dog, align 4, !dbg !55
79 ret i32 %0, !dbg !56
82 define i32 @f3() #0 !dbg !57 {
87 call void @llvm.dbg.declare(metadata ptr %dog, metadata !58, metadata !DIExpression()), !dbg !59
88 store i32 1, ptr %dog, align 4, !dbg !59
89 call void @llvm.dbg.declare(metadata ptr %cat, metadata !60, metadata !DIExpression()), !dbg !61
90 store i32 2, ptr %cat, align 4, !dbg !61
91 …call void @llvm.dbg.declare(metadata ptr %pangolin, metadata !62, metadata !DIExpression()), !dbg …
92 store i32 3, ptr %pangolin, align 4, !dbg !63
93 store i32 16, ptr %dog, align 4, !dbg !64
94 %0 = load i32, ptr %dog, align 4, !dbg !65
95 ret i32 %0, !dbg !66
98 define i32 @main() #0 !dbg !67 {
103 call void @llvm.dbg.declare(metadata ptr %a, metadata !68, metadata !DIExpression()), !dbg !69
104 store i32 4, ptr %a, align 4, !dbg !69
105 %call = call i32 @f1() #2, !dbg !70
106 %call1 = call i32 @f2() #2, !dbg !71
107 %call2 = call i32 @f3() #2, !dbg !72
108 ret i32 0, !dbg !73
137 !llvm.dbg.cu = !{!0}