Lines Matching refs:AVX

2 …s -mtriple=x86_64-unknown-unknown -mattr=+avx  | FileCheck %s --check-prefix=ALL --check-prefix=AVX
5 ; 0'th element insertion into an AVX register.
28 ; AVX-LABEL: insert_i8_firstelt_of_low_subvector:
29 ; AVX:       # %bb.0:
30 ; AVX-NEXT:    vpinsrb $0, %edi, %xmm0, %xmm1
31 ; AVX-NEXT:    vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]
32 ; AVX-NEXT:    retq
44 ; AVX-LABEL: insert_i16_firstelt_of_low_subvector:
45 ; AVX:       # %bb.0:
46 ; AVX-NEXT:    vpinsrw $0, %edi, %xmm0, %xmm1
47 ; AVX-NEXT:    vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]
48 ; AVX-NEXT:    retq
60 ; AVX-LABEL: insert_i32_firstelt_of_low_subvector:
61 ; AVX:       # %bb.0:
62 ; AVX-NEXT:    vpinsrd $0, %edi, %xmm0, %xmm1
63 ; AVX-NEXT:    vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]
64 ; AVX-NEXT:    retq
76 ; AVX-LABEL: insert_i64_firstelt_of_low_subvector:
77 ; AVX:       # %bb.0:
78 ; AVX-NEXT:    vpinsrq $0, %rdi, %xmm0, %xmm1
79 ; AVX-NEXT:    vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]
80 ; AVX-NEXT:    retq
91 ; 0'th element of high subvector insertion into an AVX register.
94 ; AVX-LABEL: insert_f32_firstelt_of_high_subvector:
95 ; AVX:       # %bb.0:
96 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm2
97 ; AVX-NEXT:    vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
98 ; AVX-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
99 ; AVX-NEXT:    retq
111 ; AVX-LABEL: insert_f64_firstelt_of_high_subvector:
112 ; AVX:       # %bb.0:
113 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm2
114 ; AVX-NEXT:    vblendps {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3]
115 ; AVX-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
116 ; AVX-NEXT:    retq
128 ; AVX-LABEL: insert_i8_firstelt_of_high_subvector:
129 ; AVX:       # %bb.0:
130 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm1
131 ; AVX-NEXT:    vpinsrb $0, %edi, %xmm1, %xmm1
132 ; AVX-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
133 ; AVX-NEXT:    retq
146 ; AVX-LABEL: insert_i16_firstelt_of_high_subvector:
147 ; AVX:       # %bb.0:
148 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm1
149 ; AVX-NEXT:    vpinsrw $0, %edi, %xmm1, %xmm1
150 ; AVX-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
151 ; AVX-NEXT:    retq
165 ; AVX-LABEL: insert_i32_firstelt_of_high_subvector:
166 ; AVX:       # %bb.0:
167 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm1
168 ; AVX-NEXT:    vpinsrd $0, %edi, %xmm1, %xmm1
169 ; AVX-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
170 ; AVX-NEXT:    retq
183 ; AVX-LABEL: insert_i64_firstelt_of_high_subvector:
184 ; AVX:       # %bb.0:
185 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm1
186 ; AVX-NEXT:    vpinsrq $0, %rdi, %xmm1, %xmm1
187 ; AVX-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
188 ; AVX-NEXT:    retq
203 ; AVX-LABEL: insert_f32_firstelts:
204 ; AVX:       # %bb.0:
205 ; AVX-NEXT:    vblendps {{.*#+}} xmm2 = xmm1[0],xmm0[1,2,3]
206 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm0
207 ; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
208 ; AVX-NEXT:    vinsertf128 $1, %xmm0, %ymm2, %ymm0
209 ; AVX-NEXT:    retq
222 ; AVX-LABEL: insert_f64_firstelts:
223 ; AVX:       # %bb.0:
224 ; AVX-NEXT:    vblendps {{.*#+}} xmm2 = xmm1[0,1],xmm0[2,3]
225 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm0
226 ; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
227 ; AVX-NEXT:    vinsertf128 $1, %xmm0, %ymm2, %ymm0
228 ; AVX-NEXT:    retq
241 ; AVX-LABEL: insert_i8_firstelts:
242 ; AVX:       # %bb.0:
243 ; AVX-NEXT:    vpinsrb $0, %edi, %xmm0, %xmm1
244 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm0
245 ; AVX-NEXT:    vpinsrb $0, %edi, %xmm0, %xmm0
246 ; AVX-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
247 ; AVX-NEXT:    retq
262 ; AVX-LABEL: insert_i16_firstelts:
263 ; AVX:       # %bb.0:
264 ; AVX-NEXT:    vpinsrw $0, %edi, %xmm0, %xmm1
265 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm0
266 ; AVX-NEXT:    vpinsrw $0, %edi, %xmm0, %xmm0
267 ; AVX-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
268 ; AVX-NEXT:    retq
285 ; AVX-LABEL: insert_i32_firstelts:
286 ; AVX:       # %bb.0:
287 ; AVX-NEXT:    vpinsrd $0, %edi, %xmm0, %xmm1
288 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm0
289 ; AVX-NEXT:    vpinsrd $0, %edi, %xmm0, %xmm0
290 ; AVX-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
291 ; AVX-NEXT:    retq
305 ; AVX-LABEL: insert_i64_firstelts:
306 ; AVX:       # %bb.0:
307 ; AVX-NEXT:    vpinsrq $0, %rdi, %xmm0, %xmm1
308 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm0
309 ; AVX-NEXT:    vpinsrq $0, %rdi, %xmm0, %xmm0
310 ; AVX-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
311 ; AVX-NEXT:    retq
327 ; AVX-LABEL: insert_f32_two_elts_of_high_subvector:
328 ; AVX:       # %bb.0:
329 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm2
330 ; AVX-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm2[2,3]
331 ; AVX-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
332 ; AVX-NEXT:    retq
345 ; AVX-LABEL: insert_f64_two_elts_of_high_subvector:
346 ; AVX:       # %bb.0:
347 ; AVX-NEXT:    vmovddup {{.*#+}} xmm1 = xmm1[0,0]
348 ; AVX-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
349 ; AVX-NEXT:    retq
362 ; AVX-LABEL: insert_i8_two_elts_of_high_subvector:
363 ; AVX:       # %bb.0:
364 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm1
365 ; AVX-NEXT:    vpinsrb $0, %edi, %xmm1, %xmm1
366 ; AVX-NEXT:    vpinsrb $1, %edi, %xmm1, %xmm1
367 ; AVX-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
368 ; AVX-NEXT:    retq
383 ; AVX-LABEL: insert_i16_two_elts_of_high_subvector:
384 ; AVX:       # %bb.0:
385 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm1
386 ; AVX-NEXT:    vpinsrw $0, %edi, %xmm1, %xmm1
387 ; AVX-NEXT:    vpinsrw $1, %edi, %xmm1, %xmm1
388 ; AVX-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
389 ; AVX-NEXT:    retq
403 ; AVX-LABEL: insert_i32_two_elts_of_high_subvector:
404 ; AVX:       # %bb.0:
405 ; AVX-NEXT:    vextractf128 $1, %ymm0, %xmm1
406 ; AVX-NEXT:    vpinsrd $0, %edi, %xmm1, %xmm1
407 ; AVX-NEXT:    vpinsrd $1, %edi, %xmm1, %xmm1
408 ; AVX-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
409 ; AVX-NEXT:    retq
423 ; AVX-LABEL: insert_i64_two_elts_of_high_subvector:
424 ; AVX:       # %bb.0:
425 ; AVX-NEXT:    vpinsrq $0, %rdi, %xmm0, %xmm1
426 ; AVX-NEXT:    vpinsrq $1, %rdi, %xmm1, %xmm1
427 ; AVX-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
428 ; AVX-NEXT:    retq
466 ; AVX-LABEL: insert_i8_two_elts_of_low_subvector:
467 ; AVX:       # %bb.0:
468 ; AVX-NEXT:    vpinsrb $0, %edi, %xmm0, %xmm1
469 ; AVX-NEXT:    vpinsrb $1, %edi, %xmm1, %xmm1
470 ; AVX-NEXT:    vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]
471 ; AVX-NEXT:    retq
485 ; AVX-LABEL: insert_i16_two_elts_of_low_subvector:
486 ; AVX:       # %bb.0:
487 ; AVX-NEXT:    vpinsrw $0, %edi, %xmm0, %xmm1
488 ; AVX-NEXT:    vpinsrw $1, %edi, %xmm1, %xmm1
489 ; AVX-NEXT:    vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]
490 ; AVX-NEXT:    retq
504 ; AVX-LABEL: insert_i32_two_elts_of_low_subvector:
505 ; AVX:       # %bb.0:
506 ; AVX-NEXT:    vpinsrd $0, %edi, %xmm0, %xmm1
507 ; AVX-NEXT:    vpinsrd $1, %edi, %xmm1, %xmm1
508 ; AVX-NEXT:    vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]
509 ; AVX-NEXT:    retq
524 ; AVX-LABEL: insert_i64_two_elts_of_low_subvector:
525 ; AVX:       # %bb.0:
526 ; AVX-NEXT:    vpinsrq $0, %rdi, %xmm0, %xmm1
527 ; AVX-NEXT:    vpinsrq $1, %rdi, %xmm1, %xmm1
528 ; AVX-NEXT:    vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]
529 ; AVX-NEXT:    retq