Lines Matching refs:esp
30 ; CHECK32-NEXT: subl $20, %esp
34 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
35 ; CHECK32-NEXT: subl $8, %esp
37 ; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
38 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
40 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
42 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
44 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
46 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
48 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
50 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
52 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
54 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
60 ; CHECK32-NEXT: addl $44, %esp
62 ; CHECK32-NEXT: movl (%esp), %eax
63 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
64 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
65 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
71 ; CHECK32-NEXT: addl $20, %esp
100 ; CHECK32-NEXT: subl $36, %esp
101 ; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
113 ; CHECK32-NEXT: addl $72, %esp
150 ; CHECK32-NEXT: subl $24, %esp
153 ; CHECK32-NEXT: subl $8, %esp
155 ; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
156 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
158 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
160 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
162 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
164 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
170 ; CHECK32-NEXT: addl $28, %esp
172 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
173 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
174 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
175 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
180 ; CHECK32-NEXT: addl $24, %esp
218 ; CHECK32-NEXT: subl $24, %esp
221 ; CHECK32-NEXT: subl $8, %esp
223 ; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
224 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
226 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
228 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
230 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
232 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
238 ; CHECK32-NEXT: addl $28, %esp
240 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
241 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
242 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
243 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
248 ; CHECK32-NEXT: addl $24, %esp
286 ; CHECK32-NEXT: subl $24, %esp
289 ; CHECK32-NEXT: subl $8, %esp
291 ; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
292 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
294 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
296 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
298 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
300 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
306 ; CHECK32-NEXT: addl $28, %esp
308 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
309 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
310 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
311 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
316 ; CHECK32-NEXT: addl $24, %esp
354 ; CHECK32-NEXT: subl $24, %esp
357 ; CHECK32-NEXT: subl $8, %esp
359 ; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
360 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
362 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
364 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
366 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
368 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
374 ; CHECK32-NEXT: addl $28, %esp
376 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
377 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
378 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
379 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
384 ; CHECK32-NEXT: addl $24, %esp
425 ; CHECK32-NEXT: subl $24, %esp
428 ; CHECK32-NEXT: subl $8, %esp
430 ; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
431 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
433 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
435 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
437 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
439 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
445 ; CHECK32-NEXT: addl $28, %esp
447 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
448 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
449 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
450 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
455 ; CHECK32-NEXT: addl $24, %esp
496 ; CHECK32-NEXT: subl $24, %esp
499 ; CHECK32-NEXT: subl $8, %esp
501 ; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
502 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
504 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
506 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
508 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
510 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
516 ; CHECK32-NEXT: addl $28, %esp
518 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
519 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
520 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
521 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
526 ; CHECK32-NEXT: addl $24, %esp
567 ; CHECK32-NEXT: subl $24, %esp
570 ; CHECK32-NEXT: subl $8, %esp
572 ; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
573 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
575 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
577 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
579 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
581 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
587 ; CHECK32-NEXT: addl $28, %esp
589 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
590 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
591 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
592 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
597 ; CHECK32-NEXT: addl $24, %esp
638 ; CHECK32-NEXT: subl $24, %esp
641 ; CHECK32-NEXT: subl $8, %esp
643 ; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
644 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
646 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
648 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
650 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
652 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
658 ; CHECK32-NEXT: addl $28, %esp
660 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
661 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
662 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
663 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
668 ; CHECK32-NEXT: addl $24, %esp
698 ; CHECK32-NEXT: subl $20, %esp
702 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
703 ; CHECK32-NEXT: subl $8, %esp
705 ; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
722 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
728 ; CHECK32-NEXT: addl $44, %esp
730 ; CHECK32-NEXT: movl (%esp), %eax
731 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
732 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
733 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
739 ; CHECK32-NEXT: addl $20, %esp
770 ; CHECK32-NEXT: subl $20, %esp
774 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
775 ; CHECK32-NEXT: subl $8, %esp
777 ; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
794 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
800 ; CHECK32-NEXT: addl $44, %esp
802 ; CHECK32-NEXT: movl (%esp), %eax
803 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
804 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
805 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
811 ; CHECK32-NEXT: addl $20, %esp
843 ; CHECK32-NEXT: subl $36, %esp
845 ; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
846 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
848 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
850 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
852 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
854 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
860 ; CHECK32-NEXT: addl $56, %esp
888 ; CHECK32-NEXT: subl $36, %esp
890 ; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
891 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
893 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
895 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
897 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
899 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
905 ; CHECK32-NEXT: addl $56, %esp
933 ; CHECK32-NEXT: subl $36, %esp
935 ; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
936 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
938 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
940 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
942 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
944 ; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
950 ; CHECK32-NEXT: addl $56, %esp